1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Copyright (C) 2016 NXP Semiconductors 4 * 5 * Configuration settings for the i.MX7S Warp board. 6 */ 7 8 #ifndef __WARP7_CONFIG_H 9 #define __WARP7_CONFIG_H 10 11 #include "mx7_common.h" 12 #include <imximage.h> 13 14 #define PHYS_SDRAM_SIZE SZ_512M 15 16 /* 17 * If we have defined the OPTEE ram size and not OPTEE it means that we were 18 * launched by OPTEE, because of that we shall skip all the low level 19 * initialization since it was already done by ATF or OPTEE 20 */ 21 #ifdef CONFIG_OPTEE_TZDRAM_SIZE 22 #ifndef CONFIG_OPTEE 23 #define CONFIG_SKIP_LOWLEVEL_INIT 24 #endif 25 #endif 26 27 #define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR 28 29 /* Size of malloc() pool */ 30 #define CONFIG_SYS_MALLOC_LEN (35 * SZ_1M) 31 32 /* MMC Config*/ 33 #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC3_BASE_ADDR 34 #define CONFIG_SUPPORT_EMMC_BOOT 35 #define CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE 36 #define CONFIG_SYS_MMC_IMG_LOAD_PART 1 37 38 /* Switch on SERIAL_TAG */ 39 #define CONFIG_SERIAL_TAG 40 41 #define CONFIG_DFU_ENV_SETTINGS \ 42 "dfu_alt_info=boot raw 0x2 0x400 mmcpart 1\0" \ 43 44 #define CONFIG_EXTRA_ENV_SETTINGS \ 45 CONFIG_DFU_ENV_SETTINGS \ 46 "script=boot.scr\0" \ 47 "script_signed=boot.scr.imx-signed\0" \ 48 "image=zImage\0" \ 49 "console=ttymxc0\0" \ 50 "ethact=usb_ether\0" \ 51 "fdt_high=0xffffffff\0" \ 52 "initrd_high=0xffffffff\0" \ 53 "fdt_file=imx7s-warp.dtb\0" \ 54 "fdt_addr=" __stringify(CONFIG_SYS_FDT_ADDR)"\0" \ 55 "optee_addr=" __stringify(CONFIG_OPTEE_LOAD_ADDR)"\0" \ 56 "boot_fdt=try\0" \ 57 "ip_dyn=yes\0" \ 58 "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ 59 "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ 60 "rootpart=" __stringify(CONFIG_WARP7_ROOT_PART) "\0" \ 61 "finduuid=part uuid mmc 0:${rootpart} uuid\0" \ 62 "mmcargs=setenv bootargs console=${console},${baudrate} " \ 63 "root=PARTUUID=${uuid} rootwait rw\0" \ 64 "ivt_offset=" __stringify(BOOTROM_IVT_HDR_OFFSET)"\0"\ 65 "warp7_auth_or_fail=hab_auth_img_or_fail ${hab_ivt_addr} ${filesize} 0;\0" \ 66 "do_bootscript_hab=" \ 67 "if test ${hab_enabled} -eq 1; then " \ 68 "setexpr hab_ivt_addr ${loadaddr} - ${ivt_offset}; " \ 69 "setenv script ${script_signed}; " \ 70 "load mmc ${mmcdev}:${mmcpart} ${hab_ivt_addr} ${script}; " \ 71 "run warp7_auth_or_fail; " \ 72 "run bootscript; "\ 73 "fi;\0" \ 74 "loadbootscript=" \ 75 "load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 76 "bootscript=echo Running bootscript from mmc ...; " \ 77 "source\0" \ 78 "loadimage=load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ 79 "loadfdt=load mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ 80 "mmcboot=echo Booting from mmc ...; " \ 81 "run finduuid; " \ 82 "run mmcargs; " \ 83 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 84 "if run loadfdt; then " \ 85 "bootz ${loadaddr} - ${fdt_addr}; " \ 86 "else " \ 87 "if test ${boot_fdt} = try; then " \ 88 "bootz; " \ 89 "else " \ 90 "echo WARN: Cannot load the DT; " \ 91 "fi; " \ 92 "fi; " \ 93 "else " \ 94 "bootz; " \ 95 "fi;\0" \ 96 97 #define CONFIG_BOOTCOMMAND \ 98 "mmc dev ${mmcdev};" \ 99 "mmc dev ${mmcdev}; if mmc rescan; then " \ 100 "run do_bootscript_hab;" \ 101 "if run loadbootscript; then " \ 102 "run bootscript; " \ 103 "else " \ 104 "if run loadimage; then " \ 105 "run mmcboot; " \ 106 "fi; " \ 107 "fi; " \ 108 "fi" 109 110 #define CONFIG_SYS_MEMTEST_START 0x80000000 111 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x20000000) 112 113 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 114 #define CONFIG_SYS_HZ 1000 115 116 /* Physical Memory Map */ 117 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 118 119 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 120 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 121 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 122 123 #define CONFIG_SYS_INIT_SP_OFFSET \ 124 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 125 #define CONFIG_SYS_INIT_SP_ADDR \ 126 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 127 128 /* I2C configs */ 129 #define CONFIG_SYS_I2C 130 #define CONFIG_SYS_I2C_MXC 131 #define CONFIG_SYS_I2C_MXC_I2C1 132 #define CONFIG_SYS_I2C_SPEED 100000 133 134 /* PMIC */ 135 #define CONFIG_POWER 136 #define CONFIG_POWER_I2C 137 #define CONFIG_POWER_PFUZE3000 138 #define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08 139 140 /* environment organization */ 141 #define CONFIG_ENV_SIZE SZ_8K 142 143 #define CONFIG_ENV_OFFSET (8 * SZ_64K) 144 #define CONFIG_SYS_FSL_USDHC_NUM 1 145 146 #define CONFIG_SYS_MMC_ENV_DEV 0 147 #define CONFIG_SYS_MMC_ENV_PART 0 148 149 /* USB Configs */ 150 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET 151 152 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 153 #define CONFIG_MXC_USB_FLAGS 0 154 #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 /* Only OTG1 port enabled */ 155 156 #define CONFIG_IMX_THERMAL 157 158 #define CONFIG_USBD_HS 159 160 /* USB Device Firmware Update support */ 161 #define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_16M 162 #define DFU_DEFAULT_POLL_TIMEOUT 300 163 164 #define CONFIG_USBNET_DEV_ADDR "de:ad:be:af:00:01" 165 166 /* Environment variable name to represent HAB enable state */ 167 #define HAB_ENABLED_ENVNAME "hab_enabled" 168 169 #endif 170