xref: /openbmc/u-boot/include/configs/vf610twr.h (revision c0982871)
1 /*
2  * Copyright 2013 Freescale Semiconductor, Inc.
3  *
4  * Configuration settings for the Freescale Vybrid vf610twr board.
5  *
6  * SPDX-License-Identifier:	GPL-2.0+
7  */
8 
9 #ifndef __CONFIG_H
10 #define __CONFIG_H
11 
12 #include <asm/arch/imx-regs.h>
13 
14 #define CONFIG_VF610
15 
16 #define CONFIG_DISPLAY_CPUINFO
17 #define CONFIG_DISPLAY_BOARDINFO
18 #define CONFIG_SYS_FSL_CLK
19 
20 #define CONFIG_MACH_TYPE		4146
21 
22 #define CONFIG_SKIP_LOWLEVEL_INIT
23 
24 /* Enable passing of ATAGs */
25 #define CONFIG_CMDLINE_TAG
26 
27 #define CONFIG_CMD_FUSE
28 #ifdef CONFIG_CMD_FUSE
29 #define CONFIG_MXC_OCOTP
30 #endif
31 
32 /* Size of malloc() pool */
33 #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 2 * 1024 * 1024)
34 
35 #define CONFIG_BOARD_EARLY_INIT_F
36 
37 #define CONFIG_FSL_LPUART
38 #define LPUART_BASE			UART1_BASE
39 
40 /* Allow to overwrite serial and ethaddr */
41 #define CONFIG_ENV_OVERWRITE
42 #define CONFIG_SYS_UART_PORT		(1)
43 #define CONFIG_BAUDRATE			115200
44 
45 /* NAND support */
46 #define CONFIG_CMD_NAND
47 #define CONFIG_CMD_NAND_TRIMFFS
48 #define CONFIG_SYS_NAND_ONFI_DETECTION
49 
50 #ifdef CONFIG_CMD_NAND
51 #define CONFIG_USE_ARCH_MEMCPY
52 #define CONFIG_SYS_MAX_NAND_DEVICE	1
53 #define CONFIG_SYS_NAND_BASE		NFC_BASE_ADDR
54 
55 /* UBI */
56 #define CONFIG_CMD_UBI
57 #define CONFIG_CMD_UBIFS
58 #define CONFIG_RBTREE
59 #define CONFIG_LZO
60 
61 /* Dynamic MTD partition support */
62 #define CONFIG_CMD_MTDPARTS
63 #define CONFIG_MTD_PARTITIONS
64 #define CONFIG_MTD_DEVICE
65 #define MTDIDS_DEFAULT			"nand0=fsl_nfc"
66 #define MTDPARTS_DEFAULT		"mtdparts=fsl_nfc:"		\
67 					"128k(vf-bcb)ro,"		\
68 					"1408k(u-boot)ro,"		\
69 					"512k(u-boot-env),"		\
70 					"4m(kernel),"			\
71 					"512k(fdt),"		\
72 					"-(rootfs)"
73 #endif
74 
75 #define CONFIG_MMC
76 #define CONFIG_FSL_ESDHC
77 #define CONFIG_SYS_FSL_ESDHC_ADDR	0
78 #define CONFIG_SYS_FSL_ESDHC_NUM	1
79 
80 #define CONFIG_SYS_FSL_ERRATUM_ESDHC111
81 
82 #define CONFIG_CMD_MMC
83 #define CONFIG_GENERIC_MMC
84 #define CONFIG_CMD_FAT
85 #define CONFIG_DOS_PARTITION
86 
87 #define CONFIG_CMD_PING
88 #define CONFIG_CMD_DHCP
89 #define CONFIG_CMD_MII
90 #define CONFIG_FEC_MXC
91 #define CONFIG_MII
92 #define IMX_FEC_BASE			ENET_BASE_ADDR
93 #define CONFIG_FEC_XCV_TYPE		RMII
94 #define CONFIG_FEC_MXC_PHYADDR          0
95 #define CONFIG_PHYLIB
96 #define CONFIG_PHY_MICREL
97 
98 /* QSPI Configs*/
99 
100 #ifdef CONFIG_FSL_QSPI
101 #define CONFIG_CMD_SF
102 #define FSL_QSPI_FLASH_SIZE		(1 << 24)
103 #define FSL_QSPI_FLASH_NUM		2
104 #define CONFIG_SYS_FSL_QSPI_LE
105 #endif
106 
107 /* I2C Configs */
108 #define CONFIG_CMD_I2C
109 #define CONFIG_SYS_I2C
110 #define CONFIG_SYS_I2C_MXC
111 #define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
112 #define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
113 #define CONFIG_SYS_SPD_BUS_NUM		0
114 
115 #define CONFIG_BOOTDELAY		3
116 
117 #define CONFIG_SYS_LOAD_ADDR		0x82000000
118 
119 /* We boot from the gfxRAM area of the OCRAM. */
120 #define CONFIG_SYS_TEXT_BASE		0x3f408000
121 #define CONFIG_BOARD_SIZE_LIMIT		524288
122 
123 /*
124  * We do have 128MB of memory on the Vybrid Tower board. Leave the last
125  * 16MB alone to avoid conflicts with Cortex-M4 firmwares running from
126  * DDR3. Hence, limit the memory range for image processing to 112MB
127  * using bootm_size. All of the following must be within this range.
128  * We have the default load at 32MB into DDR (for the kernel), FDT at
129  * 64MB and the ramdisk 512KB above that (allowing for hopefully never
130  * seen large trees). This allows a reasonable split between ramdisk
131  * and kernel size, where the ram disk can be a bit larger.
132  */
133 #define MEM_LAYOUT_ENV_SETTINGS \
134 	"bootm_size=0x07000000\0" \
135 	"loadaddr=0x82000000\0" \
136 	"kernel_addr_r=0x82000000\0" \
137 	"fdt_addr=0x84000000\0" \
138 	"fdt_addr_r=0x84000000\0" \
139 	"rdaddr=0x84080000\0" \
140 	"ramdisk_addr_r=0x84080000\0"
141 
142 #define CONFIG_EXTRA_ENV_SETTINGS \
143 	MEM_LAYOUT_ENV_SETTINGS \
144 	"script=boot.scr\0" \
145 	"image=zImage\0" \
146 	"console=ttyLP1\0" \
147 	"fdt_file=vf610-twr.dtb\0" \
148 	"boot_fdt=try\0" \
149 	"ip_dyn=yes\0" \
150 	"mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
151 	"mmcpart=1\0" \
152 	"mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
153 	"update_sd_firmware_filename=u-boot.imx\0" \
154 	"update_sd_firmware=" \
155 		"if test ${ip_dyn} = yes; then " \
156 			"setenv get_cmd dhcp; " \
157 		"else " \
158 			"setenv get_cmd tftp; " \
159 		"fi; " \
160 		"if mmc dev ${mmcdev}; then "	\
161 			"if ${get_cmd} ${update_sd_firmware_filename}; then " \
162 				"setexpr fw_sz ${filesize} / 0x200; " \
163 				"setexpr fw_sz ${fw_sz} + 1; "	\
164 				"mmc write ${loadaddr} 0x2 ${fw_sz}; " \
165 			"fi; "	\
166 		"fi\0" \
167 	"mmcargs=setenv bootargs console=${console},${baudrate} " \
168 		"root=${mmcroot}\0" \
169 	"loadbootscript=" \
170 		"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
171 	"bootscript=echo Running bootscript from mmc ...; " \
172 		"source\0" \
173 	"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
174 	"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
175 	"mmcboot=echo Booting from mmc ...; " \
176 		"run mmcargs; " \
177 		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
178 			"if run loadfdt; then " \
179 				"bootz ${loadaddr} - ${fdt_addr}; " \
180 			"else " \
181 				"if test ${boot_fdt} = try; then " \
182 					"bootz; " \
183 				"else " \
184 					"echo WARN: Cannot load the DT; " \
185 				"fi; " \
186 			"fi; " \
187 		"else " \
188 			"bootz; " \
189 		"fi;\0" \
190 	"netargs=setenv bootargs console=${console},${baudrate} " \
191 		"root=/dev/nfs " \
192 	"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
193 		"netboot=echo Booting from net ...; " \
194 		"run netargs; " \
195 		"if test ${ip_dyn} = yes; then " \
196 			"setenv get_cmd dhcp; " \
197 		"else " \
198 			"setenv get_cmd tftp; " \
199 		"fi; " \
200 		"${get_cmd} ${image}; " \
201 		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
202 			"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
203 				"bootz ${loadaddr} - ${fdt_addr}; " \
204 			"else " \
205 				"if test ${boot_fdt} = try; then " \
206 					"bootz; " \
207 				"else " \
208 					"echo WARN: Cannot load the DT; " \
209 				"fi; " \
210 			"fi; " \
211 		"else " \
212 			"bootz; " \
213 		"fi;\0"
214 
215 #define CONFIG_BOOTCOMMAND \
216 	   "mmc dev ${mmcdev}; if mmc rescan; then " \
217 		   "if run loadbootscript; then " \
218 			   "run bootscript; " \
219 		   "else " \
220 			   "if run loadimage; then " \
221 				   "run mmcboot; " \
222 			   "else run netboot; " \
223 			   "fi; " \
224 		   "fi; " \
225 	   "else run netboot; fi"
226 
227 /* Miscellaneous configurable options */
228 #define CONFIG_SYS_LONGHELP		/* undef to save memory */
229 #define CONFIG_SYS_HUSH_PARSER		/* use "hush" command parser */
230 #define CONFIG_SYS_PROMPT_HUSH_PS2	"> "
231 #undef CONFIG_AUTO_COMPLETE
232 #define CONFIG_SYS_CBSIZE		256	/* Console I/O Buffer Size */
233 #define CONFIG_SYS_PBSIZE		\
234 			(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
235 #define CONFIG_SYS_MAXARGS		16	/* max number of command args */
236 #define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
237 
238 #define CONFIG_CMD_MEMTEST
239 #define CONFIG_SYS_MEMTEST_START	0x80010000
240 #define CONFIG_SYS_MEMTEST_END		0x87C00000
241 
242 /*
243  * Stack sizes
244  * The stack sizes are set up in start.S using the settings below
245  */
246 #define CONFIG_STACKSIZE		(128 * 1024)	/* regular stack */
247 
248 /* Physical memory map */
249 #define CONFIG_NR_DRAM_BANKS		1
250 #define PHYS_SDRAM			(0x80000000)
251 #define PHYS_SDRAM_SIZE			(128 * 1024 * 1024)
252 
253 #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM
254 #define CONFIG_SYS_INIT_RAM_ADDR	IRAM_BASE_ADDR
255 #define CONFIG_SYS_INIT_RAM_SIZE	IRAM_SIZE
256 
257 #define CONFIG_SYS_INIT_SP_OFFSET \
258 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
259 #define CONFIG_SYS_INIT_SP_ADDR \
260 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
261 
262 /* FLASH and environment organization */
263 #define CONFIG_SYS_NO_FLASH
264 
265 #ifdef CONFIG_ENV_IS_IN_MMC
266 #define CONFIG_ENV_SIZE			(8 * 1024)
267 
268 #define CONFIG_ENV_OFFSET		(12 * 64 * 1024)
269 #define CONFIG_SYS_MMC_ENV_DEV		0
270 #endif
271 
272 #ifdef CONFIG_ENV_IS_IN_NAND
273 #define CONFIG_ENV_SIZE			(64 * 2048)
274 #define CONFIG_ENV_SECT_SIZE		(64 * 2048)
275 #define CONFIG_ENV_RANGE		(512 * 1024)
276 #define CONFIG_ENV_OFFSET		0x180000
277 #endif
278 
279 #define CONFIG_OF_LIBFDT
280 #define CONFIG_CMD_BOOTZ
281 
282 #endif
283