1 /* 2 * Copyright 2013 Freescale Semiconductor, Inc. 3 * 4 * Configuration settings for the Freescale Vybrid vf610twr board. 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #ifndef __CONFIG_H 10 #define __CONFIG_H 11 12 #include <asm/arch/imx-regs.h> 13 14 #define CONFIG_SYS_FSL_CLK 15 16 #define CONFIG_MACH_TYPE 4146 17 18 #define CONFIG_SKIP_LOWLEVEL_INIT 19 20 /* Enable passing of ATAGs */ 21 #define CONFIG_CMDLINE_TAG 22 23 #ifdef CONFIG_CMD_FUSE 24 #define CONFIG_MXC_OCOTP 25 #endif 26 27 /* Size of malloc() pool */ 28 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024) 29 30 /* Allow to overwrite serial and ethaddr */ 31 #define CONFIG_ENV_OVERWRITE 32 33 /* NAND support */ 34 #define CONFIG_SYS_NAND_ONFI_DETECTION 35 36 #ifdef CONFIG_CMD_NAND 37 #define CONFIG_SYS_MAX_NAND_DEVICE 1 38 #define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR 39 40 /* Dynamic MTD partition support */ 41 #define CONFIG_MTD_PARTITIONS 42 #define CONFIG_MTD_DEVICE 43 #define MTDIDS_DEFAULT "nand0=fsl_nfc" 44 #define MTDPARTS_DEFAULT "mtdparts=fsl_nfc:" \ 45 "128k(vf-bcb)ro," \ 46 "1408k(u-boot)ro," \ 47 "512k(u-boot-env)," \ 48 "4m(kernel)," \ 49 "512k(fdt)," \ 50 "-(rootfs)" 51 #endif 52 53 #define CONFIG_FSL_ESDHC 54 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 55 #define CONFIG_SYS_FSL_ESDHC_NUM 1 56 57 #define CONFIG_FEC_MXC 58 #define CONFIG_MII 59 #define IMX_FEC_BASE ENET_BASE_ADDR 60 #define CONFIG_FEC_XCV_TYPE RMII 61 #define CONFIG_FEC_MXC_PHYADDR 0 62 #define CONFIG_PHYLIB 63 #define CONFIG_PHY_MICREL 64 65 /* QSPI Configs*/ 66 67 #ifdef CONFIG_FSL_QSPI 68 #define FSL_QSPI_FLASH_SIZE (1 << 24) 69 #define FSL_QSPI_FLASH_NUM 2 70 #define CONFIG_SYS_FSL_QSPI_LE 71 #endif 72 73 /* I2C Configs */ 74 #define CONFIG_SYS_I2C 75 #define CONFIG_SYS_I2C_MXC 76 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 77 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 78 #define CONFIG_SYS_SPD_BUS_NUM 0 79 80 81 #define CONFIG_SYS_LOAD_ADDR 0x82000000 82 83 /* We boot from the gfxRAM area of the OCRAM. */ 84 #define CONFIG_SYS_TEXT_BASE 0x3f408000 85 #define CONFIG_BOARD_SIZE_LIMIT 524288 86 87 /* 88 * We do have 128MB of memory on the Vybrid Tower board. Leave the last 89 * 16MB alone to avoid conflicts with Cortex-M4 firmwares running from 90 * DDR3. Hence, limit the memory range for image processing to 112MB 91 * using bootm_size. All of the following must be within this range. 92 * We have the default load at 32MB into DDR (for the kernel), FDT at 93 * 64MB and the ramdisk 512KB above that (allowing for hopefully never 94 * seen large trees). This allows a reasonable split between ramdisk 95 * and kernel size, where the ram disk can be a bit larger. 96 */ 97 #define MEM_LAYOUT_ENV_SETTINGS \ 98 "bootm_size=0x07000000\0" \ 99 "loadaddr=0x82000000\0" \ 100 "kernel_addr_r=0x82000000\0" \ 101 "fdt_addr=0x84000000\0" \ 102 "fdt_addr_r=0x84000000\0" \ 103 "rdaddr=0x84080000\0" \ 104 "ramdisk_addr_r=0x84080000\0" 105 106 #define CONFIG_EXTRA_ENV_SETTINGS \ 107 MEM_LAYOUT_ENV_SETTINGS \ 108 "script=boot.scr\0" \ 109 "image=zImage\0" \ 110 "console=ttyLP1\0" \ 111 "fdt_file=vf610-twr.dtb\0" \ 112 "boot_fdt=try\0" \ 113 "ip_dyn=yes\0" \ 114 "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \ 115 "mmcpart=1\0" \ 116 "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \ 117 "update_sd_firmware_filename=u-boot.imx\0" \ 118 "update_sd_firmware=" \ 119 "if test ${ip_dyn} = yes; then " \ 120 "setenv get_cmd dhcp; " \ 121 "else " \ 122 "setenv get_cmd tftp; " \ 123 "fi; " \ 124 "if mmc dev ${mmcdev}; then " \ 125 "if ${get_cmd} ${update_sd_firmware_filename}; then " \ 126 "setexpr fw_sz ${filesize} / 0x200; " \ 127 "setexpr fw_sz ${fw_sz} + 1; " \ 128 "mmc write ${loadaddr} 0x2 ${fw_sz}; " \ 129 "fi; " \ 130 "fi\0" \ 131 "mmcargs=setenv bootargs console=${console},${baudrate} " \ 132 "root=${mmcroot}\0" \ 133 "loadbootscript=" \ 134 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 135 "bootscript=echo Running bootscript from mmc ...; " \ 136 "source\0" \ 137 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ 138 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ 139 "mmcboot=echo Booting from mmc ...; " \ 140 "run mmcargs; " \ 141 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 142 "if run loadfdt; then " \ 143 "bootz ${loadaddr} - ${fdt_addr}; " \ 144 "else " \ 145 "if test ${boot_fdt} = try; then " \ 146 "bootz; " \ 147 "else " \ 148 "echo WARN: Cannot load the DT; " \ 149 "fi; " \ 150 "fi; " \ 151 "else " \ 152 "bootz; " \ 153 "fi;\0" \ 154 "netargs=setenv bootargs console=${console},${baudrate} " \ 155 "root=/dev/nfs " \ 156 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 157 "netboot=echo Booting from net ...; " \ 158 "run netargs; " \ 159 "if test ${ip_dyn} = yes; then " \ 160 "setenv get_cmd dhcp; " \ 161 "else " \ 162 "setenv get_cmd tftp; " \ 163 "fi; " \ 164 "${get_cmd} ${image}; " \ 165 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 166 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ 167 "bootz ${loadaddr} - ${fdt_addr}; " \ 168 "else " \ 169 "if test ${boot_fdt} = try; then " \ 170 "bootz; " \ 171 "else " \ 172 "echo WARN: Cannot load the DT; " \ 173 "fi; " \ 174 "fi; " \ 175 "else " \ 176 "bootz; " \ 177 "fi;\0" 178 179 #define CONFIG_BOOTCOMMAND \ 180 "mmc dev ${mmcdev}; if mmc rescan; then " \ 181 "if run loadbootscript; then " \ 182 "run bootscript; " \ 183 "else " \ 184 "if run loadimage; then " \ 185 "run mmcboot; " \ 186 "else run netboot; " \ 187 "fi; " \ 188 "fi; " \ 189 "else run netboot; fi" 190 191 /* Miscellaneous configurable options */ 192 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 193 #undef CONFIG_AUTO_COMPLETE 194 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 195 #define CONFIG_SYS_PBSIZE \ 196 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 197 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 198 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 199 200 #define CONFIG_SYS_MEMTEST_START 0x80010000 201 #define CONFIG_SYS_MEMTEST_END 0x87C00000 202 203 /* Physical memory map */ 204 #define CONFIG_NR_DRAM_BANKS 1 205 #define PHYS_SDRAM (0x80000000) 206 #define PHYS_SDRAM_SIZE (128 * 1024 * 1024) 207 208 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 209 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 210 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 211 212 #define CONFIG_SYS_INIT_SP_OFFSET \ 213 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 214 #define CONFIG_SYS_INIT_SP_ADDR \ 215 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 216 217 #ifdef CONFIG_ENV_IS_IN_MMC 218 #define CONFIG_ENV_SIZE (8 * 1024) 219 220 #define CONFIG_ENV_OFFSET (12 * 64 * 1024) 221 #define CONFIG_SYS_MMC_ENV_DEV 0 222 #endif 223 224 #ifdef CONFIG_ENV_IS_IN_NAND 225 #define CONFIG_ENV_SIZE (64 * 2048) 226 #define CONFIG_ENV_SECT_SIZE (64 * 2048) 227 #define CONFIG_ENV_RANGE (512 * 1024) 228 #define CONFIG_ENV_OFFSET 0x180000 229 #endif 230 231 #endif 232