1 /* 2 * Configuration for Versatile Express. Parts were derived from other ARM 3 * configurations. 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8 #ifndef __VEXPRESS_AEMV8A_H 9 #define __VEXPRESS_AEMV8A_H 10 11 #ifdef CONFIG_TARGET_VEXPRESS64_BASE_FVP 12 #ifndef CONFIG_SEMIHOSTING 13 #error CONFIG_TARGET_VEXPRESS64_BASE_FVP requires CONFIG_SEMIHOSTING 14 #endif 15 #define CONFIG_ARMV8_SWITCH_TO_EL1 16 #endif 17 18 #define CONFIG_REMAKE_ELF 19 20 #define CONFIG_SUPPORT_RAW_INITRD 21 22 /* Cache Definitions */ 23 #define CONFIG_SYS_DCACHE_OFF 24 #define CONFIG_SYS_ICACHE_OFF 25 26 #define CONFIG_IDENT_STRING " vexpress_aemv8a" 27 #define CONFIG_BOOTP_VCI_STRING "U-boot.armv8.vexpress_aemv8a" 28 29 /* Link Definitions */ 30 #if defined(CONFIG_TARGET_VEXPRESS64_BASE_FVP) || \ 31 defined(CONFIG_TARGET_VEXPRESS64_BASE_FVP_DRAM) 32 /* ATF loads u-boot here for BASE_FVP model */ 33 #define CONFIG_SYS_TEXT_BASE 0x88000000 34 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x03f00000) 35 #elif CONFIG_TARGET_VEXPRESS64_JUNO 36 #define CONFIG_SYS_TEXT_BASE 0xe0000000 37 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0) 38 #endif 39 40 #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ 41 42 /* Flat Device Tree Definitions */ 43 #define CONFIG_OF_LIBFDT 44 45 /* CS register bases for the original memory map. */ 46 #define V2M_PA_CS0 0x00000000 47 #define V2M_PA_CS1 0x14000000 48 #define V2M_PA_CS2 0x18000000 49 #define V2M_PA_CS3 0x1c000000 50 #define V2M_PA_CS4 0x0c000000 51 #define V2M_PA_CS5 0x10000000 52 53 #define V2M_PERIPH_OFFSET(x) (x << 16) 54 #define V2M_SYSREGS (V2M_PA_CS3 + V2M_PERIPH_OFFSET(1)) 55 #define V2M_SYSCTL (V2M_PA_CS3 + V2M_PERIPH_OFFSET(2)) 56 #define V2M_SERIAL_BUS_PCI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(3)) 57 58 #define V2M_BASE 0x80000000 59 60 /* Common peripherals relative to CS7. */ 61 #define V2M_AACI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(4)) 62 #define V2M_MMCI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(5)) 63 #define V2M_KMI0 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(6)) 64 #define V2M_KMI1 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(7)) 65 66 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO 67 #define V2M_UART0 0x7ff80000 68 #define V2M_UART1 0x7ff70000 69 #else /* Not Juno */ 70 #define V2M_UART0 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(9)) 71 #define V2M_UART1 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(10)) 72 #define V2M_UART2 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(11)) 73 #define V2M_UART3 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(12)) 74 #endif 75 76 #define V2M_WDT (V2M_PA_CS3 + V2M_PERIPH_OFFSET(15)) 77 78 #define V2M_TIMER01 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(17)) 79 #define V2M_TIMER23 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(18)) 80 81 #define V2M_SERIAL_BUS_DVI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(22)) 82 #define V2M_RTC (V2M_PA_CS3 + V2M_PERIPH_OFFSET(23)) 83 84 #define V2M_CF (V2M_PA_CS3 + V2M_PERIPH_OFFSET(26)) 85 86 #define V2M_CLCD (V2M_PA_CS3 + V2M_PERIPH_OFFSET(31)) 87 88 /* System register offsets. */ 89 #define V2M_SYS_CFGDATA (V2M_SYSREGS + 0x0a0) 90 #define V2M_SYS_CFGCTRL (V2M_SYSREGS + 0x0a4) 91 #define V2M_SYS_CFGSTAT (V2M_SYSREGS + 0x0a8) 92 93 /* Generic Timer Definitions */ 94 #define COUNTER_FREQUENCY (0x1800000) /* 24MHz */ 95 96 /* Generic Interrupt Controller Definitions */ 97 #ifdef CONFIG_GICV3 98 #define GICD_BASE (0x2f000000) 99 #define GICR_BASE (0x2f100000) 100 #else 101 102 #if defined(CONFIG_TARGET_VEXPRESS64_BASE_FVP) || \ 103 defined(CONFIG_TARGET_VEXPRESS64_BASE_FVP_DRAM) 104 #define GICD_BASE (0x2f000000) 105 #define GICC_BASE (0x2c000000) 106 #elif CONFIG_TARGET_VEXPRESS64_JUNO 107 #define GICD_BASE (0x2C010000) 108 #define GICC_BASE (0x2C02f000) 109 #endif 110 #endif /* !CONFIG_GICV3 */ 111 112 /* Size of malloc() pool */ 113 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (8 << 20)) 114 115 /* Ethernet Configuration */ 116 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO 117 /* The real hardware Versatile express uses SMSC9118 */ 118 #define CONFIG_SMC911X 1 119 #define CONFIG_SMC911X_32_BIT 1 120 #define CONFIG_SMC911X_BASE (0x018000000) 121 #else 122 /* The Vexpress64 simulators use SMSC91C111 */ 123 #define CONFIG_SMC91111 1 124 #define CONFIG_SMC91111_BASE (0x01A000000) 125 #endif 126 127 /* PL011 Serial Configuration */ 128 #define CONFIG_BAUDRATE 115200 129 #define CONFIG_CONS_INDEX 0 130 #define CONFIG_PL01X_SERIAL 131 #define CONFIG_PL011_SERIAL 132 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO 133 #define CONFIG_PL011_CLOCK 7273800 134 #else 135 #define CONFIG_PL011_CLOCK 24000000 136 #endif 137 138 /* Command line configuration */ 139 #define CONFIG_MENU 140 /*#define CONFIG_MENU_SHOW*/ 141 #define CONFIG_CMD_CACHE 142 #define CONFIG_CMD_BOOTI 143 #define CONFIG_CMD_UNZIP 144 #define CONFIG_CMD_DHCP 145 #define CONFIG_CMD_PXE 146 #define CONFIG_CMD_ENV 147 #define CONFIG_CMD_MII 148 #define CONFIG_CMD_PING 149 #define CONFIG_CMD_FAT 150 #define CONFIG_DOS_PARTITION 151 152 /* BOOTP options */ 153 #define CONFIG_BOOTP_BOOTFILESIZE 154 #define CONFIG_BOOTP_BOOTPATH 155 #define CONFIG_BOOTP_GATEWAY 156 #define CONFIG_BOOTP_HOSTNAME 157 #define CONFIG_BOOTP_PXE 158 #define CONFIG_BOOTP_PXE_CLIENTARCH 0x100 159 160 /* Miscellaneous configurable options */ 161 #define CONFIG_SYS_LOAD_ADDR (V2M_BASE + 0x10000000) 162 163 /* Physical Memory Map */ 164 #define PHYS_SDRAM_1 (V2M_BASE) /* SDRAM Bank #1 */ 165 /* Top 16MB reserved for secure world use */ 166 #define DRAM_SEC_SIZE 0x01000000 167 #define PHYS_SDRAM_1_SIZE 0x80000000 - DRAM_SEC_SIZE 168 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 169 170 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO 171 #define CONFIG_NR_DRAM_BANKS 2 172 #define PHYS_SDRAM_2 (0x880000000) 173 #define PHYS_SDRAM_2_SIZE 0x180000000 174 #else 175 #define CONFIG_NR_DRAM_BANKS 1 176 #endif 177 178 /* Enable memtest */ 179 #define CONFIG_CMD_MEMTEST 180 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1 181 #define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE) 182 183 /* Initial environment variables */ 184 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO 185 /* 186 * Defines where the kernel and FDT exist in NOR flash and where it will 187 * be copied into DRAM 188 */ 189 #define CONFIG_EXTRA_ENV_SETTINGS \ 190 "kernel_name=norkern\0" \ 191 "kernel_alt_name=Image\0" \ 192 "kernel_addr=0x80080000\0" \ 193 "initrd_name=ramdisk.img\0" \ 194 "initrd_addr=0x84000000\0" \ 195 "fdt_name=board.dtb\0" \ 196 "fdt_alt_name=juno\0" \ 197 "fdt_addr=0x83000000\0" \ 198 "fdt_high=0xffffffffffffffff\0" \ 199 "initrd_high=0xffffffffffffffff\0" \ 200 201 /* Assume we boot with root on the first partition of a USB stick */ 202 #define CONFIG_BOOTARGS "console=ttyAMA0,115200n8 " \ 203 "root=/dev/sda2 rw " \ 204 "rootwait "\ 205 "earlyprintk=pl011,0x7ff80000 debug "\ 206 "user_debug=31 "\ 207 "androidboot.hardware=juno "\ 208 "loglevel=9" 209 210 /* Copy the kernel and FDT to DRAM memory and boot */ 211 #define CONFIG_BOOTCOMMAND "afs load ${kernel_name} ${kernel_addr} ; " \ 212 "if test $? -eq 1; then "\ 213 " echo Loading ${kernel_alt_name} instead of "\ 214 "${kernel_name}; "\ 215 " afs load ${kernel_alt_name} ${kernel_addr};"\ 216 "fi ; "\ 217 "afs load ${fdt_name} ${fdt_addr} ; " \ 218 "if test $? -eq 1; then "\ 219 " echo Loading ${fdt_alt_name} instead of "\ 220 "${fdt_name}; "\ 221 " afs load ${fdt_alt_name} ${fdt_addr}; "\ 222 "fi ; "\ 223 "fdt addr ${fdt_addr}; fdt resize; " \ 224 "if afs load ${initrd_name} ${initrd_addr} ; "\ 225 "then "\ 226 " setenv initrd_param ${initrd_addr}; "\ 227 " else setenv initrd_param -; "\ 228 "fi ; " \ 229 "booti ${kernel_addr} ${initrd_param} ${fdt_addr}" 230 231 #define CONFIG_BOOTDELAY 1 232 233 #elif CONFIG_TARGET_VEXPRESS64_BASE_FVP 234 #define CONFIG_EXTRA_ENV_SETTINGS \ 235 "kernel_name=Image\0" \ 236 "kernel_addr=0x80080000\0" \ 237 "initrd_name=ramdisk.img\0" \ 238 "initrd_addr=0x88000000\0" \ 239 "fdt_name=devtree.dtb\0" \ 240 "fdt_addr=0x83000000\0" \ 241 "fdt_high=0xffffffffffffffff\0" \ 242 "initrd_high=0xffffffffffffffff\0" 243 244 #define CONFIG_BOOTARGS "console=ttyAMA0 earlyprintk=pl011,"\ 245 "0x1c090000 debug user_debug=31 "\ 246 "loglevel=9" 247 248 #define CONFIG_BOOTCOMMAND "smhload ${kernel_name} ${kernel_addr}; " \ 249 "smhload ${fdt_name} ${fdt_addr}; " \ 250 "smhload ${initrd_name} ${initrd_addr} "\ 251 "initrd_end; " \ 252 "fdt addr ${fdt_addr}; fdt resize; " \ 253 "fdt chosen ${initrd_addr} ${initrd_end}; " \ 254 "booti $kernel_addr - $fdt_addr" 255 256 #define CONFIG_BOOTDELAY 1 257 258 #elif CONFIG_TARGET_VEXPRESS64_BASE_FVP_DRAM 259 #define CONFIG_EXTRA_ENV_SETTINGS \ 260 "kernel_addr=0x80080000\0" \ 261 "initrd_addr=0x84000000\0" \ 262 "fdt_addr=0x83000000\0" \ 263 "fdt_high=0xffffffffffffffff\0" \ 264 "initrd_high=0xffffffffffffffff\0" 265 266 #define CONFIG_BOOTARGS "console=ttyAMA0 earlyprintk=pl011,"\ 267 "0x1c090000 debug user_debug=31 "\ 268 "androidboot.hardware=fvpbase "\ 269 "root=/dev/vda2 rw "\ 270 "rootwait "\ 271 "loglevel=9" 272 273 #define CONFIG_BOOTCOMMAND "booti $kernel_addr $initrd_addr $fdt_addr" 274 275 #define CONFIG_BOOTDELAY 1 276 277 #endif 278 279 /* Monitor Command Prompt */ 280 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ 281 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 282 sizeof(CONFIG_SYS_PROMPT) + 16) 283 #define CONFIG_SYS_HUSH_PARSER 284 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 285 #define CONFIG_SYS_LONGHELP 286 #define CONFIG_CMDLINE_EDITING 287 #define CONFIG_SYS_MAXARGS 64 /* max command args */ 288 289 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO 290 #define CONFIG_SYS_FLASH_BASE 0x08000000 291 /* 255 x 256KiB sectors + 4 x 64KiB sectors at the end = 259 */ 292 #define CONFIG_SYS_MAX_FLASH_SECT 259 293 /* Store environment at top of flash in the same location as blank.img */ 294 /* in the Juno firmware. */ 295 #define CONFIG_ENV_ADDR 0x0BFC0000 296 #define CONFIG_ENV_SECT_SIZE 0x00010000 297 #else 298 #define CONFIG_SYS_FLASH_BASE 0x0C000000 299 /* 256 x 256KiB sectors */ 300 #define CONFIG_SYS_MAX_FLASH_SECT 256 301 /* Store environment at top of flash */ 302 #define CONFIG_ENV_ADDR 0x0FFC0000 303 #define CONFIG_ENV_SECT_SIZE 0x00040000 304 #endif 305 306 #define CONFIG_CMD_ARMFLASH 307 #define CONFIG_SYS_FLASH_CFI 1 308 #define CONFIG_FLASH_CFI_DRIVER 1 309 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_32BIT 310 #define CONFIG_SYS_MAX_FLASH_BANKS 1 311 312 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* use buffered writes */ 313 #define CONFIG_SYS_FLASH_PROTECTION /* The devices have real protection */ 314 #define CONFIG_SYS_FLASH_EMPTY_INFO /* flinfo indicates empty blocks */ 315 #define FLASH_MAX_SECTOR_SIZE 0x00040000 316 #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE 317 #define CONFIG_ENV_IS_IN_FLASH 1 318 319 320 #endif /* __VEXPRESS_AEMV8A_H */ 321