1 /*
2  * Configuration for Versatile Express. Parts were derived from other ARM
3  *   configurations.
4  *
5  * SPDX-License-Identifier:	GPL-2.0+
6  */
7 
8 #ifndef __VEXPRESS_AEMV8A_H
9 #define __VEXPRESS_AEMV8A_H
10 
11 #define DEBUG
12 
13 #ifdef CONFIG_BASE_FVP
14 #ifndef CONFIG_SEMIHOSTING
15 #error CONFIG_BASE_FVP requires CONFIG_SEMIHOSTING
16 #endif
17 #define CONFIG_BOARD_LATE_INIT
18 #define CONFIG_ARMV8_SWITCH_TO_EL1
19 #endif
20 
21 #define CONFIG_REMAKE_ELF
22 
23 #ifndef CONFIG_BASE_FVP
24 /* Base FVP not using GICv3 yet */
25 #define CONFIG_GICV3
26 #endif
27 
28 /*#define CONFIG_ARMV8_SWITCH_TO_EL1*/
29 
30 /*#define CONFIG_SYS_GENERIC_BOARD*/
31 
32 #define CONFIG_SYS_NO_FLASH
33 
34 #define CONFIG_SUPPORT_RAW_INITRD
35 
36 /* Cache Definitions */
37 #define CONFIG_SYS_DCACHE_OFF
38 #define CONFIG_SYS_ICACHE_OFF
39 
40 #define CONFIG_IDENT_STRING		" vexpress_aemv8a"
41 #define CONFIG_BOOTP_VCI_STRING		"U-boot.armv8.vexpress_aemv8a"
42 
43 /* Link Definitions */
44 #ifdef CONFIG_BASE_FVP
45 /* ATF loads u-boot here for BASE_FVP model */
46 #define CONFIG_SYS_TEXT_BASE		0x88000000
47 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_SDRAM_BASE + 0x03f00000)
48 #else
49 #define CONFIG_SYS_TEXT_BASE		0x80000000
50 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
51 #endif
52 
53 /* Flat Device Tree Definitions */
54 #define CONFIG_OF_LIBFDT
55 
56 #define CONFIG_DEFAULT_DEVICE_TREE	vexpress64
57 
58 /* SMP Spin Table Definitions */
59 #ifdef CONFIG_BASE_FVP
60 #define CPU_RELEASE_ADDR		(CONFIG_SYS_SDRAM_BASE + 0x03f00000)
61 #else
62 #define CPU_RELEASE_ADDR		(CONFIG_SYS_SDRAM_BASE + 0x7fff0)
63 #endif
64 
65 /* CS register bases for the original memory map. */
66 #define V2M_PA_CS0			0x00000000
67 #define V2M_PA_CS1			0x14000000
68 #define V2M_PA_CS2			0x18000000
69 #define V2M_PA_CS3			0x1c000000
70 #define V2M_PA_CS4			0x0c000000
71 #define V2M_PA_CS5			0x10000000
72 
73 #define V2M_PERIPH_OFFSET(x)		(x << 16)
74 #define V2M_SYSREGS			(V2M_PA_CS3 + V2M_PERIPH_OFFSET(1))
75 #define V2M_SYSCTL			(V2M_PA_CS3 + V2M_PERIPH_OFFSET(2))
76 #define V2M_SERIAL_BUS_PCI		(V2M_PA_CS3 + V2M_PERIPH_OFFSET(3))
77 
78 #define V2M_BASE			0x80000000
79 
80 /*
81  * Physical addresses, offset from V2M_PA_CS0-3
82  */
83 #define V2M_NOR0			(V2M_PA_CS0)
84 #define V2M_NOR1			(V2M_PA_CS4)
85 #define V2M_SRAM			(V2M_PA_CS1)
86 
87 /* Common peripherals relative to CS7. */
88 #define V2M_AACI			(V2M_PA_CS3 + V2M_PERIPH_OFFSET(4))
89 #define V2M_MMCI			(V2M_PA_CS3 + V2M_PERIPH_OFFSET(5))
90 #define V2M_KMI0			(V2M_PA_CS3 + V2M_PERIPH_OFFSET(6))
91 #define V2M_KMI1			(V2M_PA_CS3 + V2M_PERIPH_OFFSET(7))
92 
93 #define V2M_UART0			(V2M_PA_CS3 + V2M_PERIPH_OFFSET(9))
94 #define V2M_UART1			(V2M_PA_CS3 + V2M_PERIPH_OFFSET(10))
95 #define V2M_UART2			(V2M_PA_CS3 + V2M_PERIPH_OFFSET(11))
96 #define V2M_UART3			(V2M_PA_CS3 + V2M_PERIPH_OFFSET(12))
97 
98 #define V2M_WDT				(V2M_PA_CS3 + V2M_PERIPH_OFFSET(15))
99 
100 #define V2M_TIMER01			(V2M_PA_CS3 + V2M_PERIPH_OFFSET(17))
101 #define V2M_TIMER23			(V2M_PA_CS3 + V2M_PERIPH_OFFSET(18))
102 
103 #define V2M_SERIAL_BUS_DVI		(V2M_PA_CS3 + V2M_PERIPH_OFFSET(22))
104 #define V2M_RTC				(V2M_PA_CS3 + V2M_PERIPH_OFFSET(23))
105 
106 #define V2M_CF				(V2M_PA_CS3 + V2M_PERIPH_OFFSET(26))
107 
108 #define V2M_CLCD			(V2M_PA_CS3 + V2M_PERIPH_OFFSET(31))
109 
110 /* System register offsets. */
111 #define V2M_SYS_CFGDATA			(V2M_SYSREGS + 0x0a0)
112 #define V2M_SYS_CFGCTRL			(V2M_SYSREGS + 0x0a4)
113 #define V2M_SYS_CFGSTAT			(V2M_SYSREGS + 0x0a8)
114 
115 /* Generic Timer Definitions */
116 #define COUNTER_FREQUENCY		(0x1800000)	/* 24MHz */
117 
118 /* Generic Interrupt Controller Definitions */
119 #ifdef CONFIG_GICV3
120 #define GICD_BASE			(0x2f000000)
121 #define GICR_BASE			(0x2f100000)
122 #else
123 
124 #ifdef CONFIG_BASE_FVP
125 #define GICD_BASE			(0x2f000000)
126 #define GICC_BASE			(0x2c000000)
127 #else
128 #define GICD_BASE			(0x2C001000)
129 #define GICC_BASE			(0x2C002000)
130 #endif
131 #endif
132 
133 #define CONFIG_SYS_MEMTEST_START	V2M_BASE
134 #define CONFIG_SYS_MEMTEST_END		(V2M_BASE + 0x80000000)
135 
136 /* Size of malloc() pool */
137 #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 128 * 1024)
138 
139 /* SMSC91C111 Ethernet Configuration */
140 #define CONFIG_SMC91111			1
141 #define CONFIG_SMC91111_BASE		(0x01A000000)
142 
143 /* PL011 Serial Configuration */
144 #define CONFIG_PL011_SERIAL
145 #define CONFIG_PL011_CLOCK		24000000
146 #define CONFIG_PL01x_PORTS		{(void *)CONFIG_SYS_SERIAL0, \
147 					 (void *)CONFIG_SYS_SERIAL1}
148 #define CONFIG_CONS_INDEX		0
149 
150 #define CONFIG_BAUDRATE			115200
151 #define CONFIG_SYS_SERIAL0		V2M_UART0
152 #define CONFIG_SYS_SERIAL1		V2M_UART1
153 
154 /* Command line configuration */
155 #define CONFIG_MENU
156 /*#define CONFIG_MENU_SHOW*/
157 #define CONFIG_CMD_CACHE
158 #define CONFIG_CMD_BDI
159 #define CONFIG_CMD_DHCP
160 #define CONFIG_CMD_PXE
161 #define CONFIG_CMD_ENV
162 #define CONFIG_CMD_FLASH
163 #define CONFIG_CMD_IMI
164 #define CONFIG_CMD_MEMORY
165 #define CONFIG_CMD_MII
166 #define CONFIG_CMD_NET
167 #define CONFIG_CMD_PING
168 #define CONFIG_CMD_SAVEENV
169 #define CONFIG_CMD_RUN
170 #define CONFIG_CMD_BOOTD
171 #define CONFIG_CMD_ECHO
172 #define CONFIG_CMD_SOURCE
173 #define CONFIG_CMD_FAT
174 #define CONFIG_DOS_PARTITION
175 
176 /* BOOTP options */
177 #define CONFIG_BOOTP_BOOTFILESIZE
178 #define CONFIG_BOOTP_BOOTPATH
179 #define CONFIG_BOOTP_GATEWAY
180 #define CONFIG_BOOTP_HOSTNAME
181 #define CONFIG_BOOTP_PXE
182 #define CONFIG_BOOTP_PXE_CLIENTARCH	0x100
183 
184 /* Miscellaneous configurable options */
185 #define CONFIG_SYS_LOAD_ADDR		(V2M_BASE + 0x10000000)
186 
187 /* Physical Memory Map */
188 #define CONFIG_NR_DRAM_BANKS		1
189 #define PHYS_SDRAM_1			(V2M_BASE)	/* SDRAM Bank #1 */
190 #define PHYS_SDRAM_1_SIZE		0x80000000	/* 2048 MB */
191 #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
192 
193 /* Initial environment variables */
194 #ifdef CONFIG_BASE_FVP
195 #define CONFIG_EXTRA_ENV_SETTINGS	\
196 				"kernel_name=uImage\0"	\
197 				"kernel_addr_r=0x80000000\0"	\
198 				"initrd_name=ramdisk.img\0"	\
199 				"initrd_addr_r=0x88000000\0"	\
200 				"fdt_name=devtree.dtb\0"		\
201 				"fdt_addr_r=0x83000000\0"		\
202 				"fdt_high=0xffffffffffffffff\0"	\
203 				"initrd_high=0xffffffffffffffff\0"
204 
205 #define CONFIG_BOOTARGS		"console=ttyAMA0 earlyprintk=pl011,"\
206 				"0x1c090000 debug user_debug=31 "\
207 				"loglevel=9"
208 
209 #define CONFIG_BOOTCOMMAND	"fdt addr $fdt_addr_r; fdt resize; " \
210 				"fdt chosen $initrd_addr_r $initrd_end; " \
211 				"bootm $kernel_addr_r - $fdt_addr_r"
212 
213 #define CONFIG_BOOTDELAY		1
214 
215 #else
216 
217 #define CONFIG_EXTRA_ENV_SETTINGS	\
218 					"kernel_addr_r=0x200000\0"	\
219 					"initrd_addr_r=0xa00000\0"	\
220 					"initrd_size=0x2000000\0"	\
221 					"fdt_addr_r=0x100000\0"		\
222 					"fdt_high=0xa0000000\0"
223 
224 #define CONFIG_BOOTARGS			"console=ttyAMA0 root=/dev/ram0"
225 #define CONFIG_BOOTCOMMAND		"bootm $kernel_addr_r " \
226 					"$initrd_addr_r:$initrd_size $fdt_addr_r"
227 #define CONFIG_BOOTDELAY		-1
228 #endif
229 
230 /* Do not preserve environment */
231 #define CONFIG_ENV_IS_NOWHERE		1
232 #define CONFIG_ENV_SIZE			0x1000
233 
234 /* Monitor Command Prompt */
235 #define CONFIG_SYS_CBSIZE		512	/* Console I/O Buffer Size */
236 #define CONFIG_SYS_PROMPT		"VExpress64# "
237 #define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
238 					sizeof(CONFIG_SYS_PROMPT) + 16)
239 #define CONFIG_SYS_HUSH_PARSER
240 #define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
241 #define CONFIG_SYS_LONGHELP
242 #define CONFIG_CMDLINE_EDITING		1
243 #define CONFIG_SYS_MAXARGS		64	/* max command args */
244 
245 #endif /* __VEXPRESS_AEMV8A_H */
246