1 /* 2 * Configuration for Versatile Express. Parts were derived from other ARM 3 * configurations. 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8 #ifndef __VEXPRESS_AEMV8A_H 9 #define __VEXPRESS_AEMV8A_H 10 11 /* We use generic board and device manager for v8 Versatile Express */ 12 #define CONFIG_SYS_GENERIC_BOARD 13 #define CONFIG_DM 14 15 #ifdef CONFIG_TARGET_VEXPRESS64_BASE_FVP 16 #ifndef CONFIG_SEMIHOSTING 17 #error CONFIG_TARGET_VEXPRESS64_BASE_FVP requires CONFIG_SEMIHOSTING 18 #endif 19 #define CONFIG_ARMV8_SWITCH_TO_EL1 20 #endif 21 22 #define CONFIG_REMAKE_ELF 23 24 #define CONFIG_SUPPORT_RAW_INITRD 25 26 /* Cache Definitions */ 27 #define CONFIG_SYS_DCACHE_OFF 28 #define CONFIG_SYS_ICACHE_OFF 29 30 #define CONFIG_IDENT_STRING " vexpress_aemv8a" 31 #define CONFIG_BOOTP_VCI_STRING "U-boot.armv8.vexpress_aemv8a" 32 33 /* Link Definitions */ 34 #ifdef CONFIG_TARGET_VEXPRESS64_BASE_FVP 35 /* ATF loads u-boot here for BASE_FVP model */ 36 #define CONFIG_SYS_TEXT_BASE 0x88000000 37 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x03f00000) 38 #elif CONFIG_TARGET_VEXPRESS64_JUNO 39 #define CONFIG_SYS_TEXT_BASE 0xe0000000 40 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0) 41 #else 42 #error "Unknown board variant" 43 #endif 44 45 /* Flat Device Tree Definitions */ 46 #define CONFIG_OF_LIBFDT 47 48 /* CS register bases for the original memory map. */ 49 #define V2M_PA_CS0 0x00000000 50 #define V2M_PA_CS1 0x14000000 51 #define V2M_PA_CS2 0x18000000 52 #define V2M_PA_CS3 0x1c000000 53 #define V2M_PA_CS4 0x0c000000 54 #define V2M_PA_CS5 0x10000000 55 56 #define V2M_PERIPH_OFFSET(x) (x << 16) 57 #define V2M_SYSREGS (V2M_PA_CS3 + V2M_PERIPH_OFFSET(1)) 58 #define V2M_SYSCTL (V2M_PA_CS3 + V2M_PERIPH_OFFSET(2)) 59 #define V2M_SERIAL_BUS_PCI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(3)) 60 61 #define V2M_BASE 0x80000000 62 63 /* Common peripherals relative to CS7. */ 64 #define V2M_AACI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(4)) 65 #define V2M_MMCI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(5)) 66 #define V2M_KMI0 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(6)) 67 #define V2M_KMI1 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(7)) 68 69 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO 70 #define V2M_UART0 0x7ff80000 71 #define V2M_UART1 0x7ff70000 72 #else /* Not Juno */ 73 #define V2M_UART0 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(9)) 74 #define V2M_UART1 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(10)) 75 #define V2M_UART2 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(11)) 76 #define V2M_UART3 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(12)) 77 #endif 78 79 #define V2M_WDT (V2M_PA_CS3 + V2M_PERIPH_OFFSET(15)) 80 81 #define V2M_TIMER01 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(17)) 82 #define V2M_TIMER23 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(18)) 83 84 #define V2M_SERIAL_BUS_DVI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(22)) 85 #define V2M_RTC (V2M_PA_CS3 + V2M_PERIPH_OFFSET(23)) 86 87 #define V2M_CF (V2M_PA_CS3 + V2M_PERIPH_OFFSET(26)) 88 89 #define V2M_CLCD (V2M_PA_CS3 + V2M_PERIPH_OFFSET(31)) 90 91 /* System register offsets. */ 92 #define V2M_SYS_CFGDATA (V2M_SYSREGS + 0x0a0) 93 #define V2M_SYS_CFGCTRL (V2M_SYSREGS + 0x0a4) 94 #define V2M_SYS_CFGSTAT (V2M_SYSREGS + 0x0a8) 95 96 /* Generic Timer Definitions */ 97 #define COUNTER_FREQUENCY (0x1800000) /* 24MHz */ 98 99 /* Generic Interrupt Controller Definitions */ 100 #ifdef CONFIG_GICV3 101 #define GICD_BASE (0x2f000000) 102 #define GICR_BASE (0x2f100000) 103 #else 104 105 #ifdef CONFIG_TARGET_VEXPRESS64_BASE_FVP 106 #define GICD_BASE (0x2f000000) 107 #define GICC_BASE (0x2c000000) 108 #elif CONFIG_TARGET_VEXPRESS64_JUNO 109 #define GICD_BASE (0x2C010000) 110 #define GICC_BASE (0x2C02f000) 111 #else 112 #error "Unknown board variant" 113 #endif 114 #endif /* !CONFIG_GICV3 */ 115 116 /* Size of malloc() pool */ 117 #define CONFIG_SYS_MALLOC_F_LEN 0x2000 118 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (8 << 20)) 119 120 /* Ethernet Configuration */ 121 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO 122 /* The real hardware Versatile express uses SMSC9118 */ 123 #define CONFIG_SMC911X 1 124 #define CONFIG_SMC911X_32_BIT 1 125 #define CONFIG_SMC911X_BASE (0x018000000) 126 #else 127 /* The Vexpress64 simulators use SMSC91C111 */ 128 #define CONFIG_SMC91111 1 129 #define CONFIG_SMC91111_BASE (0x01A000000) 130 #endif 131 132 /* PL011 Serial Configuration */ 133 #define CONFIG_DM_SERIAL 134 #define CONFIG_BAUDRATE 115200 135 #define CONFIG_CONS_INDEX 0 136 #define CONFIG_PL01X_SERIAL 137 #define CONFIG_PL011_SERIAL 138 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO 139 #define CONFIG_PL011_CLOCK 7273800 140 #else 141 #define CONFIG_PL011_CLOCK 24000000 142 #endif 143 144 /* Command line configuration */ 145 #define CONFIG_MENU 146 /*#define CONFIG_MENU_SHOW*/ 147 #define CONFIG_CMD_CACHE 148 #define CONFIG_CMD_BDI 149 #define CONFIG_CMD_BOOTI 150 #define CONFIG_CMD_UNZIP 151 #define CONFIG_CMD_DHCP 152 #define CONFIG_CMD_PXE 153 #define CONFIG_CMD_ENV 154 #define CONFIG_CMD_IMI 155 #define CONFIG_CMD_LOADB 156 #define CONFIG_CMD_MEMORY 157 #define CONFIG_CMD_MII 158 #define CONFIG_CMD_PING 159 #define CONFIG_CMD_SAVEENV 160 #define CONFIG_CMD_RUN 161 #define CONFIG_CMD_BOOTD 162 #define CONFIG_CMD_ECHO 163 #define CONFIG_CMD_SOURCE 164 #define CONFIG_CMD_FAT 165 #define CONFIG_DOS_PARTITION 166 167 /* BOOTP options */ 168 #define CONFIG_BOOTP_BOOTFILESIZE 169 #define CONFIG_BOOTP_BOOTPATH 170 #define CONFIG_BOOTP_GATEWAY 171 #define CONFIG_BOOTP_HOSTNAME 172 #define CONFIG_BOOTP_PXE 173 #define CONFIG_BOOTP_PXE_CLIENTARCH 0x100 174 175 /* Miscellaneous configurable options */ 176 #define CONFIG_SYS_LOAD_ADDR (V2M_BASE + 0x10000000) 177 178 /* Physical Memory Map */ 179 #define CONFIG_NR_DRAM_BANKS 1 180 #define PHYS_SDRAM_1 (V2M_BASE) /* SDRAM Bank #1 */ 181 /* Top 16MB reserved for secure world use */ 182 #define DRAM_SEC_SIZE 0x01000000 183 #define PHYS_SDRAM_1_SIZE 0x80000000 - DRAM_SEC_SIZE 184 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 185 186 /* Enable memtest */ 187 #define CONFIG_CMD_MEMTEST 188 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1 189 #define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE) 190 191 /* Initial environment variables */ 192 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO 193 /* 194 * Defines where the kernel and FDT exist in NOR flash and where it will 195 * be copied into DRAM 196 */ 197 #define CONFIG_EXTRA_ENV_SETTINGS \ 198 "kernel_name=Image\0" \ 199 "kernel_addr=0x80000000\0" \ 200 "fdt_name=juno\0" \ 201 "fdt_addr=0x83000000\0" \ 202 "fdt_high=0xffffffffffffffff\0" \ 203 "initrd_high=0xffffffffffffffff\0" \ 204 205 /* Assume we boot with root on the first partition of a USB stick */ 206 #define CONFIG_BOOTARGS "console=ttyAMA0,115200n8 " \ 207 "root=/dev/sda1 rw " \ 208 "rootwait "\ 209 "earlyprintk=pl011,0x7ff80000 debug user_debug=31 "\ 210 "loglevel=9" 211 212 /* Copy the kernel and FDT to DRAM memory and boot */ 213 #define CONFIG_BOOTCOMMAND "afs load ${kernel_name} ${kernel_addr} ; " \ 214 "afs load ${fdt_name} ${fdt_addr} ; " \ 215 "fdt addr ${fdt_addr}; fdt resize; " \ 216 "booti ${kernel_addr} - ${fdt_addr}" 217 218 #define CONFIG_BOOTDELAY 1 219 220 #elif CONFIG_TARGET_VEXPRESS64_BASE_FVP 221 #define CONFIG_EXTRA_ENV_SETTINGS \ 222 "kernel_name=Image\0" \ 223 "kernel_addr=0x80000000\0" \ 224 "initrd_name=ramdisk.img\0" \ 225 "initrd_addr=0x88000000\0" \ 226 "fdt_name=devtree.dtb\0" \ 227 "fdt_addr=0x83000000\0" \ 228 "fdt_high=0xffffffffffffffff\0" \ 229 "initrd_high=0xffffffffffffffff\0" 230 231 #define CONFIG_BOOTARGS "console=ttyAMA0 earlyprintk=pl011,"\ 232 "0x1c090000 debug user_debug=31 "\ 233 "loglevel=9" 234 235 #define CONFIG_BOOTCOMMAND "smhload ${kernel_name} ${kernel_addr}; " \ 236 "smhload ${fdt_name} ${fdt_addr}; " \ 237 "smhload ${initrd_name} ${initrd_addr} initrd_end; " \ 238 "fdt addr ${fdt_addr}; fdt resize; " \ 239 "fdt chosen ${initrd_addr} ${initrd_end}; " \ 240 "booti $kernel_addr - $fdt_addr" 241 242 #define CONFIG_BOOTDELAY 1 243 244 #else 245 #error "Unknown board variant" 246 #endif 247 248 /* Do not preserve environment */ 249 #define CONFIG_ENV_IS_NOWHERE 1 250 #define CONFIG_ENV_SIZE 0x1000 251 252 /* Monitor Command Prompt */ 253 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ 254 #define CONFIG_SYS_PROMPT "VExpress64# " 255 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 256 sizeof(CONFIG_SYS_PROMPT) + 16) 257 #define CONFIG_SYS_HUSH_PARSER 258 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 259 #define CONFIG_SYS_LONGHELP 260 #define CONFIG_CMDLINE_EDITING 261 #define CONFIG_SYS_MAXARGS 64 /* max command args */ 262 263 /* Flash memory is available on the Juno board only */ 264 #ifndef CONFIG_TARGET_VEXPRESS64_JUNO 265 #define CONFIG_SYS_NO_FLASH 266 #else 267 #define CONFIG_CMD_FLASH 268 #define CONFIG_CMD_ARMFLASH 269 #define CONFIG_SYS_FLASH_CFI 1 270 #define CONFIG_FLASH_CFI_DRIVER 1 271 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_32BIT 272 #define CONFIG_SYS_FLASH_BASE 0x08000000 273 #define CONFIG_SYS_FLASH_SIZE 0x04000000 /* 64 MiB */ 274 #define CONFIG_SYS_MAX_FLASH_BANKS 2 275 276 /* Timeout values in ticks */ 277 #define CONFIG_SYS_FLASH_ERASE_TOUT (2 * CONFIG_SYS_HZ) /* Erase Timeout */ 278 #define CONFIG_SYS_FLASH_WRITE_TOUT (2 * CONFIG_SYS_HZ) /* Write Timeout */ 279 280 /* 255 0x40000 sectors + first or last sector may have 4 erase regions = 259 */ 281 #define CONFIG_SYS_MAX_FLASH_SECT 259 /* Max sectors */ 282 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* use buffered writes */ 283 #define CONFIG_SYS_FLASH_PROTECTION /* The devices have real protection */ 284 #define CONFIG_SYS_FLASH_EMPTY_INFO /* flinfo indicates empty blocks */ 285 286 #endif 287 288 #endif /* __VEXPRESS_AEMV8A_H */ 289