1 /* 2 * Configuration for Versatile Express. Parts were derived from other ARM 3 * configurations. 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8 #ifndef __VEXPRESS_AEMV8A_H 9 #define __VEXPRESS_AEMV8A_H 10 11 /* We use generic board for v8 Versatile Express */ 12 #define CONFIG_SYS_GENERIC_BOARD 13 14 #ifdef CONFIG_TARGET_VEXPRESS64_BASE_FVP 15 #ifndef CONFIG_SEMIHOSTING 16 #error CONFIG_TARGET_VEXPRESS64_BASE_FVP requires CONFIG_SEMIHOSTING 17 #endif 18 #define CONFIG_BOARD_LATE_INIT 19 #define CONFIG_ARMV8_SWITCH_TO_EL1 20 #endif 21 22 #define CONFIG_REMAKE_ELF 23 24 #if !defined(CONFIG_TARGET_VEXPRESS64_BASE_FVP) && \ 25 !defined(CONFIG_TARGET_VEXPRESS64_JUNO) 26 /* Base FVP and Juno not using GICv3 yet */ 27 #define CONFIG_GICV3 28 #endif 29 30 /*#define CONFIG_ARMV8_SWITCH_TO_EL1*/ 31 32 #define CONFIG_SYS_NO_FLASH 33 34 #define CONFIG_SUPPORT_RAW_INITRD 35 36 /* Cache Definitions */ 37 #define CONFIG_SYS_DCACHE_OFF 38 #define CONFIG_SYS_ICACHE_OFF 39 40 #define CONFIG_IDENT_STRING " vexpress_aemv8a" 41 #define CONFIG_BOOTP_VCI_STRING "U-boot.armv8.vexpress_aemv8a" 42 43 /* Link Definitions */ 44 #ifdef CONFIG_TARGET_VEXPRESS64_BASE_FVP 45 /* ATF loads u-boot here for BASE_FVP model */ 46 #define CONFIG_SYS_TEXT_BASE 0x88000000 47 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x03f00000) 48 #elif CONFIG_TARGET_VEXPRESS64_JUNO 49 #define CONFIG_SYS_TEXT_BASE 0xe0000000 50 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0) 51 #else 52 #define CONFIG_SYS_TEXT_BASE 0x80000000 53 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0) 54 #endif 55 56 /* Flat Device Tree Definitions */ 57 #define CONFIG_OF_LIBFDT 58 59 60 /* SMP Spin Table Definitions */ 61 #ifdef CONFIG_TARGET_VEXPRESS64_BASE_FVP 62 #define CPU_RELEASE_ADDR (CONFIG_SYS_SDRAM_BASE + 0x03f00000) 63 #else 64 #define CPU_RELEASE_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0) 65 #endif 66 67 /* CS register bases for the original memory map. */ 68 #define V2M_PA_CS0 0x00000000 69 #define V2M_PA_CS1 0x14000000 70 #define V2M_PA_CS2 0x18000000 71 #define V2M_PA_CS3 0x1c000000 72 #define V2M_PA_CS4 0x0c000000 73 #define V2M_PA_CS5 0x10000000 74 75 #define V2M_PERIPH_OFFSET(x) (x << 16) 76 #define V2M_SYSREGS (V2M_PA_CS3 + V2M_PERIPH_OFFSET(1)) 77 #define V2M_SYSCTL (V2M_PA_CS3 + V2M_PERIPH_OFFSET(2)) 78 #define V2M_SERIAL_BUS_PCI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(3)) 79 80 #define V2M_BASE 0x80000000 81 82 /* 83 * Physical addresses, offset from V2M_PA_CS0-3 84 */ 85 #define V2M_NOR0 (V2M_PA_CS0) 86 #define V2M_NOR1 (V2M_PA_CS4) 87 #define V2M_SRAM (V2M_PA_CS1) 88 89 /* Common peripherals relative to CS7. */ 90 #define V2M_AACI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(4)) 91 #define V2M_MMCI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(5)) 92 #define V2M_KMI0 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(6)) 93 #define V2M_KMI1 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(7)) 94 95 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO 96 #define V2M_UART0 0x7ff80000 97 #define V2M_UART1 0x7ff70000 98 #else /* Not Juno */ 99 #define V2M_UART0 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(9)) 100 #define V2M_UART1 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(10)) 101 #define V2M_UART2 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(11)) 102 #define V2M_UART3 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(12)) 103 #endif 104 105 #define V2M_WDT (V2M_PA_CS3 + V2M_PERIPH_OFFSET(15)) 106 107 #define V2M_TIMER01 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(17)) 108 #define V2M_TIMER23 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(18)) 109 110 #define V2M_SERIAL_BUS_DVI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(22)) 111 #define V2M_RTC (V2M_PA_CS3 + V2M_PERIPH_OFFSET(23)) 112 113 #define V2M_CF (V2M_PA_CS3 + V2M_PERIPH_OFFSET(26)) 114 115 #define V2M_CLCD (V2M_PA_CS3 + V2M_PERIPH_OFFSET(31)) 116 117 /* System register offsets. */ 118 #define V2M_SYS_CFGDATA (V2M_SYSREGS + 0x0a0) 119 #define V2M_SYS_CFGCTRL (V2M_SYSREGS + 0x0a4) 120 #define V2M_SYS_CFGSTAT (V2M_SYSREGS + 0x0a8) 121 122 /* Generic Timer Definitions */ 123 #define COUNTER_FREQUENCY (0x1800000) /* 24MHz */ 124 125 /* Generic Interrupt Controller Definitions */ 126 #ifdef CONFIG_GICV3 127 #define GICD_BASE (0x2f000000) 128 #define GICR_BASE (0x2f100000) 129 #else 130 131 #ifdef CONFIG_TARGET_VEXPRESS64_BASE_FVP 132 #define GICD_BASE (0x2f000000) 133 #define GICC_BASE (0x2c000000) 134 #elif CONFIG_TARGET_VEXPRESS64_JUNO 135 #define GICD_BASE (0x2C010000) 136 #define GICC_BASE (0x2C02f000) 137 #else 138 #define GICD_BASE (0x2C001000) 139 #define GICC_BASE (0x2C002000) 140 #endif 141 #endif 142 143 #define CONFIG_SYS_MEMTEST_START V2M_BASE 144 #define CONFIG_SYS_MEMTEST_END (V2M_BASE + 0x80000000) 145 146 /* Size of malloc() pool */ 147 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (8 << 20)) 148 149 /* SMSC91C111 Ethernet Configuration */ 150 #define CONFIG_SMC91111 1 151 #define CONFIG_SMC91111_BASE (0x01A000000) 152 153 /* PL011 Serial Configuration */ 154 #define CONFIG_PL011_SERIAL 155 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO 156 #define CONFIG_PL011_CLOCK 7273800 157 #else 158 #define CONFIG_PL011_CLOCK 24000000 159 #endif 160 #define CONFIG_PL01x_PORTS {(void *)CONFIG_SYS_SERIAL0, \ 161 (void *)CONFIG_SYS_SERIAL1} 162 #define CONFIG_CONS_INDEX 0 163 164 #define CONFIG_BAUDRATE 115200 165 #define CONFIG_SYS_SERIAL0 V2M_UART0 166 #define CONFIG_SYS_SERIAL1 V2M_UART1 167 168 /* Command line configuration */ 169 #define CONFIG_MENU 170 /*#define CONFIG_MENU_SHOW*/ 171 #define CONFIG_CMD_CACHE 172 #define CONFIG_CMD_BDI 173 #define CONFIG_CMD_BOOTI 174 #define CONFIG_CMD_UNZIP 175 #define CONFIG_CMD_DHCP 176 #define CONFIG_CMD_PXE 177 #define CONFIG_CMD_ENV 178 #define CONFIG_CMD_FLASH 179 #define CONFIG_CMD_IMI 180 #define CONFIG_CMD_LOADB 181 #define CONFIG_CMD_MEMORY 182 #define CONFIG_CMD_MII 183 #define CONFIG_CMD_NET 184 #define CONFIG_CMD_PING 185 #define CONFIG_CMD_SAVEENV 186 #define CONFIG_CMD_RUN 187 #define CONFIG_CMD_BOOTD 188 #define CONFIG_CMD_ECHO 189 #define CONFIG_CMD_SOURCE 190 #define CONFIG_CMD_FAT 191 #define CONFIG_DOS_PARTITION 192 193 /* BOOTP options */ 194 #define CONFIG_BOOTP_BOOTFILESIZE 195 #define CONFIG_BOOTP_BOOTPATH 196 #define CONFIG_BOOTP_GATEWAY 197 #define CONFIG_BOOTP_HOSTNAME 198 #define CONFIG_BOOTP_PXE 199 #define CONFIG_BOOTP_PXE_CLIENTARCH 0x100 200 201 /* Miscellaneous configurable options */ 202 #define CONFIG_SYS_LOAD_ADDR (V2M_BASE + 0x10000000) 203 204 /* Physical Memory Map */ 205 #define CONFIG_NR_DRAM_BANKS 1 206 #define PHYS_SDRAM_1 (V2M_BASE) /* SDRAM Bank #1 */ 207 #define PHYS_SDRAM_1_SIZE 0x80000000 /* 2048 MB */ 208 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 209 210 /* Initial environment variables */ 211 #ifdef CONFIG_TARGET_VEXPRESS64_BASE_FVP 212 #define CONFIG_EXTRA_ENV_SETTINGS \ 213 "kernel_name=uImage\0" \ 214 "kernel_addr_r=0x80000000\0" \ 215 "initrd_name=ramdisk.img\0" \ 216 "initrd_addr_r=0x88000000\0" \ 217 "fdt_name=devtree.dtb\0" \ 218 "fdt_addr_r=0x83000000\0" \ 219 "fdt_high=0xffffffffffffffff\0" \ 220 "initrd_high=0xffffffffffffffff\0" 221 222 #define CONFIG_BOOTARGS "console=ttyAMA0 earlyprintk=pl011,"\ 223 "0x1c090000 debug user_debug=31 "\ 224 "loglevel=9" 225 226 #define CONFIG_BOOTCOMMAND "fdt addr $fdt_addr_r; fdt resize; " \ 227 "fdt chosen $initrd_addr_r $initrd_end; " \ 228 "bootm $kernel_addr_r - $fdt_addr_r" 229 230 #define CONFIG_BOOTDELAY 1 231 232 #else 233 234 #define CONFIG_EXTRA_ENV_SETTINGS \ 235 "kernel_addr_r=0x80000000\0" \ 236 "initrd_addr_r=0x88000000\0" \ 237 "fdt_addr_r=0x83000000\0" \ 238 "fdt_high=0xa0000000\0" 239 240 #define CONFIG_BOOTARGS "console=ttyAMA0 root=/dev/ram0" 241 #define CONFIG_BOOTCOMMAND "bootm $kernel_addr_r " \ 242 "$initrd_addr_r:$initrd_size $fdt_addr_r" 243 #define CONFIG_BOOTDELAY -1 244 #endif 245 246 /* Do not preserve environment */ 247 #define CONFIG_ENV_IS_NOWHERE 1 248 #define CONFIG_ENV_SIZE 0x1000 249 250 /* Monitor Command Prompt */ 251 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ 252 #define CONFIG_SYS_PROMPT "VExpress64# " 253 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 254 sizeof(CONFIG_SYS_PROMPT) + 16) 255 #define CONFIG_SYS_HUSH_PARSER 256 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 257 #define CONFIG_SYS_LONGHELP 258 #define CONFIG_CMDLINE_EDITING 259 #define CONFIG_SYS_MAXARGS 64 /* max command args */ 260 261 #endif /* __VEXPRESS_AEMV8A_H */ 262