1 /* 2 * Configuration for Versatile Express. Parts were derived from other ARM 3 * configurations. 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8 #ifndef __VEXPRESS_AEMV8A_H 9 #define __VEXPRESS_AEMV8A_H 10 11 #ifdef CONFIG_TARGET_VEXPRESS64_BASE_FVP 12 #ifndef CONFIG_SEMIHOSTING 13 #error CONFIG_TARGET_VEXPRESS64_BASE_FVP requires CONFIG_SEMIHOSTING 14 #endif 15 #define CONFIG_ARMV8_SWITCH_TO_EL1 16 #endif 17 18 #define CONFIG_REMAKE_ELF 19 20 #define CONFIG_SUPPORT_RAW_INITRD 21 22 /* MMU Definitions */ 23 #define CONFIG_SYS_CACHELINE_SIZE 64 24 25 #define CONFIG_IDENT_STRING " vexpress_aemv8a" 26 #define CONFIG_BOOTP_VCI_STRING "U-Boot.armv8.vexpress_aemv8a" 27 28 /* Link Definitions */ 29 #if defined(CONFIG_TARGET_VEXPRESS64_BASE_FVP) || \ 30 defined(CONFIG_TARGET_VEXPRESS64_BASE_FVP_DRAM) 31 /* ATF loads u-boot here for BASE_FVP model */ 32 #define CONFIG_SYS_TEXT_BASE 0x88000000 33 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x03f00000) 34 #elif CONFIG_TARGET_VEXPRESS64_JUNO 35 #define CONFIG_SYS_TEXT_BASE 0xe0000000 36 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0) 37 #endif 38 39 #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ 40 41 /* CS register bases for the original memory map. */ 42 #define V2M_PA_CS0 0x00000000 43 #define V2M_PA_CS1 0x14000000 44 #define V2M_PA_CS2 0x18000000 45 #define V2M_PA_CS3 0x1c000000 46 #define V2M_PA_CS4 0x0c000000 47 #define V2M_PA_CS5 0x10000000 48 49 #define V2M_PERIPH_OFFSET(x) (x << 16) 50 #define V2M_SYSREGS (V2M_PA_CS3 + V2M_PERIPH_OFFSET(1)) 51 #define V2M_SYSCTL (V2M_PA_CS3 + V2M_PERIPH_OFFSET(2)) 52 #define V2M_SERIAL_BUS_PCI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(3)) 53 54 #define V2M_BASE 0x80000000 55 56 /* Common peripherals relative to CS7. */ 57 #define V2M_AACI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(4)) 58 #define V2M_MMCI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(5)) 59 #define V2M_KMI0 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(6)) 60 #define V2M_KMI1 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(7)) 61 62 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO 63 #define V2M_UART0 0x7ff80000 64 #define V2M_UART1 0x7ff70000 65 #else /* Not Juno */ 66 #define V2M_UART0 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(9)) 67 #define V2M_UART1 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(10)) 68 #define V2M_UART2 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(11)) 69 #define V2M_UART3 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(12)) 70 #endif 71 72 #define V2M_WDT (V2M_PA_CS3 + V2M_PERIPH_OFFSET(15)) 73 74 #define V2M_TIMER01 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(17)) 75 #define V2M_TIMER23 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(18)) 76 77 #define V2M_SERIAL_BUS_DVI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(22)) 78 #define V2M_RTC (V2M_PA_CS3 + V2M_PERIPH_OFFSET(23)) 79 80 #define V2M_CF (V2M_PA_CS3 + V2M_PERIPH_OFFSET(26)) 81 82 #define V2M_CLCD (V2M_PA_CS3 + V2M_PERIPH_OFFSET(31)) 83 84 /* System register offsets. */ 85 #define V2M_SYS_CFGDATA (V2M_SYSREGS + 0x0a0) 86 #define V2M_SYS_CFGCTRL (V2M_SYSREGS + 0x0a4) 87 #define V2M_SYS_CFGSTAT (V2M_SYSREGS + 0x0a8) 88 89 /* Generic Timer Definitions */ 90 #define COUNTER_FREQUENCY (0x1800000) /* 24MHz */ 91 92 /* Generic Interrupt Controller Definitions */ 93 #ifdef CONFIG_GICV3 94 #define GICD_BASE (0x2f000000) 95 #define GICR_BASE (0x2f100000) 96 #else 97 98 #if defined(CONFIG_TARGET_VEXPRESS64_BASE_FVP) || \ 99 defined(CONFIG_TARGET_VEXPRESS64_BASE_FVP_DRAM) 100 #define GICD_BASE (0x2f000000) 101 #define GICC_BASE (0x2c000000) 102 #elif CONFIG_TARGET_VEXPRESS64_JUNO 103 #define GICD_BASE (0x2C010000) 104 #define GICC_BASE (0x2C02f000) 105 #endif 106 #endif /* !CONFIG_GICV3 */ 107 108 /* Size of malloc() pool */ 109 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (8 << 20)) 110 111 /* Ethernet Configuration */ 112 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO 113 /* The real hardware Versatile express uses SMSC9118 */ 114 #define CONFIG_SMC911X 1 115 #define CONFIG_SMC911X_32_BIT 1 116 #define CONFIG_SMC911X_BASE (0x018000000) 117 #else 118 /* The Vexpress64 simulators use SMSC91C111 */ 119 #define CONFIG_SMC91111 1 120 #define CONFIG_SMC91111_BASE (0x01A000000) 121 #endif 122 123 /* PL011 Serial Configuration */ 124 #define CONFIG_BAUDRATE 115200 125 #define CONFIG_CONS_INDEX 0 126 #define CONFIG_PL01X_SERIAL 127 #define CONFIG_PL011_SERIAL 128 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO 129 #define CONFIG_PL011_CLOCK 7273800 130 #else 131 #define CONFIG_PL011_CLOCK 24000000 132 #endif 133 134 /* Command line configuration */ 135 #define CONFIG_MENU 136 /*#define CONFIG_MENU_SHOW*/ 137 #define CONFIG_CMD_BOOTI 138 #define CONFIG_CMD_UNZIP 139 #define CONFIG_CMD_PXE 140 #define CONFIG_CMD_ENV 141 #define CONFIG_DOS_PARTITION 142 143 /* BOOTP options */ 144 #define CONFIG_BOOTP_BOOTFILESIZE 145 #define CONFIG_BOOTP_BOOTPATH 146 #define CONFIG_BOOTP_GATEWAY 147 #define CONFIG_BOOTP_HOSTNAME 148 #define CONFIG_BOOTP_PXE 149 #define CONFIG_BOOTP_PXE_CLIENTARCH 0x100 150 151 /* Miscellaneous configurable options */ 152 #define CONFIG_SYS_LOAD_ADDR (V2M_BASE + 0x10000000) 153 154 /* Physical Memory Map */ 155 #define PHYS_SDRAM_1 (V2M_BASE) /* SDRAM Bank #1 */ 156 /* Top 16MB reserved for secure world use */ 157 #define DRAM_SEC_SIZE 0x01000000 158 #define PHYS_SDRAM_1_SIZE 0x80000000 - DRAM_SEC_SIZE 159 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 160 161 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO 162 #define CONFIG_NR_DRAM_BANKS 2 163 #define PHYS_SDRAM_2 (0x880000000) 164 #define PHYS_SDRAM_2_SIZE 0x180000000 165 #else 166 #define CONFIG_NR_DRAM_BANKS 1 167 #endif 168 169 /* Enable memtest */ 170 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1 171 #define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE) 172 173 /* Initial environment variables */ 174 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO 175 /* 176 * Defines where the kernel and FDT exist in NOR flash and where it will 177 * be copied into DRAM 178 */ 179 #define CONFIG_EXTRA_ENV_SETTINGS \ 180 "kernel_name=norkern\0" \ 181 "kernel_alt_name=Image\0" \ 182 "kernel_addr=0x80080000\0" \ 183 "initrd_name=ramdisk.img\0" \ 184 "initrd_addr=0x84000000\0" \ 185 "fdtfile=board.dtb\0" \ 186 "fdt_alt_name=juno\0" \ 187 "fdt_addr=0x83000000\0" \ 188 "fdt_high=0xffffffffffffffff\0" \ 189 "initrd_high=0xffffffffffffffff\0" \ 190 191 /* Assume we boot with root on the first partition of a USB stick */ 192 #define CONFIG_BOOTARGS "console=ttyAMA0,115200n8 " \ 193 "root=/dev/sda2 rw " \ 194 "rootwait "\ 195 "earlyprintk=pl011,0x7ff80000 debug "\ 196 "user_debug=31 "\ 197 "androidboot.hardware=juno "\ 198 "loglevel=9" 199 200 /* Copy the kernel and FDT to DRAM memory and boot */ 201 #define CONFIG_BOOTCOMMAND "afs load ${kernel_name} ${kernel_addr} ; " \ 202 "if test $? -eq 1; then "\ 203 " echo Loading ${kernel_alt_name} instead of "\ 204 "${kernel_name}; "\ 205 " afs load ${kernel_alt_name} ${kernel_addr};"\ 206 "fi ; "\ 207 "afs load ${fdtfile} ${fdt_addr} ; " \ 208 "if test $? -eq 1; then "\ 209 " echo Loading ${fdt_alt_name} instead of "\ 210 "${fdtfile}; "\ 211 " afs load ${fdt_alt_name} ${fdt_addr}; "\ 212 "fi ; "\ 213 "fdt addr ${fdt_addr}; fdt resize; " \ 214 "if afs load ${initrd_name} ${initrd_addr} ; "\ 215 "then "\ 216 " setenv initrd_param ${initrd_addr}; "\ 217 " else setenv initrd_param -; "\ 218 "fi ; " \ 219 "booti ${kernel_addr} ${initrd_param} ${fdt_addr}" 220 221 #define CONFIG_BOOTDELAY 1 222 223 #elif CONFIG_TARGET_VEXPRESS64_BASE_FVP 224 #define CONFIG_EXTRA_ENV_SETTINGS \ 225 "kernel_name=Image\0" \ 226 "kernel_addr=0x80080000\0" \ 227 "initrd_name=ramdisk.img\0" \ 228 "initrd_addr=0x88000000\0" \ 229 "fdtfile=devtree.dtb\0" \ 230 "fdt_addr=0x83000000\0" \ 231 "fdt_high=0xffffffffffffffff\0" \ 232 "initrd_high=0xffffffffffffffff\0" 233 234 #define CONFIG_BOOTARGS "console=ttyAMA0 earlyprintk=pl011,"\ 235 "0x1c090000 debug user_debug=31 "\ 236 "loglevel=9" 237 238 #define CONFIG_BOOTCOMMAND "smhload ${kernel_name} ${kernel_addr}; " \ 239 "smhload ${fdtfile} ${fdt_addr}; " \ 240 "smhload ${initrd_name} ${initrd_addr} "\ 241 "initrd_end; " \ 242 "fdt addr ${fdt_addr}; fdt resize; " \ 243 "fdt chosen ${initrd_addr} ${initrd_end}; " \ 244 "booti $kernel_addr - $fdt_addr" 245 246 #define CONFIG_BOOTDELAY 1 247 248 #elif CONFIG_TARGET_VEXPRESS64_BASE_FVP_DRAM 249 #define CONFIG_EXTRA_ENV_SETTINGS \ 250 "kernel_addr=0x80080000\0" \ 251 "initrd_addr=0x84000000\0" \ 252 "fdt_addr=0x83000000\0" \ 253 "fdt_high=0xffffffffffffffff\0" \ 254 "initrd_high=0xffffffffffffffff\0" 255 256 #define CONFIG_BOOTARGS "console=ttyAMA0 earlyprintk=pl011,"\ 257 "0x1c090000 debug user_debug=31 "\ 258 "androidboot.hardware=fvpbase "\ 259 "root=/dev/vda2 rw "\ 260 "rootwait "\ 261 "loglevel=9" 262 263 #define CONFIG_BOOTCOMMAND "booti $kernel_addr $initrd_addr $fdt_addr" 264 265 #define CONFIG_BOOTDELAY 1 266 267 #endif 268 269 /* Monitor Command Prompt */ 270 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ 271 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 272 sizeof(CONFIG_SYS_PROMPT) + 16) 273 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 274 #define CONFIG_SYS_LONGHELP 275 #define CONFIG_CMDLINE_EDITING 276 #define CONFIG_SYS_MAXARGS 64 /* max command args */ 277 278 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO 279 #define CONFIG_SYS_FLASH_BASE 0x08000000 280 /* 255 x 256KiB sectors + 4 x 64KiB sectors at the end = 259 */ 281 #define CONFIG_SYS_MAX_FLASH_SECT 259 282 /* Store environment at top of flash in the same location as blank.img */ 283 /* in the Juno firmware. */ 284 #define CONFIG_ENV_ADDR 0x0BFC0000 285 #define CONFIG_ENV_SECT_SIZE 0x00010000 286 #else 287 #define CONFIG_SYS_FLASH_BASE 0x0C000000 288 /* 256 x 256KiB sectors */ 289 #define CONFIG_SYS_MAX_FLASH_SECT 256 290 /* Store environment at top of flash */ 291 #define CONFIG_ENV_ADDR 0x0FFC0000 292 #define CONFIG_ENV_SECT_SIZE 0x00040000 293 #endif 294 295 #define CONFIG_SYS_FLASH_CFI 1 296 #define CONFIG_FLASH_CFI_DRIVER 1 297 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_32BIT 298 #define CONFIG_SYS_MAX_FLASH_BANKS 1 299 300 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* use buffered writes */ 301 #define CONFIG_SYS_FLASH_PROTECTION /* The devices have real protection */ 302 #define CONFIG_SYS_FLASH_EMPTY_INFO /* flinfo indicates empty blocks */ 303 #define FLASH_MAX_SECTOR_SIZE 0x00040000 304 #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE 305 #define CONFIG_ENV_IS_IN_FLASH 1 306 307 #endif /* __VEXPRESS_AEMV8A_H */ 308