1 /*
2  * Configuration for Versatile Express. Parts were derived from other ARM
3  *   configurations.
4  *
5  * SPDX-License-Identifier:	GPL-2.0+
6  */
7 
8 #ifndef __VEXPRESS_AEMV8A_H
9 #define __VEXPRESS_AEMV8A_H
10 
11 /* We use generic board for v8 Versatile Express */
12 #define CONFIG_SYS_GENERIC_BOARD
13 
14 #ifdef CONFIG_TARGET_VEXPRESS64_BASE_FVP
15 #ifndef CONFIG_SEMIHOSTING
16 #error CONFIG_TARGET_VEXPRESS64_BASE_FVP requires CONFIG_SEMIHOSTING
17 #endif
18 #define CONFIG_BOARD_LATE_INIT
19 #define CONFIG_ARMV8_SWITCH_TO_EL1
20 #endif
21 
22 #define CONFIG_REMAKE_ELF
23 
24 #if !defined(CONFIG_TARGET_VEXPRESS64_BASE_FVP) && \
25     !defined(CONFIG_TARGET_VEXPRESS64_JUNO)
26 /* Base FVP and Juno not using GICv3 yet */
27 #define CONFIG_GICV3
28 #endif
29 
30 /*#define CONFIG_ARMV8_SWITCH_TO_EL1*/
31 
32 #define CONFIG_SYS_NO_FLASH
33 
34 #define CONFIG_SUPPORT_RAW_INITRD
35 
36 /* Cache Definitions */
37 #define CONFIG_SYS_DCACHE_OFF
38 #define CONFIG_SYS_ICACHE_OFF
39 
40 #define CONFIG_IDENT_STRING		" vexpress_aemv8a"
41 #define CONFIG_BOOTP_VCI_STRING		"U-boot.armv8.vexpress_aemv8a"
42 
43 /* Link Definitions */
44 #ifdef CONFIG_TARGET_VEXPRESS64_BASE_FVP
45 /* ATF loads u-boot here for BASE_FVP model */
46 #define CONFIG_SYS_TEXT_BASE		0x88000000
47 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_SDRAM_BASE + 0x03f00000)
48 #elif CONFIG_TARGET_VEXPRESS64_JUNO
49 #define CONFIG_SYS_TEXT_BASE		0xe0000000
50 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
51 #else
52 #define CONFIG_SYS_TEXT_BASE		0x80000000
53 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
54 #endif
55 
56 /* Flat Device Tree Definitions */
57 #define CONFIG_OF_LIBFDT
58 
59 
60 /* SMP Spin Table Definitions */
61 #ifdef CONFIG_TARGET_VEXPRESS64_BASE_FVP
62 #define CPU_RELEASE_ADDR		(CONFIG_SYS_SDRAM_BASE + 0x03f00000)
63 #else
64 #define CPU_RELEASE_ADDR		(CONFIG_SYS_SDRAM_BASE + 0x7fff0)
65 #endif
66 
67 /* CS register bases for the original memory map. */
68 #define V2M_PA_CS0			0x00000000
69 #define V2M_PA_CS1			0x14000000
70 #define V2M_PA_CS2			0x18000000
71 #define V2M_PA_CS3			0x1c000000
72 #define V2M_PA_CS4			0x0c000000
73 #define V2M_PA_CS5			0x10000000
74 
75 #define V2M_PERIPH_OFFSET(x)		(x << 16)
76 #define V2M_SYSREGS			(V2M_PA_CS3 + V2M_PERIPH_OFFSET(1))
77 #define V2M_SYSCTL			(V2M_PA_CS3 + V2M_PERIPH_OFFSET(2))
78 #define V2M_SERIAL_BUS_PCI		(V2M_PA_CS3 + V2M_PERIPH_OFFSET(3))
79 
80 #define V2M_BASE			0x80000000
81 
82 /*
83  * Physical addresses, offset from V2M_PA_CS0-3
84  */
85 #define V2M_NOR0			(V2M_PA_CS0)
86 #define V2M_NOR1			(V2M_PA_CS4)
87 #define V2M_SRAM			(V2M_PA_CS1)
88 
89 /* Common peripherals relative to CS7. */
90 #define V2M_AACI			(V2M_PA_CS3 + V2M_PERIPH_OFFSET(4))
91 #define V2M_MMCI			(V2M_PA_CS3 + V2M_PERIPH_OFFSET(5))
92 #define V2M_KMI0			(V2M_PA_CS3 + V2M_PERIPH_OFFSET(6))
93 #define V2M_KMI1			(V2M_PA_CS3 + V2M_PERIPH_OFFSET(7))
94 
95 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO
96 #define V2M_UART0			0x7ff80000
97 #define V2M_UART1			0x7ff70000
98 #else /* Not Juno */
99 #define V2M_UART0			(V2M_PA_CS3 + V2M_PERIPH_OFFSET(9))
100 #define V2M_UART1			(V2M_PA_CS3 + V2M_PERIPH_OFFSET(10))
101 #define V2M_UART2			(V2M_PA_CS3 + V2M_PERIPH_OFFSET(11))
102 #define V2M_UART3			(V2M_PA_CS3 + V2M_PERIPH_OFFSET(12))
103 #endif
104 
105 #define V2M_WDT				(V2M_PA_CS3 + V2M_PERIPH_OFFSET(15))
106 
107 #define V2M_TIMER01			(V2M_PA_CS3 + V2M_PERIPH_OFFSET(17))
108 #define V2M_TIMER23			(V2M_PA_CS3 + V2M_PERIPH_OFFSET(18))
109 
110 #define V2M_SERIAL_BUS_DVI		(V2M_PA_CS3 + V2M_PERIPH_OFFSET(22))
111 #define V2M_RTC				(V2M_PA_CS3 + V2M_PERIPH_OFFSET(23))
112 
113 #define V2M_CF				(V2M_PA_CS3 + V2M_PERIPH_OFFSET(26))
114 
115 #define V2M_CLCD			(V2M_PA_CS3 + V2M_PERIPH_OFFSET(31))
116 
117 /* System register offsets. */
118 #define V2M_SYS_CFGDATA			(V2M_SYSREGS + 0x0a0)
119 #define V2M_SYS_CFGCTRL			(V2M_SYSREGS + 0x0a4)
120 #define V2M_SYS_CFGSTAT			(V2M_SYSREGS + 0x0a8)
121 
122 /* Generic Timer Definitions */
123 #define COUNTER_FREQUENCY		(0x1800000)	/* 24MHz */
124 
125 /* Generic Interrupt Controller Definitions */
126 #ifdef CONFIG_GICV3
127 #define GICD_BASE			(0x2f000000)
128 #define GICR_BASE			(0x2f100000)
129 #else
130 
131 #ifdef CONFIG_TARGET_VEXPRESS64_BASE_FVP
132 #define GICD_BASE			(0x2f000000)
133 #define GICC_BASE			(0x2c000000)
134 #elif CONFIG_TARGET_VEXPRESS64_JUNO
135 #define GICD_BASE			(0x2C010000)
136 #define GICC_BASE			(0x2C02f000)
137 #else
138 #define GICD_BASE			(0x2C001000)
139 #define GICC_BASE			(0x2C002000)
140 #endif
141 #endif
142 
143 #define CONFIG_SYS_MEMTEST_START	V2M_BASE
144 #define CONFIG_SYS_MEMTEST_END		(V2M_BASE + 0x80000000)
145 
146 /* Size of malloc() pool */
147 #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + (8 << 20))
148 
149 /* Ethernet Configuration */
150 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO
151 /* The real hardware Versatile express uses SMSC9118 */
152 #define CONFIG_SMC911X			1
153 #define CONFIG_SMC911X_32_BIT		1
154 #define CONFIG_SMC911X_BASE		(0x018000000)
155 #else
156 /* The Vexpress64 simulators use SMSC91C111 */
157 #define CONFIG_SMC91111			1
158 #define CONFIG_SMC91111_BASE		(0x01A000000)
159 #endif
160 
161 /* PL011 Serial Configuration */
162 #define CONFIG_PL011_SERIAL
163 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO
164 #define CONFIG_PL011_CLOCK		7273800
165 #else
166 #define CONFIG_PL011_CLOCK		24000000
167 #endif
168 #define CONFIG_PL01x_PORTS		{(void *)CONFIG_SYS_SERIAL0, \
169 					 (void *)CONFIG_SYS_SERIAL1}
170 #define CONFIG_CONS_INDEX		0
171 
172 #define CONFIG_BAUDRATE			115200
173 #define CONFIG_SYS_SERIAL0		V2M_UART0
174 #define CONFIG_SYS_SERIAL1		V2M_UART1
175 
176 /* Command line configuration */
177 #define CONFIG_MENU
178 /*#define CONFIG_MENU_SHOW*/
179 #define CONFIG_CMD_CACHE
180 #define CONFIG_CMD_BDI
181 #define CONFIG_CMD_BOOTI
182 #define CONFIG_CMD_UNZIP
183 #define CONFIG_CMD_DHCP
184 #define CONFIG_CMD_PXE
185 #define CONFIG_CMD_ENV
186 #define CONFIG_CMD_FLASH
187 #define CONFIG_CMD_IMI
188 #define CONFIG_CMD_LOADB
189 #define CONFIG_CMD_MEMORY
190 #define CONFIG_CMD_MII
191 #define CONFIG_CMD_NET
192 #define CONFIG_CMD_PING
193 #define CONFIG_CMD_SAVEENV
194 #define CONFIG_CMD_RUN
195 #define CONFIG_CMD_BOOTD
196 #define CONFIG_CMD_ECHO
197 #define CONFIG_CMD_SOURCE
198 #define CONFIG_CMD_FAT
199 #define CONFIG_DOS_PARTITION
200 
201 /* BOOTP options */
202 #define CONFIG_BOOTP_BOOTFILESIZE
203 #define CONFIG_BOOTP_BOOTPATH
204 #define CONFIG_BOOTP_GATEWAY
205 #define CONFIG_BOOTP_HOSTNAME
206 #define CONFIG_BOOTP_PXE
207 #define CONFIG_BOOTP_PXE_CLIENTARCH	0x100
208 
209 /* Miscellaneous configurable options */
210 #define CONFIG_SYS_LOAD_ADDR		(V2M_BASE + 0x10000000)
211 
212 /* Physical Memory Map */
213 #define CONFIG_NR_DRAM_BANKS		1
214 #define PHYS_SDRAM_1			(V2M_BASE)	/* SDRAM Bank #1 */
215 #define PHYS_SDRAM_1_SIZE		0x80000000	/* 2048 MB */
216 #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
217 
218 /* Initial environment variables */
219 #ifdef CONFIG_TARGET_VEXPRESS64_BASE_FVP
220 #define CONFIG_EXTRA_ENV_SETTINGS	\
221 				"kernel_name=uImage\0"	\
222 				"kernel_addr_r=0x80000000\0"	\
223 				"initrd_name=ramdisk.img\0"	\
224 				"initrd_addr_r=0x88000000\0"	\
225 				"fdt_name=devtree.dtb\0"		\
226 				"fdt_addr_r=0x83000000\0"		\
227 				"fdt_high=0xffffffffffffffff\0"	\
228 				"initrd_high=0xffffffffffffffff\0"
229 
230 #define CONFIG_BOOTARGS		"console=ttyAMA0 earlyprintk=pl011,"\
231 				"0x1c090000 debug user_debug=31 "\
232 				"loglevel=9"
233 
234 #define CONFIG_BOOTCOMMAND	"fdt addr $fdt_addr_r; fdt resize; " \
235 				"fdt chosen $initrd_addr_r $initrd_end; " \
236 				"bootm $kernel_addr_r - $fdt_addr_r"
237 
238 #define CONFIG_BOOTDELAY		1
239 
240 #else
241 
242 #define CONFIG_EXTRA_ENV_SETTINGS	\
243 					"kernel_addr_r=0x80000000\0"	\
244 					"initrd_addr_r=0x88000000\0"	\
245 					"fdt_addr_r=0x83000000\0"		\
246 					"fdt_high=0xa0000000\0"
247 
248 #define CONFIG_BOOTARGS			"console=ttyAMA0,115200n8 root=/dev/ram0"
249 #define CONFIG_BOOTCOMMAND		"bootm $kernel_addr_r " \
250 					"$initrd_addr_r:$initrd_size $fdt_addr_r"
251 #define CONFIG_BOOTDELAY		-1
252 #endif
253 
254 /* Do not preserve environment */
255 #define CONFIG_ENV_IS_NOWHERE		1
256 #define CONFIG_ENV_SIZE			0x1000
257 
258 /* Monitor Command Prompt */
259 #define CONFIG_SYS_CBSIZE		512	/* Console I/O Buffer Size */
260 #define CONFIG_SYS_PROMPT		"VExpress64# "
261 #define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
262 					sizeof(CONFIG_SYS_PROMPT) + 16)
263 #define CONFIG_SYS_HUSH_PARSER
264 #define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
265 #define CONFIG_SYS_LONGHELP
266 #define CONFIG_CMDLINE_EDITING
267 #define CONFIG_SYS_MAXARGS		64	/* max command args */
268 
269 #endif /* __VEXPRESS_AEMV8A_H */
270