1 /* 2 * Configuration for Versatile Express. Parts were derived from other ARM 3 * configurations. 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8 #ifndef __VEXPRESS_AEMV8A_H 9 #define __VEXPRESS_AEMV8A_H 10 11 #ifdef CONFIG_TARGET_VEXPRESS64_BASE_FVP 12 #ifndef CONFIG_SEMIHOSTING 13 #error CONFIG_TARGET_VEXPRESS64_BASE_FVP requires CONFIG_SEMIHOSTING 14 #endif 15 #define CONFIG_ARMV8_SWITCH_TO_EL1 16 #endif 17 18 #define CONFIG_REMAKE_ELF 19 20 #define CONFIG_SUPPORT_RAW_INITRD 21 22 /* MMU Definitions */ 23 #define CONFIG_SYS_CACHELINE_SIZE 64 24 #define CONFIG_SYS_FULL_VA 25 26 #define CONFIG_IDENT_STRING " vexpress_aemv8a" 27 #define CONFIG_BOOTP_VCI_STRING "U-Boot.armv8.vexpress_aemv8a" 28 29 /* Link Definitions */ 30 #if defined(CONFIG_TARGET_VEXPRESS64_BASE_FVP) || \ 31 defined(CONFIG_TARGET_VEXPRESS64_BASE_FVP_DRAM) 32 /* ATF loads u-boot here for BASE_FVP model */ 33 #define CONFIG_SYS_TEXT_BASE 0x88000000 34 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x03f00000) 35 #elif CONFIG_TARGET_VEXPRESS64_JUNO 36 #define CONFIG_SYS_TEXT_BASE 0xe0000000 37 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0) 38 #endif 39 40 #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ 41 42 /* CS register bases for the original memory map. */ 43 #define V2M_PA_CS0 0x00000000 44 #define V2M_PA_CS1 0x14000000 45 #define V2M_PA_CS2 0x18000000 46 #define V2M_PA_CS3 0x1c000000 47 #define V2M_PA_CS4 0x0c000000 48 #define V2M_PA_CS5 0x10000000 49 50 #define V2M_PERIPH_OFFSET(x) (x << 16) 51 #define V2M_SYSREGS (V2M_PA_CS3 + V2M_PERIPH_OFFSET(1)) 52 #define V2M_SYSCTL (V2M_PA_CS3 + V2M_PERIPH_OFFSET(2)) 53 #define V2M_SERIAL_BUS_PCI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(3)) 54 55 #define V2M_BASE 0x80000000 56 57 /* Common peripherals relative to CS7. */ 58 #define V2M_AACI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(4)) 59 #define V2M_MMCI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(5)) 60 #define V2M_KMI0 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(6)) 61 #define V2M_KMI1 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(7)) 62 63 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO 64 #define V2M_UART0 0x7ff80000 65 #define V2M_UART1 0x7ff70000 66 #else /* Not Juno */ 67 #define V2M_UART0 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(9)) 68 #define V2M_UART1 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(10)) 69 #define V2M_UART2 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(11)) 70 #define V2M_UART3 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(12)) 71 #endif 72 73 #define V2M_WDT (V2M_PA_CS3 + V2M_PERIPH_OFFSET(15)) 74 75 #define V2M_TIMER01 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(17)) 76 #define V2M_TIMER23 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(18)) 77 78 #define V2M_SERIAL_BUS_DVI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(22)) 79 #define V2M_RTC (V2M_PA_CS3 + V2M_PERIPH_OFFSET(23)) 80 81 #define V2M_CF (V2M_PA_CS3 + V2M_PERIPH_OFFSET(26)) 82 83 #define V2M_CLCD (V2M_PA_CS3 + V2M_PERIPH_OFFSET(31)) 84 85 /* System register offsets. */ 86 #define V2M_SYS_CFGDATA (V2M_SYSREGS + 0x0a0) 87 #define V2M_SYS_CFGCTRL (V2M_SYSREGS + 0x0a4) 88 #define V2M_SYS_CFGSTAT (V2M_SYSREGS + 0x0a8) 89 90 /* Generic Timer Definitions */ 91 #define COUNTER_FREQUENCY (0x1800000) /* 24MHz */ 92 93 /* Generic Interrupt Controller Definitions */ 94 #ifdef CONFIG_GICV3 95 #define GICD_BASE (0x2f000000) 96 #define GICR_BASE (0x2f100000) 97 #else 98 99 #if defined(CONFIG_TARGET_VEXPRESS64_BASE_FVP) || \ 100 defined(CONFIG_TARGET_VEXPRESS64_BASE_FVP_DRAM) 101 #define GICD_BASE (0x2f000000) 102 #define GICC_BASE (0x2c000000) 103 #elif CONFIG_TARGET_VEXPRESS64_JUNO 104 #define GICD_BASE (0x2C010000) 105 #define GICC_BASE (0x2C02f000) 106 #endif 107 #endif /* !CONFIG_GICV3 */ 108 109 /* Size of malloc() pool */ 110 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (8 << 20)) 111 112 /* Ethernet Configuration */ 113 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO 114 /* The real hardware Versatile express uses SMSC9118 */ 115 #define CONFIG_SMC911X 1 116 #define CONFIG_SMC911X_32_BIT 1 117 #define CONFIG_SMC911X_BASE (0x018000000) 118 #else 119 /* The Vexpress64 simulators use SMSC91C111 */ 120 #define CONFIG_SMC91111 1 121 #define CONFIG_SMC91111_BASE (0x01A000000) 122 #endif 123 124 /* PL011 Serial Configuration */ 125 #define CONFIG_BAUDRATE 115200 126 #define CONFIG_CONS_INDEX 0 127 #define CONFIG_PL01X_SERIAL 128 #define CONFIG_PL011_SERIAL 129 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO 130 #define CONFIG_PL011_CLOCK 7273800 131 #else 132 #define CONFIG_PL011_CLOCK 24000000 133 #endif 134 135 /* Command line configuration */ 136 #define CONFIG_MENU 137 /*#define CONFIG_MENU_SHOW*/ 138 #define CONFIG_CMD_CACHE 139 #define CONFIG_CMD_BOOTI 140 #define CONFIG_CMD_UNZIP 141 #define CONFIG_CMD_DHCP 142 #define CONFIG_CMD_PXE 143 #define CONFIG_CMD_ENV 144 #define CONFIG_CMD_MII 145 #define CONFIG_CMD_PING 146 #define CONFIG_CMD_FAT 147 #define CONFIG_DOS_PARTITION 148 149 /* BOOTP options */ 150 #define CONFIG_BOOTP_BOOTFILESIZE 151 #define CONFIG_BOOTP_BOOTPATH 152 #define CONFIG_BOOTP_GATEWAY 153 #define CONFIG_BOOTP_HOSTNAME 154 #define CONFIG_BOOTP_PXE 155 #define CONFIG_BOOTP_PXE_CLIENTARCH 0x100 156 157 /* Miscellaneous configurable options */ 158 #define CONFIG_SYS_LOAD_ADDR (V2M_BASE + 0x10000000) 159 160 /* Physical Memory Map */ 161 #define PHYS_SDRAM_1 (V2M_BASE) /* SDRAM Bank #1 */ 162 /* Top 16MB reserved for secure world use */ 163 #define DRAM_SEC_SIZE 0x01000000 164 #define PHYS_SDRAM_1_SIZE 0x80000000 - DRAM_SEC_SIZE 165 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 166 167 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO 168 #define CONFIG_NR_DRAM_BANKS 2 169 #define PHYS_SDRAM_2 (0x880000000) 170 #define PHYS_SDRAM_2_SIZE 0x180000000 171 #else 172 #define CONFIG_NR_DRAM_BANKS 1 173 #endif 174 175 /* Enable memtest */ 176 #define CONFIG_CMD_MEMTEST 177 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1 178 #define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE) 179 180 /* Initial environment variables */ 181 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO 182 /* 183 * Defines where the kernel and FDT exist in NOR flash and where it will 184 * be copied into DRAM 185 */ 186 #define CONFIG_EXTRA_ENV_SETTINGS \ 187 "kernel_name=norkern\0" \ 188 "kernel_alt_name=Image\0" \ 189 "kernel_addr=0x80080000\0" \ 190 "initrd_name=ramdisk.img\0" \ 191 "initrd_addr=0x84000000\0" \ 192 "fdt_name=board.dtb\0" \ 193 "fdt_alt_name=juno\0" \ 194 "fdt_addr=0x83000000\0" \ 195 "fdt_high=0xffffffffffffffff\0" \ 196 "initrd_high=0xffffffffffffffff\0" \ 197 198 /* Assume we boot with root on the first partition of a USB stick */ 199 #define CONFIG_BOOTARGS "console=ttyAMA0,115200n8 " \ 200 "root=/dev/sda2 rw " \ 201 "rootwait "\ 202 "earlyprintk=pl011,0x7ff80000 debug "\ 203 "user_debug=31 "\ 204 "androidboot.hardware=juno "\ 205 "loglevel=9" 206 207 /* Copy the kernel and FDT to DRAM memory and boot */ 208 #define CONFIG_BOOTCOMMAND "afs load ${kernel_name} ${kernel_addr} ; " \ 209 "if test $? -eq 1; then "\ 210 " echo Loading ${kernel_alt_name} instead of "\ 211 "${kernel_name}; "\ 212 " afs load ${kernel_alt_name} ${kernel_addr};"\ 213 "fi ; "\ 214 "afs load ${fdt_name} ${fdt_addr} ; " \ 215 "if test $? -eq 1; then "\ 216 " echo Loading ${fdt_alt_name} instead of "\ 217 "${fdt_name}; "\ 218 " afs load ${fdt_alt_name} ${fdt_addr}; "\ 219 "fi ; "\ 220 "fdt addr ${fdt_addr}; fdt resize; " \ 221 "if afs load ${initrd_name} ${initrd_addr} ; "\ 222 "then "\ 223 " setenv initrd_param ${initrd_addr}; "\ 224 " else setenv initrd_param -; "\ 225 "fi ; " \ 226 "booti ${kernel_addr} ${initrd_param} ${fdt_addr}" 227 228 #define CONFIG_BOOTDELAY 1 229 230 #elif CONFIG_TARGET_VEXPRESS64_BASE_FVP 231 #define CONFIG_EXTRA_ENV_SETTINGS \ 232 "kernel_name=Image\0" \ 233 "kernel_addr=0x80080000\0" \ 234 "initrd_name=ramdisk.img\0" \ 235 "initrd_addr=0x88000000\0" \ 236 "fdt_name=devtree.dtb\0" \ 237 "fdt_addr=0x83000000\0" \ 238 "fdt_high=0xffffffffffffffff\0" \ 239 "initrd_high=0xffffffffffffffff\0" 240 241 #define CONFIG_BOOTARGS "console=ttyAMA0 earlyprintk=pl011,"\ 242 "0x1c090000 debug user_debug=31 "\ 243 "loglevel=9" 244 245 #define CONFIG_BOOTCOMMAND "smhload ${kernel_name} ${kernel_addr}; " \ 246 "smhload ${fdt_name} ${fdt_addr}; " \ 247 "smhload ${initrd_name} ${initrd_addr} "\ 248 "initrd_end; " \ 249 "fdt addr ${fdt_addr}; fdt resize; " \ 250 "fdt chosen ${initrd_addr} ${initrd_end}; " \ 251 "booti $kernel_addr - $fdt_addr" 252 253 #define CONFIG_BOOTDELAY 1 254 255 #elif CONFIG_TARGET_VEXPRESS64_BASE_FVP_DRAM 256 #define CONFIG_EXTRA_ENV_SETTINGS \ 257 "kernel_addr=0x80080000\0" \ 258 "initrd_addr=0x84000000\0" \ 259 "fdt_addr=0x83000000\0" \ 260 "fdt_high=0xffffffffffffffff\0" \ 261 "initrd_high=0xffffffffffffffff\0" 262 263 #define CONFIG_BOOTARGS "console=ttyAMA0 earlyprintk=pl011,"\ 264 "0x1c090000 debug user_debug=31 "\ 265 "androidboot.hardware=fvpbase "\ 266 "root=/dev/vda2 rw "\ 267 "rootwait "\ 268 "loglevel=9" 269 270 #define CONFIG_BOOTCOMMAND "booti $kernel_addr $initrd_addr $fdt_addr" 271 272 #define CONFIG_BOOTDELAY 1 273 274 #endif 275 276 /* Monitor Command Prompt */ 277 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ 278 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 279 sizeof(CONFIG_SYS_PROMPT) + 16) 280 #define CONFIG_SYS_HUSH_PARSER 281 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 282 #define CONFIG_SYS_LONGHELP 283 #define CONFIG_CMDLINE_EDITING 284 #define CONFIG_SYS_MAXARGS 64 /* max command args */ 285 286 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO 287 #define CONFIG_SYS_FLASH_BASE 0x08000000 288 /* 255 x 256KiB sectors + 4 x 64KiB sectors at the end = 259 */ 289 #define CONFIG_SYS_MAX_FLASH_SECT 259 290 /* Store environment at top of flash in the same location as blank.img */ 291 /* in the Juno firmware. */ 292 #define CONFIG_ENV_ADDR 0x0BFC0000 293 #define CONFIG_ENV_SECT_SIZE 0x00010000 294 #else 295 #define CONFIG_SYS_FLASH_BASE 0x0C000000 296 /* 256 x 256KiB sectors */ 297 #define CONFIG_SYS_MAX_FLASH_SECT 256 298 /* Store environment at top of flash */ 299 #define CONFIG_ENV_ADDR 0x0FFC0000 300 #define CONFIG_ENV_SECT_SIZE 0x00040000 301 #endif 302 303 #define CONFIG_CMD_ARMFLASH 304 #define CONFIG_SYS_FLASH_CFI 1 305 #define CONFIG_FLASH_CFI_DRIVER 1 306 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_32BIT 307 #define CONFIG_SYS_MAX_FLASH_BANKS 1 308 309 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* use buffered writes */ 310 #define CONFIG_SYS_FLASH_PROTECTION /* The devices have real protection */ 311 #define CONFIG_SYS_FLASH_EMPTY_INFO /* flinfo indicates empty blocks */ 312 #define FLASH_MAX_SECTOR_SIZE 0x00040000 313 #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE 314 #define CONFIG_ENV_IS_IN_FLASH 1 315 316 317 #endif /* __VEXPRESS_AEMV8A_H */ 318