xref: /openbmc/u-boot/include/configs/vct.h (revision fca61052)
1 /*
2  * (C) Copyright 2008 Stefan Roese <sr@denx.de>, DENX Software Engineering
3  *
4  * SPDX-License-Identifier:	GPL-2.0+
5  */
6 
7 /*
8  * This file contains the configuration parameters for the VCT board
9  * family:
10  *
11  * vct_premium
12  * vct_premium_small
13  * vct_premium_onenand
14  * vct_premium_onenand_small
15  * vct_platinum
16  * vct_platinum_small
17  * vct_platinum_onenand
18  * vct_platinum_onenand_small
19  * vct_platinumavc
20  * vct_platinumavc_small
21  * vct_platinumavc_onenand
22  * vct_platinumavc_onenand_small
23  */
24 
25 #ifndef __CONFIG_H
26 #define __CONFIG_H
27 
28 #define CONFIG_DISPLAY_BOARDINFO
29 
30 #define CPU_CLOCK_RATE			324000000 /* Clock for the MIPS core */
31 #define CONFIG_SYS_MIPS_TIMER_FREQ	(CPU_CLOCK_RATE / 2)
32 
33 #define CONFIG_SKIP_LOWLEVEL_INIT	/* SDRAM is initialized by the bootstrap code */
34 
35 #define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_TEXT_BASE
36 #define CONFIG_SYS_MONITOR_LEN		(256 << 10)
37 #define CONFIG_SYS_MALLOC_LEN		(1 << 20)
38 #define CONFIG_SYS_BOOTPARAMS_LEN	(128 << 10)
39 #define CONFIG_SYS_INIT_SP_OFFSET	0x400000
40 
41 #if !defined(CONFIG_VCT_NAND) && !defined(CONFIG_VCT_ONENAND)
42 #define CONFIG_VCT_NOR
43 #else
44 #define CONFIG_SYS_NO_FLASH
45 #endif
46 
47 /*
48  * UART
49  */
50 #ifdef CONFIG_VCT_PLATINUMAVC
51 #define UART_1_BASE		0xBDC30000
52 #else
53 #define UART_1_BASE		0xBF89C000
54 #endif
55 
56 #define CONFIG_SYS_NS16550_SERIAL
57 #define CONFIG_SYS_NS16550
58 #define CONFIG_SYS_NS16550_REG_SIZE	-4
59 #define CONFIG_SYS_NS16550_COM1		UART_1_BASE
60 #define CONFIG_CONS_INDEX		1
61 #define CONFIG_SYS_NS16550_CLK		921600
62 #define CONFIG_BAUDRATE			115200
63 
64 /*
65  * SDRAM
66  */
67 #define CONFIG_SYS_SDRAM_BASE		0x80000000
68 #define CONFIG_SYS_MBYTES_SDRAM		128
69 #define CONFIG_SYS_MEMTEST_START	0x80200000
70 #define CONFIG_SYS_MEMTEST_END		0x80400000
71 #define CONFIG_SYS_LOAD_ADDR		0x80400000	/* default load address */
72 
73 #if defined(CONFIG_VCT_PREMIUM) || defined(CONFIG_VCT_PLATINUM)
74 /*
75  * SMSC91C11x Network Card
76  */
77 #define CONFIG_SMC911X
78 #define CONFIG_SMC911X_BASE	0x00000000
79 #define CONFIG_SMC911X_32_BIT
80 #define CONFIG_NET_RETRY_COUNT		20
81 #endif
82 
83 /*
84  * Commands
85  */
86 #define CONFIG_CMD_DHCP
87 #define CONFIG_CMD_ELF
88 #define CONFIG_CMD_EEPROM
89 #define CONFIG_CMD_I2C
90 
91 /*
92  * Only Premium/Platinum have ethernet support right now
93  */
94 #if (defined(CONFIG_VCT_PREMIUM) || defined(CONFIG_VCT_PLATINUM)) && \
95 	!defined(CONFIG_VCT_SMALL_IMAGE)
96 #define CONFIG_CMD_PING
97 #define CONFIG_CMD_SNTP
98 #endif
99 
100 /*
101  * Only Premium/Platinum have USB-EHCI support right now
102  */
103 #if (defined(CONFIG_VCT_PREMIUM) || defined(CONFIG_VCT_PLATINUM)) && \
104 	!defined(CONFIG_VCT_SMALL_IMAGE)
105 #define CONFIG_CMD_USB
106 #define CONFIG_CMD_FAT
107 #endif
108 
109 #if defined(CONFIG_CMD_USB)
110 #define CONFIG_USB_STORAGE
111 #define CONFIG_DOS_PARTITION
112 #define CONFIG_ISO_PARTITION
113 
114 #define CONFIG_SUPPORT_VFAT
115 
116 /*
117  * USB/EHCI
118  */
119 #define CONFIG_USB_EHCI			/* Enable EHCI USB support	*/
120 #define CONFIG_USB_EHCI_VCT		/* on VCT platform		*/
121 #define CONFIG_EHCI_MMIO_BIG_ENDIAN
122 #define CONFIG_EHCI_DESC_BIG_ENDIAN
123 #define CONFIG_EHCI_IS_TDI
124 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* re-init HCD after CMD_RESET */
125 #endif /* CONFIG_CMD_USB */
126 
127 #if defined(CONFIG_VCT_NAND)
128 #define CONFIG_CMD_NAND
129 #endif
130 
131 #if defined(CONFIG_VCT_ONENAND)
132 #define CONFIG_CMD_ONENAND
133 #endif
134 
135 /*
136  * BOOTP options
137  */
138 #define CONFIG_BOOTP_BOOTFILESIZE
139 #define CONFIG_BOOTP_BOOTPATH
140 #define CONFIG_BOOTP_GATEWAY
141 #define CONFIG_BOOTP_HOSTNAME
142 #define CONFIG_BOOTP_SUBNETMASK
143 
144 /*
145  * Miscellaneous configurable options
146  */
147 #define CONFIG_SYS_LONGHELP			/* undef to save memory		*/
148 #define CONFIG_SYS_PROMPT	"VCT# "		/* Monitor Command Prompt	*/
149 #define CONFIG_SYS_CBSIZE	512		/* Console I/O Buffer Size	*/
150 #define CONFIG_SYS_PBSIZE	(CONFIG_SYS_CBSIZE + \
151 				 sizeof(CONFIG_SYS_PROMPT) + 16)
152 #define CONFIG_SYS_MAXARGS	16		/* max number of command args	*/
153 #define CONFIG_TIMESTAMP			/* Print image info with timestamp */
154 #define CONFIG_CMDLINE_EDITING			/* add command line history	*/
155 #define CONFIG_SYS_CONSOLE_INFO_QUIET		/* don't print console @ startup*/
156 
157 /*
158  * FLASH and environment organization
159  */
160 #if defined(CONFIG_VCT_NOR)
161 #define CONFIG_ENV_IS_IN_FLASH
162 #define CONFIG_FLASH_NOT_MEM_MAPPED
163 
164 /*
165  * We need special accessor functions for the CFI FLASH driver. This
166  * can be enabled via the CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS option.
167  */
168 #define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
169 
170 /*
171  * For the non-memory-mapped NOR FLASH, we need to define the
172  * NOR FLASH area. This can't be detected via the addr2info()
173  * function, since we check for flash access in the very early
174  * U-Boot code, before the NOR FLASH is detected.
175  */
176 #define CONFIG_FLASH_BASE		0xb0000000
177 #define CONFIG_FLASH_END		0xbfffffff
178 
179 /*
180  * CFI driver settings
181  */
182 #define CONFIG_SYS_FLASH_CFI			/* The flash is CFI compatible	*/
183 #define CONFIG_FLASH_CFI_DRIVER		/* Use common CFI driver	*/
184 #define CONFIG_SYS_FLASH_CFI_AMD_RESET	1	/* Use AMD (Spansion) reset cmd */
185 #define CONFIG_SYS_FLASH_CFI_WIDTH	FLASH_CFI_16BIT	/* no byte writes on IXP4xx	*/
186 
187 #define CONFIG_SYS_FLASH_BASE		0xb0000000
188 #define CONFIG_SYS_FLASH_BANKS_LIST    { CONFIG_SYS_FLASH_BASE }
189 #define CONFIG_SYS_MAX_FLASH_BANKS	1	/* max number of memory banks		*/
190 #define CONFIG_SYS_MAX_FLASH_SECT	512	/* max number of sectors on one chip	*/
191 
192 #define CONFIG_SYS_FLASH_ERASE_TOUT	120000	/* Timeout for Flash Erase (in ms)	*/
193 #define CONFIG_SYS_FLASH_WRITE_TOUT	500	/* Timeout for Flash Write (in ms)	*/
194 
195 #ifdef CONFIG_ENV_IS_IN_FLASH
196 #define CONFIG_ENV_SECT_SIZE	0x10000		/* size of one complete sector	*/
197 #define CONFIG_ENV_ADDR		(CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN)
198 #define	CONFIG_ENV_SIZE		0x4000	/* Total Size of Environment Sector	*/
199 
200 /* Address and size of Redundant Environment Sector	*/
201 #define CONFIG_ENV_ADDR_REDUND	(CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
202 #define CONFIG_ENV_SIZE_REDUND	(CONFIG_ENV_SIZE)
203 #endif /* CONFIG_ENV_IS_IN_FLASH */
204 #endif /* CONFIG_VCT_NOR */
205 
206 #if defined(CONFIG_VCT_ONENAND)
207 #define CONFIG_USE_ONENAND_BOARD_INIT
208 #define	CONFIG_ENV_IS_IN_ONENAND
209 #define	CONFIG_SYS_ONENAND_BASE		0x00000000	/* this is not real address */
210 #define CONFIG_SYS_FLASH_BASE		0x00000000
211 #define CONFIG_ENV_ADDR			(128 << 10)	/* after compr. U-Boot image */
212 #define	CONFIG_ENV_SIZE			(128 << 10)	/* erase size */
213 #endif /* CONFIG_VCT_ONENAND */
214 
215 /*
216  * Cache Configuration
217  */
218 #define CONFIG_SYS_DCACHE_SIZE		16384
219 #define CONFIG_SYS_ICACHE_SIZE		16384
220 #define CONFIG_SYS_CACHELINE_SIZE	32
221 
222 /*
223  * I2C/EEPROM
224  */
225 #define CONFIG_SYS_I2C
226 #define CONFIG_SYS_I2C_SOFT		/* I2C bit-banged */
227 #define CONFIG_SYS_I2C_SOFT_SPEED	83000	/* 83 kHz is supposed to work */
228 #define CONFIG_SYS_I2C_SOFT_SLAVE	0x7f
229 
230 /*
231  * Software (bit-bang) I2C driver configuration
232  */
233 #define CONFIG_SYS_GPIO_I2C_SCL		11
234 #define CONFIG_SYS_GPIO_I2C_SDA		10
235 
236 #ifndef __ASSEMBLY__
237 int vct_gpio_dir(int pin, int dir);
238 void vct_gpio_set(int pin, int val);
239 int vct_gpio_get(int pin);
240 #endif
241 
242 #define I2C_INIT	vct_gpio_dir(CONFIG_SYS_GPIO_I2C_SCL, 1)
243 #define I2C_ACTIVE	vct_gpio_dir(CONFIG_SYS_GPIO_I2C_SDA, 1)
244 #define I2C_TRISTATE	vct_gpio_dir(CONFIG_SYS_GPIO_I2C_SDA, 0)
245 #define I2C_READ	vct_gpio_get(CONFIG_SYS_GPIO_I2C_SDA)
246 #define I2C_SDA(bit)	vct_gpio_set(CONFIG_SYS_GPIO_I2C_SDA, bit)
247 #define I2C_SCL(bit)	vct_gpio_set(CONFIG_SYS_GPIO_I2C_SCL, bit)
248 #define I2C_DELAY	udelay(5)	/* 1/4 I2C clock duration */
249 
250 #define CONFIG_SYS_I2C_EEPROM_ADDR	0x50
251 /* CAT24WC32 */
252 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	2	/* Bytes of address		*/
253 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5	/* The Catalyst CAT24WC32 has	*/
254 					/* 32 byte page write mode using*/
255 					/* last 5 bits of the address	*/
256 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	10   /* and takes up to 10 msec */
257 
258 #define CONFIG_BOOTCOMMAND	"run test3"
259 #define CONFIG_BOOTDELAY	5	/* autoboot after 5 seconds	*/
260 
261 /*
262  * UBI configuration
263  */
264 #if defined(CONFIG_VCT_ONENAND)
265 #define CONFIG_SYS_USE_UBI
266 #define	CONFIG_CMD_JFFS2
267 #define	CONFIG_CMD_UBI
268 #define	CONFIG_RBTREE
269 #define CONFIG_MTD_DEVICE		/* needed for mtdparts commands */
270 #define CONFIG_MTD_PARTITIONS
271 #define CONFIG_CMD_MTDPARTS
272 
273 #define MTDIDS_DEFAULT		"onenand0=onenand"
274 #define MTDPARTS_DEFAULT	"mtdparts=onenand:128k(u-boot),"	\
275 					"128k(env),"		\
276 					"20m(kernel),"		\
277 					"-(rootfs)"
278 #endif
279 
280 /*
281  * We need a small, stripped down image to fit into the first 128k OneNAND
282  * erase block (gzipped). This image only needs basic commands for FLASH
283  * (NOR/OneNAND) usage and Linux kernel booting.
284  */
285 #if defined(CONFIG_VCT_SMALL_IMAGE)
286 #undef CONFIG_CMD_ASKENV
287 #undef CONFIG_CMD_BEDBUG
288 #undef CONFIG_CMD_CACHE
289 #undef CONFIG_CMD_DHCP
290 #undef CONFIG_CMD_EEPROM
291 #undef CONFIG_CMD_EEPROM
292 #undef CONFIG_CMD_ELF
293 #undef CONFIG_CMD_FAT
294 #undef CONFIG_CMD_I2C
295 #undef CONFIG_CMD_I2C
296 #undef CONFIG_CMD_IRQ
297 #undef CONFIG_CMD_LOADY
298 #undef CONFIG_CMD_MII
299 #undef CONFIG_CMD_PING
300 #undef CONFIG_CMD_REGINFO
301 #undef CONFIG_CMD_SNTP
302 #undef CONFIG_CMD_STRINGS
303 #undef CONFIG_CMD_TERMINAL
304 #undef CONFIG_CMD_USB
305 
306 #undef CONFIG_SMC911X
307 #undef CONFIG_SYS_I2C_SOFT
308 #undef CONFIG_SOURCE
309 #undef CONFIG_SYS_LONGHELP
310 #undef CONFIG_TIMESTAMP
311 #endif /* CONFIG_VCT_SMALL_IMAGE */
312 
313 #endif  /* __CONFIG_H */
314