1 /* 2 * (C) Copyright 2008 Stefan Roese <sr@denx.de>, DENX Software Engineering 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 /* 8 * This file contains the configuration parameters for the VCT board 9 * family: 10 * 11 * vct_premium 12 * vct_premium_small 13 * vct_premium_onenand 14 * vct_premium_onenand_small 15 * vct_platinum 16 * vct_platinum_small 17 * vct_platinum_onenand 18 * vct_platinum_onenand_small 19 * vct_platinumavc 20 * vct_platinumavc_small 21 * vct_platinumavc_onenand 22 * vct_platinumavc_onenand_small 23 */ 24 25 #ifndef __CONFIG_H 26 #define __CONFIG_H 27 28 #define CONFIG_DISPLAY_BOARDINFO 29 30 #define CPU_CLOCK_RATE 324000000 /* Clock for the MIPS core */ 31 #define CONFIG_SYS_MIPS_TIMER_FREQ (CPU_CLOCK_RATE / 2) 32 33 #define CONFIG_SKIP_LOWLEVEL_INIT /* SDRAM is initialized by the bootstrap code */ 34 35 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE 36 #define CONFIG_SYS_MONITOR_LEN (256 << 10) 37 #define CONFIG_SYS_MALLOC_LEN (1 << 20) 38 #define CONFIG_SYS_BOOTPARAMS_LEN (128 << 10) 39 #define CONFIG_SYS_INIT_SP_OFFSET 0x400000 40 41 #if !defined(CONFIG_VCT_NAND) && !defined(CONFIG_VCT_ONENAND) 42 #define CONFIG_VCT_NOR 43 #else 44 #define CONFIG_SYS_NO_FLASH 45 #endif 46 47 /* 48 * UART 49 */ 50 #ifdef CONFIG_VCT_PLATINUMAVC 51 #define UART_1_BASE 0xBDC30000 52 #else 53 #define UART_1_BASE 0xBF89C000 54 #endif 55 56 #define CONFIG_SYS_NS16550_SERIAL 57 #define CONFIG_SYS_NS16550_REG_SIZE -4 58 #define CONFIG_SYS_NS16550_COM1 UART_1_BASE 59 #define CONFIG_CONS_INDEX 1 60 #define CONFIG_SYS_NS16550_CLK 921600 61 #define CONFIG_BAUDRATE 115200 62 63 /* 64 * SDRAM 65 */ 66 #define CONFIG_SYS_SDRAM_BASE 0x80000000 67 #define CONFIG_SYS_MBYTES_SDRAM 128 68 #define CONFIG_SYS_MEMTEST_START 0x80200000 69 #define CONFIG_SYS_MEMTEST_END 0x80400000 70 #define CONFIG_SYS_LOAD_ADDR 0x80400000 /* default load address */ 71 72 #if defined(CONFIG_VCT_PREMIUM) || defined(CONFIG_VCT_PLATINUM) 73 /* 74 * SMSC91C11x Network Card 75 */ 76 #define CONFIG_SMC911X 77 #define CONFIG_SMC911X_BASE 0x00000000 78 #define CONFIG_SMC911X_32_BIT 79 #define CONFIG_NET_RETRY_COUNT 20 80 #endif 81 82 /* 83 * Commands 84 */ 85 #define CONFIG_CMD_DHCP 86 #define CONFIG_CMD_EEPROM 87 #define CONFIG_CMD_I2C 88 89 /* 90 * Only Premium/Platinum have ethernet support right now 91 */ 92 #if (defined(CONFIG_VCT_PREMIUM) || defined(CONFIG_VCT_PLATINUM)) && \ 93 !defined(CONFIG_VCT_SMALL_IMAGE) 94 #define CONFIG_CMD_PING 95 #define CONFIG_CMD_SNTP 96 #endif 97 98 /* 99 * Only Premium/Platinum have USB-EHCI support right now 100 */ 101 #if (defined(CONFIG_VCT_PREMIUM) || defined(CONFIG_VCT_PLATINUM)) && \ 102 !defined(CONFIG_VCT_SMALL_IMAGE) 103 #define CONFIG_CMD_USB 104 #define CONFIG_CMD_FAT 105 #endif 106 107 #if defined(CONFIG_CMD_USB) 108 #define CONFIG_USB_STORAGE 109 #define CONFIG_DOS_PARTITION 110 #define CONFIG_ISO_PARTITION 111 112 #define CONFIG_SUPPORT_VFAT 113 114 /* 115 * USB/EHCI 116 */ 117 #define CONFIG_USB_EHCI /* Enable EHCI USB support */ 118 #define CONFIG_USB_EHCI_VCT /* on VCT platform */ 119 #define CONFIG_EHCI_MMIO_BIG_ENDIAN 120 #define CONFIG_EHCI_DESC_BIG_ENDIAN 121 #define CONFIG_EHCI_IS_TDI 122 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* re-init HCD after CMD_RESET */ 123 #endif /* CONFIG_CMD_USB */ 124 125 #if defined(CONFIG_VCT_NAND) 126 #define CONFIG_CMD_NAND 127 #endif 128 129 #if defined(CONFIG_VCT_ONENAND) 130 #define CONFIG_CMD_ONENAND 131 #endif 132 133 /* 134 * BOOTP options 135 */ 136 #define CONFIG_BOOTP_BOOTFILESIZE 137 #define CONFIG_BOOTP_BOOTPATH 138 #define CONFIG_BOOTP_GATEWAY 139 #define CONFIG_BOOTP_HOSTNAME 140 #define CONFIG_BOOTP_SUBNETMASK 141 142 /* 143 * Miscellaneous configurable options 144 */ 145 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 146 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ 147 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 148 sizeof(CONFIG_SYS_PROMPT) + 16) 149 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 150 #define CONFIG_TIMESTAMP /* Print image info with timestamp */ 151 #define CONFIG_CMDLINE_EDITING /* add command line history */ 152 #define CONFIG_SYS_CONSOLE_INFO_QUIET /* don't print console @ startup*/ 153 154 /* 155 * FLASH and environment organization 156 */ 157 #if defined(CONFIG_VCT_NOR) 158 #define CONFIG_ENV_IS_IN_FLASH 159 #define CONFIG_FLASH_NOT_MEM_MAPPED 160 161 /* 162 * We need special accessor functions for the CFI FLASH driver. This 163 * can be enabled via the CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS option. 164 */ 165 #define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS 166 167 /* 168 * For the non-memory-mapped NOR FLASH, we need to define the 169 * NOR FLASH area. This can't be detected via the addr2info() 170 * function, since we check for flash access in the very early 171 * U-Boot code, before the NOR FLASH is detected. 172 */ 173 #define CONFIG_FLASH_BASE 0xb0000000 174 #define CONFIG_FLASH_END 0xbfffffff 175 176 /* 177 * CFI driver settings 178 */ 179 #define CONFIG_SYS_FLASH_CFI /* The flash is CFI compatible */ 180 #define CONFIG_FLASH_CFI_DRIVER /* Use common CFI driver */ 181 #define CONFIG_SYS_FLASH_CFI_AMD_RESET 1 /* Use AMD (Spansion) reset cmd */ 182 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT /* no byte writes on IXP4xx */ 183 184 #define CONFIG_SYS_FLASH_BASE 0xb0000000 185 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } 186 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ 187 #define CONFIG_SYS_MAX_FLASH_SECT 512 /* max number of sectors on one chip */ 188 189 #define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */ 190 #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */ 191 192 #ifdef CONFIG_ENV_IS_IN_FLASH 193 #define CONFIG_ENV_SECT_SIZE 0x10000 /* size of one complete sector */ 194 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN) 195 #define CONFIG_ENV_SIZE 0x4000 /* Total Size of Environment Sector */ 196 197 /* Address and size of Redundant Environment Sector */ 198 #define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE) 199 #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE) 200 #endif /* CONFIG_ENV_IS_IN_FLASH */ 201 #endif /* CONFIG_VCT_NOR */ 202 203 #if defined(CONFIG_VCT_ONENAND) 204 #define CONFIG_USE_ONENAND_BOARD_INIT 205 #define CONFIG_ENV_IS_IN_ONENAND 206 #define CONFIG_SYS_ONENAND_BASE 0x00000000 /* this is not real address */ 207 #define CONFIG_SYS_FLASH_BASE 0x00000000 208 #define CONFIG_ENV_ADDR (128 << 10) /* after compr. U-Boot image */ 209 #define CONFIG_ENV_SIZE (128 << 10) /* erase size */ 210 #endif /* CONFIG_VCT_ONENAND */ 211 212 /* 213 * Cache Configuration 214 */ 215 #define CONFIG_SYS_DCACHE_SIZE 16384 216 #define CONFIG_SYS_ICACHE_SIZE 16384 217 #define CONFIG_SYS_CACHELINE_SIZE 32 218 219 /* 220 * I2C/EEPROM 221 */ 222 #define CONFIG_SYS_I2C 223 #define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */ 224 #define CONFIG_SYS_I2C_SOFT_SPEED 83000 /* 83 kHz is supposed to work */ 225 #define CONFIG_SYS_I2C_SOFT_SLAVE 0x7f 226 227 /* 228 * Software (bit-bang) I2C driver configuration 229 */ 230 #define CONFIG_SYS_GPIO_I2C_SCL 11 231 #define CONFIG_SYS_GPIO_I2C_SDA 10 232 233 #ifndef __ASSEMBLY__ 234 int vct_gpio_dir(int pin, int dir); 235 void vct_gpio_set(int pin, int val); 236 int vct_gpio_get(int pin); 237 #endif 238 239 #define I2C_INIT vct_gpio_dir(CONFIG_SYS_GPIO_I2C_SCL, 1) 240 #define I2C_ACTIVE vct_gpio_dir(CONFIG_SYS_GPIO_I2C_SDA, 1) 241 #define I2C_TRISTATE vct_gpio_dir(CONFIG_SYS_GPIO_I2C_SDA, 0) 242 #define I2C_READ vct_gpio_get(CONFIG_SYS_GPIO_I2C_SDA) 243 #define I2C_SDA(bit) vct_gpio_set(CONFIG_SYS_GPIO_I2C_SDA, bit) 244 #define I2C_SCL(bit) vct_gpio_set(CONFIG_SYS_GPIO_I2C_SCL, bit) 245 #define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */ 246 247 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 248 /* CAT24WC32 */ 249 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* Bytes of address */ 250 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5 /* The Catalyst CAT24WC32 has */ 251 /* 32 byte page write mode using*/ 252 /* last 5 bits of the address */ 253 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */ 254 255 #define CONFIG_BOOTCOMMAND "run test3" 256 #define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */ 257 258 /* 259 * UBI configuration 260 */ 261 #if defined(CONFIG_VCT_ONENAND) 262 #define CONFIG_SYS_USE_UBI 263 #define CONFIG_CMD_JFFS2 264 #define CONFIG_CMD_UBI 265 #define CONFIG_RBTREE 266 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ 267 #define CONFIG_MTD_PARTITIONS 268 #define CONFIG_CMD_MTDPARTS 269 270 #define MTDIDS_DEFAULT "onenand0=onenand" 271 #define MTDPARTS_DEFAULT "mtdparts=onenand:128k(u-boot)," \ 272 "128k(env)," \ 273 "20m(kernel)," \ 274 "-(rootfs)" 275 #endif 276 277 /* 278 * We need a small, stripped down image to fit into the first 128k OneNAND 279 * erase block (gzipped). This image only needs basic commands for FLASH 280 * (NOR/OneNAND) usage and Linux kernel booting. 281 */ 282 #if defined(CONFIG_VCT_SMALL_IMAGE) 283 #undef CONFIG_CMD_ASKENV 284 #undef CONFIG_CMD_BEDBUG 285 #undef CONFIG_CMD_CACHE 286 #undef CONFIG_CMD_DHCP 287 #undef CONFIG_CMD_EEPROM 288 #undef CONFIG_CMD_EEPROM 289 #undef CONFIG_CMD_FAT 290 #undef CONFIG_CMD_I2C 291 #undef CONFIG_CMD_I2C 292 #undef CONFIG_CMD_IRQ 293 #undef CONFIG_CMD_LOADY 294 #undef CONFIG_CMD_MII 295 #undef CONFIG_CMD_PING 296 #undef CONFIG_CMD_REGINFO 297 #undef CONFIG_CMD_SNTP 298 #undef CONFIG_CMD_STRINGS 299 #undef CONFIG_CMD_TERMINAL 300 #undef CONFIG_CMD_USB 301 302 #undef CONFIG_SMC911X 303 #undef CONFIG_SYS_I2C_SOFT 304 #undef CONFIG_SOURCE 305 #undef CONFIG_SYS_LONGHELP 306 #undef CONFIG_TIMESTAMP 307 #endif /* CONFIG_VCT_SMALL_IMAGE */ 308 309 #endif /* __CONFIG_H */ 310