1 /* 2 * (C) Copyright 2008 Stefan Roese <sr@denx.de>, DENX Software Engineering 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 /* 8 * This file contains the configuration parameters for the VCT board 9 * family: 10 * 11 * vct_premium 12 * vct_premium_small 13 * vct_premium_onenand 14 * vct_premium_onenand_small 15 * vct_platinum 16 * vct_platinum_small 17 * vct_platinum_onenand 18 * vct_platinum_onenand_small 19 * vct_platinumavc 20 * vct_platinumavc_small 21 * vct_platinumavc_onenand 22 * vct_platinumavc_onenand_small 23 */ 24 25 #ifndef __CONFIG_H 26 #define __CONFIG_H 27 28 #define CPU_CLOCK_RATE 324000000 /* Clock for the MIPS core */ 29 #define CONFIG_SYS_MIPS_TIMER_FREQ (CPU_CLOCK_RATE / 2) 30 31 #define CONFIG_SKIP_LOWLEVEL_INIT /* SDRAM is initialized by the bootstrap code */ 32 33 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE 34 #define CONFIG_SYS_MONITOR_LEN (256 << 10) 35 #define CONFIG_SYS_MALLOC_LEN (1 << 20) 36 #define CONFIG_SYS_BOOTPARAMS_LEN (128 << 10) 37 #define CONFIG_SYS_INIT_SP_OFFSET 0x400000 38 39 #if !defined(CONFIG_VCT_NAND) && !defined(CONFIG_VCT_ONENAND) 40 #define CONFIG_VCT_NOR 41 #endif 42 43 /* 44 * UART 45 */ 46 #ifdef CONFIG_VCT_PLATINUMAVC 47 #define UART_1_BASE 0xBDC30000 48 #else 49 #define UART_1_BASE 0xBF89C000 50 #endif 51 52 #define CONFIG_SYS_NS16550_SERIAL 53 #define CONFIG_SYS_NS16550_REG_SIZE -4 54 #define CONFIG_SYS_NS16550_COM1 UART_1_BASE 55 #define CONFIG_CONS_INDEX 1 56 #define CONFIG_SYS_NS16550_CLK 921600 57 #define CONFIG_BAUDRATE 115200 58 59 /* 60 * SDRAM 61 */ 62 #define CONFIG_SYS_SDRAM_BASE 0x80000000 63 #define CONFIG_SYS_MBYTES_SDRAM 128 64 #define CONFIG_SYS_MEMTEST_START 0x80200000 65 #define CONFIG_SYS_MEMTEST_END 0x80400000 66 #define CONFIG_SYS_LOAD_ADDR 0x80400000 /* default load address */ 67 68 #if defined(CONFIG_VCT_PREMIUM) || defined(CONFIG_VCT_PLATINUM) 69 /* 70 * SMSC91C11x Network Card 71 */ 72 #define CONFIG_SMC911X 73 #define CONFIG_SMC911X_BASE 0x00000000 74 #define CONFIG_SMC911X_32_BIT 75 #define CONFIG_NET_RETRY_COUNT 20 76 #endif 77 78 /* 79 * Commands 80 */ 81 #define CONFIG_CMD_EEPROM 82 83 /* 84 * Only Premium/Platinum have ethernet support right now 85 */ 86 #if (defined(CONFIG_VCT_PREMIUM) || defined(CONFIG_VCT_PLATINUM)) && \ 87 !defined(CONFIG_VCT_SMALL_IMAGE) 88 #endif 89 90 /* 91 * Only Premium/Platinum have USB-EHCI support right now 92 */ 93 #if (defined(CONFIG_VCT_PREMIUM) || defined(CONFIG_VCT_PLATINUM)) && \ 94 !defined(CONFIG_VCT_SMALL_IMAGE) 95 #endif 96 97 #if defined(CONFIG_CMD_USB) 98 #define CONFIG_SUPPORT_VFAT 99 100 /* 101 * USB/EHCI 102 */ 103 #define CONFIG_USB_EHCI /* Enable EHCI USB support */ 104 #define CONFIG_USB_EHCI_VCT /* on VCT platform */ 105 #define CONFIG_EHCI_MMIO_BIG_ENDIAN 106 #define CONFIG_EHCI_DESC_BIG_ENDIAN 107 #define CONFIG_EHCI_IS_TDI 108 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* re-init HCD after CMD_RESET */ 109 #endif /* CONFIG_CMD_USB */ 110 111 #if defined(CONFIG_VCT_NAND) 112 #define CONFIG_CMD_NAND 113 #endif 114 115 #if defined(CONFIG_VCT_ONENAND) 116 #define CONFIG_CMD_ONENAND 117 #endif 118 119 /* 120 * BOOTP options 121 */ 122 #define CONFIG_BOOTP_BOOTFILESIZE 123 #define CONFIG_BOOTP_BOOTPATH 124 #define CONFIG_BOOTP_GATEWAY 125 #define CONFIG_BOOTP_HOSTNAME 126 #define CONFIG_BOOTP_SUBNETMASK 127 128 /* 129 * Miscellaneous configurable options 130 */ 131 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 132 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ 133 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 134 sizeof(CONFIG_SYS_PROMPT) + 16) 135 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 136 #define CONFIG_TIMESTAMP /* Print image info with timestamp */ 137 #define CONFIG_CMDLINE_EDITING /* add command line history */ 138 139 /* 140 * FLASH and environment organization 141 */ 142 #if defined(CONFIG_VCT_NOR) 143 #define CONFIG_ENV_IS_IN_FLASH 144 #define CONFIG_FLASH_NOT_MEM_MAPPED 145 146 /* 147 * We need special accessor functions for the CFI FLASH driver. This 148 * can be enabled via the CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS option. 149 */ 150 #define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS 151 152 /* 153 * For the non-memory-mapped NOR FLASH, we need to define the 154 * NOR FLASH area. This can't be detected via the addr2info() 155 * function, since we check for flash access in the very early 156 * U-Boot code, before the NOR FLASH is detected. 157 */ 158 #define CONFIG_FLASH_BASE 0xb0000000 159 #define CONFIG_FLASH_END 0xbfffffff 160 161 /* 162 * CFI driver settings 163 */ 164 #define CONFIG_SYS_FLASH_CFI /* The flash is CFI compatible */ 165 #define CONFIG_FLASH_CFI_DRIVER /* Use common CFI driver */ 166 #define CONFIG_SYS_FLASH_CFI_AMD_RESET 1 /* Use AMD (Spansion) reset cmd */ 167 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT /* no byte writes on IXP4xx */ 168 169 #define CONFIG_SYS_FLASH_BASE 0xb0000000 170 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } 171 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ 172 #define CONFIG_SYS_MAX_FLASH_SECT 512 /* max number of sectors on one chip */ 173 174 #define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */ 175 #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */ 176 177 #ifdef CONFIG_ENV_IS_IN_FLASH 178 #define CONFIG_ENV_SECT_SIZE 0x10000 /* size of one complete sector */ 179 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN) 180 #define CONFIG_ENV_SIZE 0x4000 /* Total Size of Environment Sector */ 181 182 /* Address and size of Redundant Environment Sector */ 183 #define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE) 184 #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE) 185 #endif /* CONFIG_ENV_IS_IN_FLASH */ 186 #endif /* CONFIG_VCT_NOR */ 187 188 #if defined(CONFIG_VCT_ONENAND) 189 #define CONFIG_USE_ONENAND_BOARD_INIT 190 #define CONFIG_ENV_IS_IN_ONENAND 191 #define CONFIG_SYS_ONENAND_BASE 0x00000000 /* this is not real address */ 192 #define CONFIG_SYS_FLASH_BASE 0x00000000 193 #define CONFIG_ENV_ADDR (128 << 10) /* after compr. U-Boot image */ 194 #define CONFIG_ENV_SIZE (128 << 10) /* erase size */ 195 #endif /* CONFIG_VCT_ONENAND */ 196 197 /* 198 * I2C/EEPROM 199 */ 200 #define CONFIG_SYS_I2C 201 #define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */ 202 #define CONFIG_SYS_I2C_SOFT_SPEED 83000 /* 83 kHz is supposed to work */ 203 #define CONFIG_SYS_I2C_SOFT_SLAVE 0x7f 204 205 /* 206 * Software (bit-bang) I2C driver configuration 207 */ 208 #define CONFIG_SYS_GPIO_I2C_SCL 11 209 #define CONFIG_SYS_GPIO_I2C_SDA 10 210 211 #ifndef __ASSEMBLY__ 212 int vct_gpio_dir(int pin, int dir); 213 void vct_gpio_set(int pin, int val); 214 int vct_gpio_get(int pin); 215 #endif 216 217 #define I2C_INIT vct_gpio_dir(CONFIG_SYS_GPIO_I2C_SCL, 1) 218 #define I2C_ACTIVE vct_gpio_dir(CONFIG_SYS_GPIO_I2C_SDA, 1) 219 #define I2C_TRISTATE vct_gpio_dir(CONFIG_SYS_GPIO_I2C_SDA, 0) 220 #define I2C_READ vct_gpio_get(CONFIG_SYS_GPIO_I2C_SDA) 221 #define I2C_SDA(bit) vct_gpio_set(CONFIG_SYS_GPIO_I2C_SDA, bit) 222 #define I2C_SCL(bit) vct_gpio_set(CONFIG_SYS_GPIO_I2C_SCL, bit) 223 #define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */ 224 225 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 226 /* CAT24WC32 */ 227 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* Bytes of address */ 228 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5 /* The Catalyst CAT24WC32 has */ 229 /* 32 byte page write mode using*/ 230 /* last 5 bits of the address */ 231 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */ 232 233 #define CONFIG_BOOTCOMMAND "run test3" 234 235 /* 236 * UBI configuration 237 */ 238 #if defined(CONFIG_VCT_ONENAND) 239 #define CONFIG_SYS_USE_UBI 240 #define CONFIG_CMD_JFFS2 241 #define CONFIG_RBTREE 242 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ 243 #define CONFIG_MTD_PARTITIONS 244 #define CONFIG_CMD_MTDPARTS 245 246 #define MTDIDS_DEFAULT "onenand0=onenand" 247 #define MTDPARTS_DEFAULT "mtdparts=onenand:128k(u-boot)," \ 248 "128k(env)," \ 249 "20m(kernel)," \ 250 "-(rootfs)" 251 #endif 252 253 /* 254 * We need a small, stripped down image to fit into the first 128k OneNAND 255 * erase block (gzipped). This image only needs basic commands for FLASH 256 * (NOR/OneNAND) usage and Linux kernel booting. 257 */ 258 #if defined(CONFIG_VCT_SMALL_IMAGE) 259 #undef CONFIG_CMD_BEDBUG 260 #undef CONFIG_CMD_EEPROM 261 #undef CONFIG_CMD_EEPROM 262 #undef CONFIG_CMD_IRQ 263 #undef CONFIG_CMD_LOADY 264 #undef CONFIG_CMD_REGINFO 265 #undef CONFIG_CMD_STRINGS 266 #undef CONFIG_CMD_TERMINAL 267 268 #undef CONFIG_SMC911X 269 #undef CONFIG_SYS_I2C_SOFT 270 #undef CONFIG_SOURCE 271 #undef CONFIG_SYS_LONGHELP 272 #undef CONFIG_TIMESTAMP 273 #endif /* CONFIG_VCT_SMALL_IMAGE */ 274 275 #endif /* __CONFIG_H */ 276