xref: /openbmc/u-boot/include/configs/usbarmory.h (revision e9c847c3)
1 /*
2  * USB armory MkI board configuration settings
3  * http://inversepath.com/usbarmory
4  *
5  * Copyright (C) 2015, Inverse Path
6  * Andrej Rosano <andrej@inversepath.com>
7  *
8  * SPDX-License-Identifier:|____GPL-2.0+
9  */
10 
11 #ifndef __CONFIG_H
12 #define __CONFIG_H
13 
14 #define CONFIG_MX53
15 #define CONFIG_SYS_FSL_CLK
16 #define CONFIG_BOARD_EARLY_INIT_F
17 #define CONFIG_MXC_GPIO
18 #define CONFIG_SYS_NO_FLASH
19 
20 #include <asm/arch/imx-regs.h>
21 
22 #include <config_distro_defaults.h>
23 
24 /* U-Boot environment */
25 #define CONFIG_ENV_OFFSET	(6 * 64 * 1024)
26 #define CONFIG_ENV_SIZE		(8 * 1024)
27 #define CONFIG_ENV_IS_IN_MMC
28 #define CONFIG_SYS_MMC_ENV_DEV	0
29 
30 /* U-Boot general configurations */
31 #define CONFIG_SYS_CBSIZE	512
32 #define CONFIG_SYS_PBSIZE	(CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
33 #define CONFIG_SYS_MAXARGS	16
34 #define CONFIG_SYS_BARGSIZE	CONFIG_SYS_CBSIZE
35 
36 /* UART */
37 #define CONFIG_MXC_UART
38 #define CONFIG_MXC_UART_BASE	UART1_BASE
39 #define CONFIG_CONS_INDEX	1
40 #define CONFIG_BAUDRATE		115200
41 
42 /* SD/MMC */
43 #define CONFIG_FSL_ESDHC
44 #define CONFIG_SYS_FSL_ESDHC_ADDR	0
45 #define CONFIG_SYS_FSL_ESDHC_NUM	1
46 #define CONFIG_MMC
47 #define CONFIG_GENERIC_MMC
48 
49 /* USB */
50 #define CONFIG_USB_EHCI
51 #define CONFIG_USB_EHCI_MX5
52 #define CONFIG_MXC_USB_PORT	1
53 #define CONFIG_MXC_USB_PORTSC	(PORT_PTS_UTMI | PORT_PTS_PTW)
54 #define CONFIG_MXC_USB_FLAGS	0
55 
56 /* I2C */
57 #define CONFIG_SYS_I2C
58 #define CONFIG_SYS_I2C_MXC
59 #define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
60 #define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
61 
62 /* Fuse */
63 #define CONFIG_CMD_FUSE
64 #define CONFIG_FSL_IIM
65 
66 /* U-Boot memory offsets */
67 #define CONFIG_LOADADDR		0x72000000
68 #define CONFIG_SYS_TEXT_BASE	0x77800000
69 #define CONFIG_SYS_LOAD_ADDR	CONFIG_LOADADDR
70 
71 /* Linux boot */
72 #define CONFIG_HOSTNAME		usbarmory
73 #define CONFIG_BOOTCOMMAND						\
74 	"run distro_bootcmd; "						\
75 	"setenv bootargs console=${console} ${bootargs_default}; "	\
76 	"ext2load mmc 0:1 ${kernel_addr_r} /boot/zImage; "		\
77 	"ext2load mmc 0:1 ${fdt_addr_r} /boot/${fdtfile}; "		\
78 	"bootz ${kernel_addr_r} - ${fdt_addr_r}"
79 
80 #define BOOT_TARGET_DEVICES(func) func(MMC, mmc, 0)
81 
82 #include <config_distro_bootcmd.h>
83 
84 #define MEM_LAYOUT_ENV_SETTINGS			\
85 	"kernel_addr_r=0x70800000\0"		\
86 	"fdt_addr_r=0x71000000\0"		\
87 	"scriptaddr=0x70800000\0"		\
88 	"pxefile_addr_r=0x70800000\0"		\
89 	"ramdisk_addr_r=0x73000000\0"
90 
91 #define CONFIG_EXTRA_ENV_SETTINGS				\
92 	MEM_LAYOUT_ENV_SETTINGS					\
93 	"bootargs_default=root=/dev/mmcblk0p1 rootwait rw\0"	\
94 	"fdtfile=imx53-usbarmory.dtb\0"				\
95 	"console=ttymxc0,115200\0"				\
96 	BOOTENV
97 
98 #ifndef CONFIG_CMDLINE
99 #define CONFIG_BOOTARGS "console=ttymxc0,115200 root=/dev/mmcblk0p1 rootwait rw"
100 #define USBARMORY_FIT_PATH	"/boot/usbarmory.itb"
101 #define USBARMORY_FIT_ADDR	"0x70800000"
102 #endif
103 
104 /* Physical Memory Map */
105 #define CONFIG_NR_DRAM_BANKS		1
106 #define PHYS_SDRAM			CSD0_BASE_ADDR
107 #define PHYS_SDRAM_SIZE			(gd->ram_size)
108 
109 #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM
110 #define CONFIG_SYS_INIT_RAM_ADDR	IRAM_BASE_ADDR
111 #define CONFIG_SYS_INIT_RAM_SIZE	IRAM_SIZE
112 
113 #define CONFIG_SYS_INIT_SP_OFFSET \
114 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
115 #define CONFIG_SYS_INIT_SP_ADDR \
116 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
117 
118 #define CONFIG_SYS_MEMTEST_START	0x70000000
119 #define CONFIG_SYS_MEMTEST_END		0x90000000
120 
121 #define CONFIG_SYS_MALLOC_LEN		(10 * 1024 * 1024)
122 
123 #endif				/* __CONFIG_H */
124