xref: /openbmc/u-boot/include/configs/usbarmory.h (revision 762161b0)
1 /*
2  * USB armory MkI board configuration settings
3  * http://inversepath.com/usbarmory
4  *
5  * Copyright (C) 2015, Inverse Path
6  * Andrej Rosano <andrej@inversepath.com>
7  *
8  * SPDX-License-Identifier:|____GPL-2.0+
9  */
10 
11 #ifndef __CONFIG_H
12 #define __CONFIG_H
13 
14 #define CONFIG_MX53
15 #define CONFIG_SYS_FSL_CLK
16 #define CONFIG_BOARD_EARLY_INIT_F
17 #define CONFIG_MXC_GPIO
18 #define CONFIG_SYS_NO_FLASH
19 
20 #include <asm/arch/imx-regs.h>
21 
22 #include <config_distro_defaults.h>
23 
24 /* U-Boot environment */
25 #define CONFIG_ENV_OFFSET	(6 * 64 * 1024)
26 #define CONFIG_ENV_SIZE		(8 * 1024)
27 #define CONFIG_ENV_IS_IN_MMC
28 #define CONFIG_SYS_MMC_ENV_DEV	0
29 
30 /* U-Boot general configurations */
31 #define CONFIG_SYS_CBSIZE	512
32 #define CONFIG_SYS_PBSIZE	(CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
33 #define CONFIG_SYS_MAXARGS	16
34 #define CONFIG_SYS_BARGSIZE	CONFIG_SYS_CBSIZE
35 
36 /* UART */
37 #define CONFIG_MXC_UART
38 #define CONFIG_MXC_UART_BASE	UART1_BASE
39 #define CONFIG_CONS_INDEX	1
40 #define CONFIG_BAUDRATE		115200
41 
42 /* SD/MMC */
43 #define CONFIG_FSL_ESDHC
44 #define CONFIG_SYS_FSL_ESDHC_ADDR	0
45 #define CONFIG_SYS_FSL_ESDHC_NUM	1
46 #define CONFIG_GENERIC_MMC
47 
48 /* USB */
49 #define CONFIG_USB_EHCI
50 #define CONFIG_USB_EHCI_MX5
51 #define CONFIG_MXC_USB_PORT	1
52 #define CONFIG_MXC_USB_PORTSC	(PORT_PTS_UTMI | PORT_PTS_PTW)
53 #define CONFIG_MXC_USB_FLAGS	0
54 
55 /* I2C */
56 #define CONFIG_SYS_I2C
57 #define CONFIG_SYS_I2C_MXC
58 #define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
59 #define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
60 
61 /* Fuse */
62 #define CONFIG_CMD_FUSE
63 #define CONFIG_FSL_IIM
64 
65 /* U-Boot memory offsets */
66 #define CONFIG_LOADADDR		0x72000000
67 #define CONFIG_SYS_TEXT_BASE	0x77800000
68 #define CONFIG_SYS_LOAD_ADDR	CONFIG_LOADADDR
69 
70 /* Linux boot */
71 #define CONFIG_HOSTNAME		usbarmory
72 #define CONFIG_BOOTCOMMAND						\
73 	"run distro_bootcmd; "						\
74 	"setenv bootargs console=${console} ${bootargs_default}; "	\
75 	"ext2load mmc 0:1 ${kernel_addr_r} /boot/zImage; "		\
76 	"ext2load mmc 0:1 ${fdt_addr_r} /boot/${fdtfile}; "		\
77 	"bootz ${kernel_addr_r} - ${fdt_addr_r}"
78 
79 #define BOOT_TARGET_DEVICES(func) func(MMC, mmc, 0)
80 
81 #include <config_distro_bootcmd.h>
82 
83 #define MEM_LAYOUT_ENV_SETTINGS			\
84 	"kernel_addr_r=0x70800000\0"		\
85 	"fdt_addr_r=0x71000000\0"		\
86 	"scriptaddr=0x70800000\0"		\
87 	"pxefile_addr_r=0x70800000\0"		\
88 	"ramdisk_addr_r=0x73000000\0"
89 
90 #define CONFIG_EXTRA_ENV_SETTINGS				\
91 	MEM_LAYOUT_ENV_SETTINGS					\
92 	"bootargs_default=root=/dev/mmcblk0p1 rootwait rw\0"	\
93 	"fdtfile=imx53-usbarmory.dtb\0"				\
94 	"console=ttymxc0,115200\0"				\
95 	BOOTENV
96 
97 #ifndef CONFIG_CMDLINE
98 #define CONFIG_BOOTARGS "console=ttymxc0,115200 root=/dev/mmcblk0p1 rootwait rw"
99 #define USBARMORY_FIT_PATH	"/boot/usbarmory.itb"
100 #define USBARMORY_FIT_ADDR	"0x70800000"
101 #endif
102 
103 /* Physical Memory Map */
104 #define CONFIG_NR_DRAM_BANKS		1
105 #define PHYS_SDRAM			CSD0_BASE_ADDR
106 #define PHYS_SDRAM_SIZE			(gd->ram_size)
107 
108 #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM
109 #define CONFIG_SYS_INIT_RAM_ADDR	IRAM_BASE_ADDR
110 #define CONFIG_SYS_INIT_RAM_SIZE	IRAM_SIZE
111 
112 #define CONFIG_SYS_INIT_SP_OFFSET \
113 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
114 #define CONFIG_SYS_INIT_SP_ADDR \
115 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
116 
117 #define CONFIG_SYS_MEMTEST_START	0x70000000
118 #define CONFIG_SYS_MEMTEST_END		0x90000000
119 
120 #define CONFIG_SYS_MALLOC_LEN		(10 * 1024 * 1024)
121 
122 #endif				/* __CONFIG_H */
123