xref: /openbmc/u-boot/include/configs/usbarmory.h (revision 2d2811c2)
1 /*
2  * USB armory MkI board configuration settings
3  * http://inversepath.com/usbarmory
4  *
5  * Copyright (C) 2015, Inverse Path
6  * Andrej Rosano <andrej@inversepath.com>
7  *
8  * SPDX-License-Identifier:|____GPL-2.0+
9  */
10 
11 #ifndef __CONFIG_H
12 #define __CONFIG_H
13 
14 #define CONFIG_MX53
15 #define CONFIG_DISPLAY_CPUINFO
16 #define CONFIG_DISPLAY_BOARDINFO
17 #define CONFIG_SYS_FSL_CLK
18 #define CONFIG_BOARD_EARLY_INIT_F
19 #define CONFIG_MXC_GPIO
20 #define CONFIG_SYS_NO_FLASH
21 
22 #include <asm/arch/imx-regs.h>
23 
24 #include <config_distro_defaults.h>
25 
26 /* U-Boot environment */
27 #define CONFIG_ENV_OFFSET	(6 * 64 * 1024)
28 #define CONFIG_ENV_SIZE		(8 * 1024)
29 #define CONFIG_ENV_IS_IN_MMC
30 #define CONFIG_SYS_MMC_ENV_DEV	0
31 
32 /* U-Boot general configurations */
33 #define CONFIG_SYS_CBSIZE	512
34 #define CONFIG_SYS_PBSIZE	(CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
35 #define CONFIG_SYS_MAXARGS	16
36 #define CONFIG_SYS_BARGSIZE	CONFIG_SYS_CBSIZE
37 
38 /* UART */
39 #define CONFIG_MXC_UART
40 #define CONFIG_MXC_UART_BASE	UART1_BASE
41 #define CONFIG_CONS_INDEX	1
42 #define CONFIG_BAUDRATE		115200
43 
44 /* SD/MMC */
45 #define CONFIG_FSL_ESDHC
46 #define CONFIG_SYS_FSL_ESDHC_ADDR	0
47 #define CONFIG_SYS_FSL_ESDHC_NUM	1
48 #define CONFIG_MMC
49 #define CONFIG_GENERIC_MMC
50 
51 /* USB */
52 #define CONFIG_USB_EHCI
53 #define CONFIG_USB_EHCI_MX5
54 #define CONFIG_USB_STORAGE
55 #define CONFIG_MXC_USB_PORT	1
56 #define CONFIG_MXC_USB_PORTSC	(PORT_PTS_UTMI | PORT_PTS_PTW)
57 #define CONFIG_MXC_USB_FLAGS	0
58 
59 /* I2C */
60 #define CONFIG_SYS_I2C
61 #define CONFIG_SYS_I2C_MXC
62 #define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
63 #define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
64 
65 /* Fuse */
66 #define CONFIG_CMD_FUSE
67 #define CONFIG_FSL_IIM
68 
69 /* U-Boot memory offsets */
70 #define CONFIG_LOADADDR		0x72000000
71 #define CONFIG_SYS_TEXT_BASE	0x77800000
72 #define CONFIG_SYS_LOAD_ADDR	CONFIG_LOADADDR
73 
74 /* Linux boot */
75 #define CONFIG_HOSTNAME		usbarmory
76 #define CONFIG_BOOTCOMMAND						\
77 	"run distro_bootcmd; "						\
78 	"setenv bootargs console=${console} ${bootargs_default}; "	\
79 	"ext2load mmc 0:1 ${kernel_addr_r} /boot/zImage; "		\
80 	"ext2load mmc 0:1 ${fdt_addr_r} /boot/${fdtfile}; "		\
81 	"bootz ${kernel_addr_r} - ${fdt_addr_r}"
82 
83 #define BOOT_TARGET_DEVICES(func) func(MMC, mmc, 0)
84 
85 #include <config_distro_bootcmd.h>
86 
87 #define MEM_LAYOUT_ENV_SETTINGS			\
88 	"kernel_addr_r=0x70800000\0"		\
89 	"fdt_addr_r=0x71000000\0"		\
90 	"scriptaddr=0x70800000\0"		\
91 	"pxefile_addr_r=0x70800000\0"		\
92 	"ramdisk_addr_r=0x73000000\0"
93 
94 #define CONFIG_EXTRA_ENV_SETTINGS				\
95 	MEM_LAYOUT_ENV_SETTINGS					\
96 	"bootargs_default=root=/dev/mmcblk0p1 rootwait rw\0"	\
97 	"fdtfile=imx53-usbarmory.dtb\0"				\
98 	"console=ttymxc0,115200\0"				\
99 	BOOTENV
100 
101 #ifndef CONFIG_CMDLINE
102 #define CONFIG_BOOTARGS "console=ttymxc0,115200 root=/dev/mmcblk0p1 rootwait rw"
103 #define USBARMORY_FIT_PATH	"/boot/usbarmory.itb"
104 #define USBARMORY_FIT_ADDR	"0x70800000"
105 #endif
106 
107 /* Physical Memory Map */
108 #define CONFIG_NR_DRAM_BANKS		1
109 #define PHYS_SDRAM			CSD0_BASE_ADDR
110 #define PHYS_SDRAM_SIZE			(gd->ram_size)
111 
112 #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM
113 #define CONFIG_SYS_INIT_RAM_ADDR	IRAM_BASE_ADDR
114 #define CONFIG_SYS_INIT_RAM_SIZE	IRAM_SIZE
115 
116 #define CONFIG_SYS_INIT_SP_OFFSET \
117 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
118 #define CONFIG_SYS_INIT_SP_ADDR \
119 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
120 
121 #define CONFIG_SYS_MEMTEST_START	0x70000000
122 #define CONFIG_SYS_MEMTEST_END		0x90000000
123 
124 #define CONFIG_SYS_MALLOC_LEN		(10 * 1024 * 1024)
125 
126 #endif				/* __CONFIG_H */
127