1 /* 2 * (C) Copyright 2007-2013 3 * Stelian Pop <stelian.pop@leadtechdesign.com> 4 * Lead Tech Design <www.leadtechdesign.com> 5 * Thomas Petazzoni, Free Electrons, <thomas.petazzoni@free-electrons.com> 6 * Mateusz Kulikowski <mateusz.kulikowski@gmail.com> 7 * 8 * Settings for Calao USB-A9263 board 9 * 10 * U-Boot image has to be less than 200704 bytes, otherwise at91bootstrap 11 * installed on board will not be able to load it properly. 12 * 13 * SPDX-License-Identifier: GPL-2.0+ 14 */ 15 16 #ifndef __CONFIG_H 17 #define __CONFIG_H 18 #include <asm/hardware.h> 19 20 /* ARM asynchronous clock */ 21 #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */ 22 #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 23 24 #define CONFIG_MACH_TYPE MACH_TYPE_USB_A9263 25 26 #define CONFIG_ARCH_CPU_INIT 27 28 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 29 #define CONFIG_SETUP_MEMORY_TAGS 30 #define CONFIG_INITRD_TAG 31 32 #define CONFIG_SKIP_LOWLEVEL_INIT 33 34 #define CONFIG_SYS_TEXT_BASE 0x23f00000 35 36 /* 37 * Hardware drivers 38 */ 39 #define CONFIG_AT91_GPIO 40 41 /* serial console */ 42 #define CONFIG_ATMEL_USART 43 #define CONFIG_USART_BASE ATMEL_BASE_DBGU 44 #define CONFIG_USART_ID ATMEL_ID_SYS 45 46 47 /* 48 * BOOTP options 49 */ 50 #define CONFIG_BOOTP_BOOTFILESIZE 51 #define CONFIG_BOOTP_BOOTPATH 52 #define CONFIG_BOOTP_GATEWAY 53 #define CONFIG_BOOTP_HOSTNAME 54 55 /* SDRAM */ 56 #define CONFIG_NR_DRAM_BANKS 1 57 #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1 58 #define CONFIG_SYS_SDRAM_SIZE 0x04000000 59 60 #define CONFIG_SYS_INIT_SP_ADDR \ 61 (ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE) 62 63 /* DataFlash */ 64 #define CONFIG_ATMEL_DATAFLASH_SPI 65 #define CONFIG_HAS_DATAFLASH 66 #define CONFIG_SYS_MAX_DATAFLASH_BANKS 1 67 #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 68 #define AT91_SPI_CLK 8000000 69 #define DATAFLASH_TCSS (0x1a << 16) 70 #define DATAFLASH_TCHS (0x1 << 24) 71 72 /* NAND flash */ 73 #ifdef CONFIG_CMD_NAND 74 #define CONFIG_NAND_ATMEL 75 #define CONFIG_SYS_MAX_NAND_DEVICE 1 76 #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 77 /* our ALE is AD21 */ 78 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) 79 /* our CLE is AD22 */ 80 #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) 81 #define CONFIG_SYS_NAND_ENABLE_PIN GPIO_PIN_PD(15) 82 #define CONFIG_SYS_NAND_READY_PIN GPIO_PIN_PA(22) 83 #endif 84 85 #define MTDPARTS_DEFAULT \ 86 "mtdparts=atmel_nand:16m(kernel)ro,120m(root1),-(root2)" 87 88 /* Ethernet */ 89 #define CONFIG_MACB 90 #define CONFIG_RMII 91 #define CONFIG_NET_RETRY_COUNT 20 92 #define CONFIG_AT91_WANTS_COMMON_PHY 93 94 /* USB */ 95 #ifdef CONFIG_CMD_USB 96 #define CONFIG_USB_ATMEL 97 #define CONFIG_USB_OHCI_NEW 98 #define CONFIG_SYS_USB_OHCI_CPU_INIT 99 #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00a00000 100 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9263" 101 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 102 #endif 103 104 #define CONFIG_SYS_LOAD_ADDR 0x22000000 105 106 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE 107 #define CONFIG_SYS_MEMTEST_END 0x23e00000 108 109 /* bootstrap + u-boot + env in dataflash on CS0 */ 110 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + 0x4000) 111 #define CONFIG_ENV_OFFSET 0x2000 112 #define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \ 113 CONFIG_ENV_OFFSET) 114 #define CONFIG_ENV_SIZE 0x2000 115 #define CONFIG_BOOTCOMMAND "nboot 21000000 0" 116 #define CONFIG_BOOTARGS "console=ttyS0,115200 " \ 117 "root=/dev/mtdblock1 " \ 118 "mtdparts=" MTDPARTS_DEFAULT " " \ 119 "rw rootfstype=jffs2" 120 #define CONFIG_EXTRA_ENV_SETTINGS \ 121 "mtdparts=" MTDPARTS_DEFAULT "\0" \ 122 123 #define CONFIG_SYS_CBSIZE 256 124 #define CONFIG_SYS_MAXARGS 16 125 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 126 sizeof(CONFIG_SYS_PROMPT) + 16) 127 #define CONFIG_CMDLINE_EDITING 128 #define CONFIG_AUTO_COMPLETE 129 #define CONFIG_SYS_LONGHELP 130 131 /* 132 * Size of malloc() pool 133 */ 134 #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000) 135 136 #endif 137