1 /* 2 * Copyright (C) 2012-2015 Panasonic Corporation 3 * Copyright (C) 2015-2016 Socionext Inc. 4 * Author: Masahiro Yamada <yamada.masahiro@socionext.com> 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 /* U-Boot - Common settings for UniPhier Family */ 10 11 #ifndef __CONFIG_UNIPHIER_COMMON_H__ 12 #define __CONFIG_UNIPHIER_COMMON_H__ 13 14 #define CONFIG_ARMV7_PSCI_1_0 15 16 /*----------------------------------------------------------------------- 17 * MMU and Cache Setting 18 *----------------------------------------------------------------------*/ 19 20 /* Comment out the following to enable L1 cache */ 21 /* #define CONFIG_SYS_ICACHE_OFF */ 22 /* #define CONFIG_SYS_DCACHE_OFF */ 23 24 #define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024) 25 26 #define CONFIG_TIMESTAMP 27 28 /* FLASH related */ 29 #define CONFIG_MTD_DEVICE 30 31 #define CONFIG_FLASH_CFI_DRIVER 32 #define CONFIG_SYS_FLASH_CFI 33 34 #define CONFIG_SYS_MAX_FLASH_SECT 256 35 #define CONFIG_SYS_MONITOR_BASE 0 36 #define CONFIG_SYS_MONITOR_LEN 0x00080000 /* 512KB */ 37 #define CONFIG_SYS_FLASH_BASE 0 38 39 /* 40 * flash_toggle does not work for our support card. 41 * We need to use flash_status_poll. 42 */ 43 #define CONFIG_SYS_CFI_FLASH_STATUS_POLL 44 45 #define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ 46 47 #define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1 48 49 /* serial console configuration */ 50 51 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 52 53 #define CONFIG_CMDLINE_EDITING /* add command line history */ 54 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ 55 /* Boot Argument Buffer Size */ 56 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) 57 58 #define CONFIG_CONS_INDEX 1 59 60 #define CONFIG_ENV_OFFSET 0x100000 61 #define CONFIG_ENV_SIZE 0x2000 62 /* #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) */ 63 64 #define CONFIG_SYS_MMC_ENV_DEV 0 65 #define CONFIG_SYS_MMC_ENV_PART 1 66 67 #if !defined(CONFIG_ARM64) 68 /* Time clock 1MHz */ 69 #define CONFIG_SYS_TIMER_RATE 1000000 70 #endif 71 72 #define CONFIG_SYS_MAX_NAND_DEVICE 1 73 #define CONFIG_SYS_NAND_ONFI_DETECTION 74 75 #define CONFIG_NAND_DENALI_ECC_SIZE 1024 76 77 #define CONFIG_SYS_NAND_REGS_BASE 0x68100000 78 #define CONFIG_SYS_NAND_DATA_BASE 0x68000000 79 80 #define CONFIG_SYS_NAND_USE_FLASH_BBT 81 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 82 83 /* SD/MMC */ 84 #define CONFIG_SUPPORT_EMMC_BOOT 85 86 /* memtest works on */ 87 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE 88 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x01000000) 89 90 /* 91 * Network Configuration 92 */ 93 #define CONFIG_SERVERIP 192.168.11.1 94 #define CONFIG_IPADDR 192.168.11.10 95 #define CONFIG_GATEWAYIP 192.168.11.1 96 #define CONFIG_NETMASK 255.255.255.0 97 98 #define CONFIG_LOADADDR 0x84000000 99 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 100 101 #define CONFIG_CMDLINE_EDITING /* add command line history */ 102 103 #if defined(CONFIG_ARM64) 104 /* ARM Trusted Firmware */ 105 #define BOOT_IMAGES \ 106 "second_image=unph_bl.bin\0" \ 107 "third_image=fip.bin\0" 108 #else 109 #define BOOT_IMAGES \ 110 "second_image=u-boot-spl.bin\0" \ 111 "third_image=u-boot.bin\0" 112 #endif 113 114 #define CONFIG_BOOTCOMMAND "run $bootmode" 115 116 #define CONFIG_ROOTPATH "/nfs/root/path" 117 #define CONFIG_NFSBOOTCOMMAND \ 118 "setenv bootargs $bootargs root=/dev/nfs rw " \ 119 "nfsroot=$serverip:$rootpath " \ 120 "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off;" \ 121 "run __nfsboot" 122 123 #ifdef CONFIG_FIT 124 #define CONFIG_BOOTFILE "fitImage" 125 #define LINUXBOOT_ENV_SETTINGS \ 126 "fit_addr=0x00100000\0" \ 127 "fit_addr_r=0x84100000\0" \ 128 "fit_size=0x00f00000\0" \ 129 "norboot=setexpr fit_addr $nor_base + $fit_addr &&" \ 130 "bootm $fit_addr\0" \ 131 "nandboot=nand read $fit_addr_r $fit_addr $fit_size &&" \ 132 "bootm $fit_addr_r\0" \ 133 "tftpboot=tftpboot $fit_addr_r $bootfile &&" \ 134 "bootm $fit_addr_r\0" \ 135 "__nfsboot=run tftpboot\0" 136 #else 137 #ifdef CONFIG_ARM64 138 #define CONFIG_BOOTFILE "Image.gz" 139 #define LINUXBOOT_CMD "booti" 140 #define KERNEL_ADDR_LOAD "kernel_addr_load=0x84200000\0" 141 #define KERNEL_ADDR_R "kernel_addr_r=0x82080000\0" 142 #else 143 #define CONFIG_BOOTFILE "zImage" 144 #define LINUXBOOT_CMD "bootz" 145 #define KERNEL_ADDR_LOAD "kernel_addr_load=0x80208000\0" 146 #define KERNEL_ADDR_R "kernel_addr_r=0x80208000\0" 147 #endif 148 #define LINUXBOOT_ENV_SETTINGS \ 149 "fdt_addr=0x00100000\0" \ 150 "fdt_addr_r=0x84100000\0" \ 151 "fdt_size=0x00008000\0" \ 152 "kernel_addr=0x00200000\0" \ 153 KERNEL_ADDR_LOAD \ 154 KERNEL_ADDR_R \ 155 "kernel_size=0x00800000\0" \ 156 "ramdisk_addr=0x00a00000\0" \ 157 "ramdisk_addr_r=0x84a00000\0" \ 158 "ramdisk_size=0x00600000\0" \ 159 "ramdisk_file=rootfs.cpio.uboot\0" \ 160 "boot_common=setexpr bootm_low $kernel_addr_r '&' fe000000 && " \ 161 "if test $kernel_addr_load = $kernel_addr_r; then " \ 162 "true; " \ 163 "else " \ 164 "unzip $kernel_addr_load $kernel_addr_r; " \ 165 "fi && " \ 166 LINUXBOOT_CMD " $kernel_addr_r $ramdisk_addr_r $fdt_addr_r\0" \ 167 "norboot=setexpr kernel_addr_nor $nor_base + $kernel_addr && " \ 168 "setexpr kernel_size_div4 $kernel_size / 4 && " \ 169 "cp $kernel_addr_nor $kernel_addr_load $kernel_size_div4 && " \ 170 "setexpr ramdisk_addr_nor $nor_base + $ramdisk_addr && " \ 171 "setexpr ramdisk_size_div4 $ramdisk_size / 4 && " \ 172 "cp $ramdisk_addr_nor $ramdisk_addr_r $ramdisk_size_div4 && " \ 173 "setexpr fdt_addr_nor $nor_base + $fdt_addr && " \ 174 "setexpr fdt_size_div4 $fdt_size / 4 && " \ 175 "cp $fdt_addr_nor $fdt_addr_r $fdt_size_div4 && " \ 176 "run boot_common\0" \ 177 "nandboot=nand read $kernel_addr_load $kernel_addr $kernel_size && " \ 178 "nand read $ramdisk_addr_r $ramdisk_addr $ramdisk_size &&" \ 179 "nand read $fdt_addr_r $fdt_addr $fdt_size &&" \ 180 "run boot_common\0" \ 181 "tftpboot=tftpboot $kernel_addr_load $bootfile && " \ 182 "tftpboot $ramdisk_addr_r $ramdisk_file &&" \ 183 "tftpboot $fdt_addr_r $fdt_file &&" \ 184 "run boot_common\0" \ 185 "__nfsboot=tftpboot $kernel_addr_load $bootfile && " \ 186 "tftpboot $fdt_addr_r $fdt_file &&" \ 187 "setenv ramdisk_addr_r - &&" \ 188 "run boot_common\0" 189 #endif 190 191 #define CONFIG_EXTRA_ENV_SETTINGS \ 192 "netdev=eth0\0" \ 193 "verify=n\0" \ 194 "initrd_high=0xffffffffffffffff\0" \ 195 "nor_base=0x42000000\0" \ 196 "sramupdate=setexpr tmp_addr $nor_base + 0x50000 &&" \ 197 "tftpboot $tmp_addr $second_image && " \ 198 "setexpr tmp_addr $nor_base + 0x70000 && " \ 199 "tftpboot $tmp_addr $third_image\0" \ 200 "emmcupdate=mmcsetn &&" \ 201 "mmc partconf $mmc_first_dev 0 1 1 &&" \ 202 "tftpboot $second_image && " \ 203 "mmc write $loadaddr 0 100 && " \ 204 "tftpboot $third_image && " \ 205 "mmc write $loadaddr 100 700\0" \ 206 "nandupdate=nand erase 0 0x00100000 &&" \ 207 "tftpboot $second_image && " \ 208 "nand write $loadaddr 0 0x00020000 && " \ 209 "tftpboot $third_image && " \ 210 "nand write $loadaddr 0x00020000 0x000e0000\0" \ 211 "usbupdate=usb start &&" \ 212 "tftpboot $second_image && " \ 213 "usb write $loadaddr 0 100 && " \ 214 "tftpboot $third_image && " \ 215 "usb write $loadaddr 100 700\0" \ 216 BOOT_IMAGES \ 217 LINUXBOOT_ENV_SETTINGS 218 219 #define CONFIG_SYS_BOOTMAPSZ 0x20000000 220 221 #define CONFIG_SYS_SDRAM_BASE 0x80000000 222 #define CONFIG_NR_DRAM_BANKS 3 223 /* for LD20; the last 64 byte is used for dynamic DDR PHY training */ 224 #define CONFIG_SYS_MEM_TOP_HIDE 64 225 226 #define CONFIG_PANIC_HANG 227 228 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE) 229 230 /* only for SPL */ 231 #if defined(CONFIG_ARCH_UNIPHIER_LD4) || \ 232 defined(CONFIG_ARCH_UNIPHIER_SLD8) 233 #define CONFIG_SPL_TEXT_BASE 0x00040000 234 #else 235 #define CONFIG_SPL_TEXT_BASE 0x00100000 236 #endif 237 238 #define CONFIG_SPL_STACK (0x00100000) 239 240 #define CONFIG_SPL_FRAMEWORK 241 242 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000 243 244 /* subtract sizeof(struct image_header) */ 245 #define CONFIG_SYS_UBOOT_BASE (0x70000 - 0x40) 246 247 #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" 248 #define CONFIG_SPL_MAX_FOOTPRINT 0x10000 249 #define CONFIG_SPL_MAX_SIZE 0x10000 250 #define CONFIG_SPL_BSS_MAX_SIZE 0x2000 251 252 #define CONFIG_SPL_PAD_TO 0x20000 253 254 #endif /* __CONFIG_UNIPHIER_COMMON_H__ */ 255