1 /* 2 * Copyright (C) 2012-2015 Panasonic Corporation 3 * Copyright (C) 2015-2016 Socionext Inc. 4 * Author: Masahiro Yamada <yamada.masahiro@socionext.com> 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 /* U-Boot - Common settings for UniPhier Family */ 10 11 #ifndef __CONFIG_UNIPHIER_COMMON_H__ 12 #define __CONFIG_UNIPHIER_COMMON_H__ 13 14 #define CONFIG_ARMV7_PSCI_1_0 15 16 /*----------------------------------------------------------------------- 17 * MMU and Cache Setting 18 *----------------------------------------------------------------------*/ 19 20 /* Comment out the following to enable L1 cache */ 21 /* #define CONFIG_SYS_ICACHE_OFF */ 22 /* #define CONFIG_SYS_DCACHE_OFF */ 23 24 #define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024) 25 26 #define CONFIG_TIMESTAMP 27 28 /* FLASH related */ 29 #define CONFIG_MTD_DEVICE 30 31 #define CONFIG_FLASH_CFI_DRIVER 32 #define CONFIG_SYS_FLASH_CFI 33 34 #define CONFIG_SYS_MAX_FLASH_SECT 256 35 #define CONFIG_SYS_MONITOR_BASE 0 36 #define CONFIG_SYS_MONITOR_LEN 0x00080000 /* 512KB */ 37 #define CONFIG_SYS_FLASH_BASE 0 38 39 /* 40 * flash_toggle does not work for our support card. 41 * We need to use flash_status_poll. 42 */ 43 #define CONFIG_SYS_CFI_FLASH_STATUS_POLL 44 45 #define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ 46 47 #define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1 48 49 /* serial console configuration */ 50 51 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ 52 /* Boot Argument Buffer Size */ 53 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) 54 55 #define CONFIG_ENV_OFFSET 0x100000 56 #define CONFIG_ENV_SIZE 0x2000 57 /* #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) */ 58 59 #define CONFIG_SYS_MMC_ENV_DEV 0 60 #define CONFIG_SYS_MMC_ENV_PART 1 61 62 #if !defined(CONFIG_ARM64) 63 /* Time clock 1MHz */ 64 #define CONFIG_SYS_TIMER_RATE 1000000 65 #endif 66 67 #define CONFIG_SYS_MAX_NAND_DEVICE 1 68 #define CONFIG_SYS_NAND_ONFI_DETECTION 69 #define CONFIG_SYS_NAND_REGS_BASE 0x68100000 70 #define CONFIG_SYS_NAND_DATA_BASE 0x68000000 71 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 72 73 /* SD/MMC */ 74 #define CONFIG_SUPPORT_EMMC_BOOT 75 76 /* memtest works on */ 77 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE 78 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x01000000) 79 80 /* 81 * Network Configuration 82 */ 83 #define CONFIG_SERVERIP 192.168.11.1 84 #define CONFIG_IPADDR 192.168.11.10 85 #define CONFIG_GATEWAYIP 192.168.11.1 86 #define CONFIG_NETMASK 255.255.255.0 87 88 #define CONFIG_LOADADDR 0x85000000 89 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 90 #define CONFIG_SYS_BOOTM_LEN (32 << 20) 91 92 #if defined(CONFIG_ARM64) 93 /* ARM Trusted Firmware */ 94 #define BOOT_IMAGES \ 95 "second_image=unph_bl.bin\0" \ 96 "third_image=fip.bin\0" 97 #else 98 #define BOOT_IMAGES \ 99 "second_image=u-boot-spl.bin\0" \ 100 "third_image=u-boot.bin\0" 101 #endif 102 103 #define CONFIG_BOOTCOMMAND "run $bootmode" 104 105 #define CONFIG_ROOTPATH "/nfs/root/path" 106 #define CONFIG_NFSBOOTCOMMAND \ 107 "setenv bootargs $bootargs root=/dev/nfs rw " \ 108 "nfsroot=$serverip:$rootpath " \ 109 "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off;" \ 110 "run __nfsboot" 111 112 #ifdef CONFIG_FIT 113 #define CONFIG_BOOTFILE "fitImage" 114 #define LINUXBOOT_ENV_SETTINGS \ 115 "fit_addr=0x00100000\0" \ 116 "fit_addr_r=0x85100000\0" \ 117 "fit_size=0x00f00000\0" \ 118 "norboot=setexpr fit_addr $nor_base + $fit_addr &&" \ 119 "bootm $fit_addr\0" \ 120 "nandboot=nand read $fit_addr_r $fit_addr $fit_size &&" \ 121 "bootm $fit_addr_r\0" \ 122 "tftpboot=tftpboot $fit_addr_r $bootfile &&" \ 123 "bootm $fit_addr_r\0" \ 124 "__nfsboot=run tftpboot\0" 125 #else 126 #ifdef CONFIG_ARM64 127 #define CONFIG_BOOTFILE "Image.gz" 128 #define LINUXBOOT_CMD "booti" 129 #define KERNEL_ADDR_LOAD "kernel_addr_load=0x85200000\0" 130 #define KERNEL_ADDR_R "kernel_addr_r=0x82080000\0" 131 #else 132 #define CONFIG_BOOTFILE "zImage" 133 #define LINUXBOOT_CMD "bootz" 134 #define KERNEL_ADDR_LOAD "kernel_addr_load=0x80208000\0" 135 #define KERNEL_ADDR_R "kernel_addr_r=0x80208000\0" 136 #endif 137 #define LINUXBOOT_ENV_SETTINGS \ 138 "fdt_addr=0x00100000\0" \ 139 "fdt_addr_r=0x85100000\0" \ 140 "fdt_size=0x00008000\0" \ 141 "kernel_addr=0x00200000\0" \ 142 KERNEL_ADDR_LOAD \ 143 KERNEL_ADDR_R \ 144 "kernel_size=0x00e00000\0" \ 145 "ramdisk_addr=0x01000000\0" \ 146 "ramdisk_addr_r=0x86000000\0" \ 147 "ramdisk_size=0x00800000\0" \ 148 "ramdisk_file=rootfs.cpio.uboot\0" \ 149 "boot_common=setexpr bootm_low $kernel_addr_r '&' fe000000 && " \ 150 "if test $kernel_addr_load = $kernel_addr_r; then " \ 151 "true; " \ 152 "else " \ 153 "unzip $kernel_addr_load $kernel_addr_r; " \ 154 "fi && " \ 155 LINUXBOOT_CMD " $kernel_addr_r $ramdisk_addr_r $fdt_addr_r\0" \ 156 "norboot=setexpr kernel_addr_nor $nor_base + $kernel_addr && " \ 157 "setexpr kernel_size_div4 $kernel_size / 4 && " \ 158 "cp $kernel_addr_nor $kernel_addr_load $kernel_size_div4 && " \ 159 "setexpr ramdisk_addr_nor $nor_base + $ramdisk_addr && " \ 160 "setexpr ramdisk_size_div4 $ramdisk_size / 4 && " \ 161 "cp $ramdisk_addr_nor $ramdisk_addr_r $ramdisk_size_div4 && " \ 162 "setexpr fdt_addr_nor $nor_base + $fdt_addr && " \ 163 "setexpr fdt_size_div4 $fdt_size / 4 && " \ 164 "cp $fdt_addr_nor $fdt_addr_r $fdt_size_div4 && " \ 165 "run boot_common\0" \ 166 "nandboot=nand read $kernel_addr_load $kernel_addr $kernel_size && " \ 167 "nand read $ramdisk_addr_r $ramdisk_addr $ramdisk_size &&" \ 168 "nand read $fdt_addr_r $fdt_addr $fdt_size &&" \ 169 "run boot_common\0" \ 170 "tftpboot=tftpboot $kernel_addr_load $bootfile && " \ 171 "tftpboot $ramdisk_addr_r $ramdisk_file &&" \ 172 "tftpboot $fdt_addr_r $fdt_file &&" \ 173 "run boot_common\0" \ 174 "__nfsboot=tftpboot $kernel_addr_load $bootfile && " \ 175 "tftpboot $fdt_addr_r $fdt_file &&" \ 176 "setenv ramdisk_addr_r - &&" \ 177 "run boot_common\0" 178 #endif 179 180 #define CONFIG_EXTRA_ENV_SETTINGS \ 181 "netdev=eth0\0" \ 182 "initrd_high=0xffffffffffffffff\0" \ 183 "nor_base=0x42000000\0" \ 184 "sramupdate=setexpr tmp_addr $nor_base + 0x50000 &&" \ 185 "tftpboot $tmp_addr $second_image && " \ 186 "setexpr tmp_addr $nor_base + 0x70000 && " \ 187 "tftpboot $tmp_addr $third_image\0" \ 188 "emmcupdate=mmcsetn &&" \ 189 "mmc partconf $mmc_first_dev 0 1 1 &&" \ 190 "tftpboot $second_image && " \ 191 "mmc write $loadaddr 0 100 && " \ 192 "tftpboot $third_image && " \ 193 "mmc write $loadaddr 100 f00\0" \ 194 "nandupdate=nand erase 0 0x00100000 &&" \ 195 "tftpboot $second_image && " \ 196 "nand write $loadaddr 0 0x00020000 && " \ 197 "tftpboot $third_image && " \ 198 "nand write $loadaddr 0x00020000 0x001e0000\0" \ 199 "usbupdate=usb start &&" \ 200 "tftpboot $second_image && " \ 201 "usb write $loadaddr 0 100 && " \ 202 "tftpboot $third_image && " \ 203 "usb write $loadaddr 100 f00\0" \ 204 BOOT_IMAGES \ 205 LINUXBOOT_ENV_SETTINGS 206 207 #define CONFIG_SYS_BOOTMAPSZ 0x20000000 208 209 #define CONFIG_SYS_SDRAM_BASE 0x80000000 210 #define CONFIG_NR_DRAM_BANKS 3 211 212 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE) 213 214 /* only for SPL */ 215 #if defined(CONFIG_ARCH_UNIPHIER_LD4) || \ 216 defined(CONFIG_ARCH_UNIPHIER_SLD8) 217 #define CONFIG_SPL_TEXT_BASE 0x00040000 218 #else 219 #define CONFIG_SPL_TEXT_BASE 0x00100000 220 #endif 221 222 #define CONFIG_SPL_STACK (0x00100000) 223 224 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000 225 226 /* subtract sizeof(struct image_header) */ 227 #define CONFIG_SYS_UBOOT_BASE (0x70000 - 0x40) 228 229 #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" 230 #define CONFIG_SPL_MAX_FOOTPRINT 0x10000 231 #define CONFIG_SPL_MAX_SIZE 0x10000 232 #define CONFIG_SPL_BSS_MAX_SIZE 0x2000 233 234 #define CONFIG_SPL_PAD_TO 0x20000 235 236 #endif /* __CONFIG_UNIPHIER_COMMON_H__ */ 237