xref: /openbmc/u-boot/include/configs/uniphier.h (revision 89f5eaa1)
1 /*
2  * Copyright (C) 2012-2015 Panasonic Corporation
3  * Copyright (C) 2015-2016 Socionext Inc.
4  *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
5  *
6  * SPDX-License-Identifier:	GPL-2.0+
7  */
8 
9 /* U-Boot - Common settings for UniPhier Family */
10 
11 #ifndef __CONFIG_UNIPHIER_COMMON_H__
12 #define __CONFIG_UNIPHIER_COMMON_H__
13 
14 #define CONFIG_ARMV7_PSCI_1_0
15 
16 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS  10
17 
18 /*-----------------------------------------------------------------------
19  * MMU and Cache Setting
20  *----------------------------------------------------------------------*/
21 
22 /* Comment out the following to enable L1 cache */
23 /* #define CONFIG_SYS_ICACHE_OFF */
24 /* #define CONFIG_SYS_DCACHE_OFF */
25 
26 #define CONFIG_SYS_MALLOC_LEN		(4 * 1024 * 1024)
27 
28 #define CONFIG_TIMESTAMP
29 
30 /* FLASH related */
31 #define CONFIG_MTD_DEVICE
32 
33 #define CONFIG_SMC911X_32_BIT
34 /* dummy: referenced by examples/standalone/smc911x_eeprom.c */
35 #define CONFIG_SMC911X_BASE	0
36 
37 #ifdef CONFIG_MICRO_SUPPORT_CARD
38 #define CONFIG_SMC911X
39 #endif
40 
41 #define CONFIG_FLASH_CFI_DRIVER
42 #define CONFIG_SYS_FLASH_CFI
43 
44 #define CONFIG_SYS_MAX_FLASH_SECT	256
45 #define CONFIG_SYS_MONITOR_BASE		0
46 #define CONFIG_SYS_MONITOR_LEN		0x00080000	/* 512KB */
47 #define CONFIG_SYS_FLASH_BASE		0
48 
49 /*
50  * flash_toggle does not work for our support card.
51  * We need to use flash_status_poll.
52  */
53 #define CONFIG_SYS_CFI_FLASH_STATUS_POLL
54 
55 #define CONFIG_FLASH_SHOW_PROGRESS	45 /* count down from 45/5: 9..1 */
56 
57 #define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1
58 
59 /* serial console configuration */
60 
61 #define CONFIG_SYS_LONGHELP		/* undef to save memory */
62 
63 #define CONFIG_CMDLINE_EDITING		/* add command line history	*/
64 #define CONFIG_SYS_CBSIZE		1024	/* Console I/O Buffer Size */
65 /* Print Buffer Size */
66 #define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
67 #define CONFIG_SYS_MAXARGS		16	/* max number of command */
68 /* Boot Argument Buffer Size */
69 #define CONFIG_SYS_BARGSIZE		(CONFIG_SYS_CBSIZE)
70 
71 #define CONFIG_CONS_INDEX		1
72 
73 /* #define CONFIG_ENV_IS_NOWHERE */
74 /* #define CONFIG_ENV_IS_IN_NAND */
75 #define CONFIG_ENV_IS_IN_MMC
76 #define CONFIG_ENV_OFFSET			0x100000
77 #define CONFIG_ENV_SIZE				0x2000
78 /* #define CONFIG_ENV_OFFSET_REDUND	(CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) */
79 
80 #define CONFIG_SYS_MMC_ENV_DEV		0
81 #define CONFIG_SYS_MMC_ENV_PART		1
82 
83 #ifdef CONFIG_ARMV8_MULTIENTRY
84 #define CPU_RELEASE_ADDR			0x80000000
85 #define COUNTER_FREQUENCY			50000000
86 #define CONFIG_GICV3
87 #define GICD_BASE				0x5fe00000
88 #if defined(CONFIG_ARCH_UNIPHIER_LD11)
89 #define GICR_BASE				0x5fe40000
90 #elif defined(CONFIG_ARCH_UNIPHIER_LD20)
91 #define GICR_BASE				0x5fe80000
92 #endif
93 #elif !defined(CONFIG_ARM64)
94 /* Time clock 1MHz */
95 #define CONFIG_SYS_TIMER_RATE			1000000
96 #endif
97 
98 #define CONFIG_SYS_MAX_NAND_DEVICE			1
99 #define CONFIG_SYS_NAND_MAX_CHIPS			2
100 #define CONFIG_SYS_NAND_ONFI_DETECTION
101 
102 #define CONFIG_NAND_DENALI_ECC_SIZE			1024
103 
104 #ifdef CONFIG_ARCH_UNIPHIER_SLD3
105 #define CONFIG_SYS_NAND_REGS_BASE			0xf8100000
106 #define CONFIG_SYS_NAND_DATA_BASE			0xf8000000
107 #else
108 #define CONFIG_SYS_NAND_REGS_BASE			0x68100000
109 #define CONFIG_SYS_NAND_DATA_BASE			0x68000000
110 #endif
111 
112 #define CONFIG_SYS_NAND_BASE		(CONFIG_SYS_NAND_DATA_BASE + 0x10)
113 
114 #define CONFIG_SYS_NAND_USE_FLASH_BBT
115 #define CONFIG_SYS_NAND_BAD_BLOCK_POS			0
116 
117 /* USB */
118 #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS	4
119 
120 /* SD/MMC */
121 #define CONFIG_SUPPORT_EMMC_BOOT
122 
123 /* memtest works on */
124 #define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
125 #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_SDRAM_BASE + 0x01000000)
126 
127 /*
128  * Network Configuration
129  */
130 #define CONFIG_SERVERIP			192.168.11.1
131 #define CONFIG_IPADDR			192.168.11.10
132 #define CONFIG_GATEWAYIP		192.168.11.1
133 #define CONFIG_NETMASK			255.255.255.0
134 
135 #define CONFIG_LOADADDR			0x84000000
136 #define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
137 
138 #define CONFIG_CMDLINE_EDITING		/* add command line history	*/
139 
140 #if defined(CONFIG_ARM64) && !defined(CONFIG_ARMV8_MULTIENTRY)
141 /* ARM Trusted Firmware */
142 #define BOOT_IMAGES \
143 	"second_image=unph_bl.bin\0" \
144 	"third_image=fip.bin\0"
145 #else
146 #define BOOT_IMAGES \
147 	"second_image=u-boot-spl.bin\0" \
148 	"third_image=u-boot.bin\0"
149 #endif
150 
151 #define CONFIG_BOOTCOMMAND		"run $bootmode"
152 
153 #define CONFIG_ROOTPATH			"/nfs/root/path"
154 #define CONFIG_NFSBOOTCOMMAND						\
155 	"setenv bootargs $bootargs root=/dev/nfs rw "			\
156 	"nfsroot=$serverip:$rootpath "					\
157 	"ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off;" \
158 		"run __nfsboot"
159 
160 #ifdef CONFIG_FIT
161 #define CONFIG_BOOTFILE			"fitImage"
162 #define LINUXBOOT_ENV_SETTINGS \
163 	"fit_addr=0x00100000\0" \
164 	"fit_addr_r=0x84100000\0" \
165 	"fit_size=0x00f00000\0" \
166 	"norboot=setexpr fit_addr $nor_base + $fit_addr &&" \
167 		"bootm $fit_addr\0" \
168 	"nandboot=nand read $fit_addr_r $fit_addr $fit_size &&" \
169 		"bootm $fit_addr_r\0" \
170 	"tftpboot=tftpboot $fit_addr_r $bootfile &&" \
171 		"bootm $fit_addr_r\0" \
172 	"__nfsboot=run tftpboot\0"
173 #else
174 #ifdef CONFIG_ARM64
175 #define CONFIG_BOOTFILE			"Image.gz"
176 #define LINUXBOOT_CMD			"booti"
177 #define KERNEL_ADDR_LOAD		"kernel_addr_load=0x84200000\0"
178 #define KERNEL_ADDR_R			"kernel_addr_r=0x82080000\0"
179 #else
180 #define CONFIG_BOOTFILE			"zImage"
181 #define LINUXBOOT_CMD			"bootz"
182 #define KERNEL_ADDR_LOAD		"kernel_addr_load=0x80208000\0"
183 #define KERNEL_ADDR_R			"kernel_addr_r=0x80208000\0"
184 #endif
185 #define LINUXBOOT_ENV_SETTINGS \
186 	"fdt_addr=0x00100000\0" \
187 	"fdt_addr_r=0x84100000\0" \
188 	"fdt_size=0x00008000\0" \
189 	"kernel_addr=0x00200000\0" \
190 	KERNEL_ADDR_LOAD \
191 	KERNEL_ADDR_R \
192 	"kernel_size=0x00800000\0" \
193 	"ramdisk_addr=0x00a00000\0" \
194 	"ramdisk_addr_r=0x84a00000\0" \
195 	"ramdisk_size=0x00600000\0" \
196 	"ramdisk_file=rootfs.cpio.uboot\0" \
197 	"boot_common=setexpr bootm_low $kernel_addr_r '&' fe000000 && " \
198 		"if test $kernel_addr_load = $kernel_addr_r; then " \
199 			"true; " \
200 		"else " \
201 			"unzip $kernel_addr_load $kernel_addr_r; " \
202 		"fi && " \
203 		LINUXBOOT_CMD " $kernel_addr_r $ramdisk_addr_r $fdt_addr_r\0" \
204 	"norboot=setexpr kernel_addr_nor $nor_base + $kernel_addr && " \
205 		"setexpr kernel_size_div4 $kernel_size / 4 && " \
206 		"cp $kernel_addr_nor $kernel_addr_load $kernel_size_div4 && " \
207 		"setexpr ramdisk_addr_nor $nor_base + $ramdisk_addr && " \
208 		"setexpr ramdisk_size_div4 $ramdisk_size / 4 && " \
209 		"cp $ramdisk_addr_nor $ramdisk_addr_r $ramdisk_size_div4 && " \
210 		"setexpr fdt_addr_nor $nor_base + $fdt_addr && " \
211 		"setexpr fdt_size_div4 $fdt_size / 4 && " \
212 		"cp $fdt_addr_nor $fdt_addr_r $fdt_size_div4 && " \
213 		"run boot_common\0" \
214 	"nandboot=nand read $kernel_addr_load $kernel_addr $kernel_size && " \
215 		"nand read $ramdisk_addr_r $ramdisk_addr $ramdisk_size &&" \
216 		"nand read $fdt_addr_r $fdt_addr $fdt_size &&" \
217 		"run boot_common\0" \
218 	"tftpboot=tftpboot $kernel_addr_load $bootfile && " \
219 		"tftpboot $ramdisk_addr_r $ramdisk_file &&" \
220 		"tftpboot $fdt_addr_r $fdt_file &&" \
221 		"run boot_common\0" \
222 	"__nfsboot=tftpboot $kernel_addr_load $bootfile && " \
223 		"tftpboot $fdt_addr_r $fdt_file &&" \
224 		"setenv ramdisk_addr_r - &&" \
225 		"run boot_common\0"
226 #endif
227 
228 #define	CONFIG_EXTRA_ENV_SETTINGS				\
229 	"netdev=eth0\0"						\
230 	"verify=n\0"						\
231 	"initrd_high=0xffffffffffffffff\0"			\
232 	"nor_base=0x42000000\0"					\
233 	"sramupdate=setexpr tmp_addr $nor_base + 0x50000 &&"	\
234 		"tftpboot $tmp_addr $second_image && " \
235 		"setexpr tmp_addr $nor_base + 0x70000 && " \
236 		"tftpboot $tmp_addr $third_image\0" \
237 	"emmcupdate=mmcsetn &&"					\
238 		"mmc partconf $mmc_first_dev 0 1 1 &&"		\
239 		"tftpboot $second_image && " \
240 		"mmc write $loadaddr 0 100 && " \
241 		"tftpboot $third_image && " \
242 		"mmc write $loadaddr 100 700\0" \
243 	"nandupdate=nand erase 0 0x00100000 &&"			\
244 		"tftpboot $second_image && " \
245 		"nand write $loadaddr 0 0x00020000 && " \
246 		"tftpboot $third_image && " \
247 		"nand write $loadaddr 0x00020000 0x000e0000\0" \
248 	"usbupdate=usb start &&" \
249 		"tftpboot $second_image && " \
250 		"usb write $loadaddr 0 100 && " \
251 		"tftpboot $third_image && " \
252 		"usb write $loadaddr 100 700\0" \
253 	BOOT_IMAGES \
254 	LINUXBOOT_ENV_SETTINGS
255 
256 #define CONFIG_SYS_BOOTMAPSZ			0x20000000
257 
258 #define CONFIG_SYS_SDRAM_BASE		0x80000000
259 #define CONFIG_NR_DRAM_BANKS		3
260 /* for LD20; the last 64 byte is used for dynamic DDR PHY training */
261 #define CONFIG_SYS_MEM_TOP_HIDE		64
262 
263 #define CONFIG_PANIC_HANG
264 
265 #define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_TEXT_BASE)
266 
267 /* only for SPL */
268 #if defined(CONFIG_ARM64)
269 #define CONFIG_SPL_TEXT_BASE		0x30000000
270 #elif defined(CONFIG_ARCH_UNIPHIER_SLD3) || \
271 	defined(CONFIG_ARCH_UNIPHIER_LD4) || \
272 	defined(CONFIG_ARCH_UNIPHIER_SLD8)
273 #define CONFIG_SPL_TEXT_BASE		0x00040000
274 #else
275 #define CONFIG_SPL_TEXT_BASE		0x00100000
276 #endif
277 
278 #if defined(CONFIG_ARCH_UNIPHIER_LD11)
279 #define CONFIG_SPL_STACK		(0x30014c00)
280 #elif defined(CONFIG_ARCH_UNIPHIER_LD20)
281 #define CONFIG_SPL_STACK		(0x3001c000)
282 #else
283 #define CONFIG_SPL_STACK		(0x00100000)
284 #endif
285 
286 #define CONFIG_SPL_FRAMEWORK
287 #ifdef CONFIG_ARM64
288 #define CONFIG_SPL_BOARD_LOAD_IMAGE
289 #endif
290 
291 #define CONFIG_SYS_NAND_U_BOOT_OFFS		0x20000
292 
293 /* subtract sizeof(struct image_header) */
294 #define CONFIG_SYS_UBOOT_BASE			(0x70000 - 0x40)
295 
296 #define CONFIG_SPL_TARGET			"u-boot-with-spl.bin"
297 #define CONFIG_SPL_MAX_FOOTPRINT		0x10000
298 #if defined(CONFIG_ARCH_UNIPHIER_LD20)
299 #define CONFIG_SPL_MAX_SIZE			0x14000
300 #else
301 #define CONFIG_SPL_MAX_SIZE			0x10000
302 #endif
303 #if defined(CONFIG_ARCH_UNIPHIER_LD11)
304 #define CONFIG_SPL_BSS_START_ADDR		0x30012000
305 #elif defined(CONFIG_ARCH_UNIPHIER_LD20)
306 #define CONFIG_SPL_BSS_START_ADDR		0x30016000
307 #endif
308 #define CONFIG_SPL_BSS_MAX_SIZE			0x2000
309 
310 #define CONFIG_SPL_PAD_TO			0x20000
311 
312 #endif /* __CONFIG_UNIPHIER_COMMON_H__ */
313