1 /* 2 * Copyright (C) 2012-2015 Masahiro Yamada <yamada.masahiro@socionext.com> 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 /* U-boot - Common settings for UniPhier Family */ 8 9 #ifndef __CONFIG_UNIPHIER_COMMON_H__ 10 #define __CONFIG_UNIPHIER_COMMON_H__ 11 12 #define CONFIG_I2C_EEPROM 13 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 14 15 #ifdef CONFIG_SYS_NS16550_SERIAL 16 #define CONFIG_SYS_NS16550 17 #define CONFIG_SYS_NS16550_COM1 CONFIG_SUPPORT_CARD_UART_BASE 18 #define CONFIG_SYS_NS16550_CLK 12288000 19 #define CONFIG_SYS_NS16550_REG_SIZE -2 20 #endif 21 22 /* TODO: move to Kconfig and device tree */ 23 #if 0 24 #define CONFIG_SYS_NS16550_SERIAL 25 #endif 26 27 #define CONFIG_SMC911X 28 29 /* dummy: referenced by examples/standalone/smc911x_eeprom.c */ 30 #define CONFIG_SMC911X_BASE 0 31 #define CONFIG_SMC911X_32_BIT 32 33 /*----------------------------------------------------------------------- 34 * MMU and Cache Setting 35 *----------------------------------------------------------------------*/ 36 37 /* Comment out the following to enable L1 cache */ 38 /* #define CONFIG_SYS_ICACHE_OFF */ 39 /* #define CONFIG_SYS_DCACHE_OFF */ 40 41 #define CONFIG_SYS_CACHELINE_SIZE 32 42 43 /* Comment out the following to enable L2 cache */ 44 #define CONFIG_UNIPHIER_L2CACHE_ON 45 46 #define CONFIG_DISPLAY_CPUINFO 47 #define CONFIG_DISPLAY_BOARDINFO 48 #define CONFIG_MISC_INIT_F 49 #define CONFIG_BOARD_EARLY_INIT_F 50 #define CONFIG_BOARD_EARLY_INIT_R 51 #define CONFIG_BOARD_LATE_INIT 52 53 #define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024) 54 55 #define CONFIG_TIMESTAMP 56 57 /* FLASH related */ 58 #define CONFIG_MTD_DEVICE 59 60 /* 61 * uncomment the following to disable FLASH related code. 62 */ 63 /* #define CONFIG_SYS_NO_FLASH */ 64 65 #define CONFIG_FLASH_CFI_DRIVER 66 #define CONFIG_SYS_FLASH_CFI 67 68 #define CONFIG_SYS_MAX_FLASH_SECT 256 69 #define CONFIG_SYS_MONITOR_BASE 0 70 #define CONFIG_SYS_FLASH_BASE 0 71 72 /* 73 * flash_toggle does not work for out supoort card. 74 * We need to use flash_status_poll. 75 */ 76 #define CONFIG_SYS_CFI_FLASH_STATUS_POLL 77 78 #define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ 79 80 #define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1 81 82 /* serial console configuration */ 83 #define CONFIG_BAUDRATE 115200 84 85 86 #if !defined(CONFIG_SPL_BUILD) 87 #define CONFIG_USE_ARCH_MEMSET 88 #define CONFIG_USE_ARCH_MEMCPY 89 #endif 90 91 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 92 93 #define CONFIG_CMDLINE_EDITING /* add command line history */ 94 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ 95 /* Print Buffer Size */ 96 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 97 #define CONFIG_SYS_MAXARGS 16 /* max number of command */ 98 /* Boot Argument Buffer Size */ 99 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) 100 101 #define CONFIG_CONS_INDEX 1 102 103 /* 104 * For NAND booting the environment is embedded in the U-Boot image. Please take 105 * look at the file board/amcc/canyonlands/u-boot-nand.lds for details. 106 */ 107 /* #define CONFIG_ENV_IS_IN_NAND */ 108 #define CONFIG_ENV_IS_NOWHERE 109 #define CONFIG_ENV_SIZE 0x2000 110 #define CONFIG_ENV_OFFSET 0x0 111 /* #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) */ 112 113 /* Time clock 1MHz */ 114 #define CONFIG_SYS_TIMER_RATE 1000000 115 116 /* 117 * By default, ARP timeout is 5 sec. 118 * The first ARP request does not seem to work. 119 * So we need to retry ARP request anyway. 120 * We want to shrink the interval until the second ARP request. 121 */ 122 #define CONFIG_ARP_TIMEOUT 500UL /* 0.5 msec */ 123 124 #define CONFIG_SYS_MAX_NAND_DEVICE 1 125 #define CONFIG_SYS_NAND_MAX_CHIPS 2 126 #define CONFIG_SYS_NAND_ONFI_DETECTION 127 128 #define CONFIG_NAND_DENALI_ECC_SIZE 1024 129 130 #ifdef CONFIG_ARCH_UNIPHIER_PH1_SLD3 131 #define CONFIG_SYS_NAND_REGS_BASE 0xf8100000 132 #define CONFIG_SYS_NAND_DATA_BASE 0xf8000000 133 #else 134 #define CONFIG_SYS_NAND_REGS_BASE 0x68100000 135 #define CONFIG_SYS_NAND_DATA_BASE 0x68000000 136 #endif 137 138 #define CONFIG_SYS_NAND_BASE (CONFIG_SYS_NAND_DATA_BASE + 0x10) 139 140 #define CONFIG_SYS_NAND_USE_FLASH_BBT 141 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 142 143 /* USB */ 144 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 145 #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 4 146 #define CONFIG_CMD_FAT 147 #define CONFIG_FAT_WRITE 148 #define CONFIG_DOS_PARTITION 149 150 /* memtest works on */ 151 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE 152 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x01000000) 153 154 #define CONFIG_BOOTDELAY 3 155 #define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */ 156 157 /* 158 * Network Configuration 159 */ 160 #define CONFIG_SERVERIP 192.168.11.1 161 #define CONFIG_IPADDR 192.168.11.10 162 #define CONFIG_GATEWAYIP 192.168.11.1 163 #define CONFIG_NETMASK 255.255.255.0 164 165 #define CONFIG_LOADADDR 0x84000000 166 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 167 168 #define CONFIG_CMDLINE_EDITING /* add command line history */ 169 170 #define CONFIG_BOOTCOMMAND "run $bootmode" 171 172 #define CONFIG_ROOTPATH "/nfs/root/path" 173 #define CONFIG_NFSBOOTCOMMAND \ 174 "setenv bootargs $bootargs root=/dev/nfs rw " \ 175 "nfsroot=$serverip:$rootpath " \ 176 "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off;" \ 177 "tftpboot; bootm;" 178 179 #ifdef CONFIG_FIT 180 #define CONFIG_BOOTFILE "fitImage" 181 #define LINUXBOOT_ENV_SETTINGS \ 182 "fit_addr=0x00100000\0" \ 183 "fit_addr_r=0x84100000\0" \ 184 "fit_size=0x00f00000\0" \ 185 "norboot=setexpr fit_addr $nor_base + $fit_addr &&" \ 186 "bootm $fit_addr\0" \ 187 "nandboot=nand read $fit_addr_r $fit_addr $fit_size &&" \ 188 "bootm $fit_addr_r\0" \ 189 "tftpboot=tftpboot $fit_addr_r $bootfile &&" \ 190 "bootm $fit_addr_r\0" 191 #else 192 #define CONFIG_BOOTFILE "uImage" 193 #define LINUXBOOT_ENV_SETTINGS \ 194 "fdt_addr=0x00100000\0" \ 195 "fdt_addr_r=0x84100000\0" \ 196 "fdt_size=0x00008000\0" \ 197 "fdt_file=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \ 198 "kernel_addr=0x00200000\0" \ 199 "kernel_addr_r=0x84200000\0" \ 200 "kernel_size=0x00800000\0" \ 201 "ramdisk_addr=0x00a00000\0" \ 202 "ramdisk_addr_r=0x84a00000\0" \ 203 "ramdisk_size=0x00600000\0" \ 204 "ramdisk_file=rootfs.cpio.uboot\0" \ 205 "norboot=setexpr kernel_addr $nor_base + $kernel_addr &&" \ 206 "setexpr ramdisk_addr $nor_base + $ramdisk_addr &&" \ 207 "setexpr fdt_addr $nor_base + $fdt_addr &&" \ 208 "bootm $kernel_addr $ramdisk_addr $fdt_addr\0" \ 209 "nandboot=nand read $kernel_addr_r $kernel_addr $kernel_size &&" \ 210 "nand read $ramdisk_addr_r $ramdisk_addr $ramdisk_size &&" \ 211 "nand read $fdt_addr_r $fdt_addr $fdt_size &&" \ 212 "bootm $kernel_addr_r $ramdisk_addr_r $fdt_addr_r\0" \ 213 "tftpboot=tftpboot $kernel_addr_r $bootfile &&" \ 214 "tftpboot $ramdisk_addr_r $ramdisk_file &&" \ 215 "tftpboot $fdt_addr_r $fdt_file &&" \ 216 "bootm $kernel_addr_r $ramdisk_addr_r $fdt_addr_r\0" 217 #endif 218 219 #define CONFIG_EXTRA_ENV_SETTINGS \ 220 "netdev=eth0\0" \ 221 "verify=n\0" \ 222 "norbase=0x42000000\0" \ 223 "nandupdate=nand erase 0 0x00100000 &&" \ 224 "tftpboot u-boot-spl-dtb.bin &&" \ 225 "nand write $loadaddr 0 0x00010000 &&" \ 226 "tftpboot u-boot-dtb.img &&" \ 227 "nand write $loadaddr 0x00010000 0x000f0000\0" \ 228 LINUXBOOT_ENV_SETTINGS 229 230 /* Open Firmware flat tree */ 231 #define CONFIG_OF_LIBFDT 232 233 #define CONFIG_SYS_SDRAM_BASE 0x80000000 234 #define CONFIG_NR_DRAM_BANKS 2 235 236 #if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD3) || \ 237 defined(CONFIG_ARCH_UNIPHIER_PH1_LD4) || \ 238 defined(CONFIG_ARCH_UNIPHIER_PH1_SLD8) 239 #define CONFIG_SPL_TEXT_BASE 0x00040000 240 #else 241 #define CONFIG_SPL_TEXT_BASE 0x00100000 242 #endif 243 244 #define CONFIG_SPL_STACK (0x0ff08000) 245 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE) 246 247 #define CONFIG_PANIC_HANG 248 249 #define CONFIG_SPL_FRAMEWORK 250 #define CONFIG_SPL_SERIAL_SUPPORT 251 #define CONFIG_SPL_NAND_SUPPORT 252 253 #define CONFIG_SPL_LIBCOMMON_SUPPORT /* for mem_malloc_init */ 254 #define CONFIG_SPL_LIBGENERIC_SUPPORT 255 256 #define CONFIG_SPL_BOARD_INIT 257 258 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x10000 259 260 #define CONFIG_SPL_MAX_FOOTPRINT 0x10000 261 262 #endif /* __CONFIG_UNIPHIER_COMMON_H__ */ 263