xref: /openbmc/u-boot/include/configs/uniphier.h (revision 679f82c3)
1 /*
2  * Copyright (C) 2012-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
3  *
4  * SPDX-License-Identifier:	GPL-2.0+
5  */
6 
7 /* U-boot - Common settings for UniPhier Family */
8 
9 #ifndef __CONFIG_UNIPHIER_COMMON_H__
10 #define __CONFIG_UNIPHIER_COMMON_H__
11 
12 #define CONFIG_I2C_EEPROM
13 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS  10
14 
15 #ifdef CONFIG_SYS_NS16550_SERIAL
16 #define CONFIG_SYS_NS16550
17 #define CONFIG_SYS_NS16550_COM1		CONFIG_SUPPORT_CARD_UART_BASE
18 #define CONFIG_SYS_NS16550_CLK		12288000
19 #define CONFIG_SYS_NS16550_REG_SIZE	-2
20 #endif
21 
22 /* TODO: move to Kconfig and device tree */
23 #if 0
24 #define CONFIG_SYS_NS16550_SERIAL
25 #endif
26 
27 #define CONFIG_SMC911X
28 
29 /* dummy: referenced by examples/standalone/smc911x_eeprom.c */
30 #define CONFIG_SMC911X_BASE	0
31 #define CONFIG_SMC911X_32_BIT
32 
33 /*-----------------------------------------------------------------------
34  * MMU and Cache Setting
35  *----------------------------------------------------------------------*/
36 
37 /* Comment out the following to enable L1 cache */
38 /* #define CONFIG_SYS_ICACHE_OFF */
39 /* #define CONFIG_SYS_DCACHE_OFF */
40 
41 #define CONFIG_SYS_CACHELINE_SIZE	32
42 
43 /* Comment out the following to enable L2 cache */
44 #define CONFIG_UNIPHIER_L2CACHE_ON
45 
46 #define CONFIG_DISPLAY_CPUINFO
47 #define CONFIG_DISPLAY_BOARDINFO
48 #define CONFIG_MISC_INIT_F
49 #define CONFIG_BOARD_EARLY_INIT_F
50 #define CONFIG_BOARD_EARLY_INIT_R
51 #define CONFIG_BOARD_LATE_INIT
52 
53 #define CONFIG_SYS_MALLOC_LEN		(4 * 1024 * 1024)
54 
55 #define CONFIG_TIMESTAMP
56 
57 /* FLASH related */
58 #define CONFIG_MTD_DEVICE
59 
60 /*
61  * uncomment the following to disable FLASH related code.
62  */
63 /* #define CONFIG_SYS_NO_FLASH */
64 
65 #define CONFIG_FLASH_CFI_DRIVER
66 #define CONFIG_SYS_FLASH_CFI
67 
68 #define CONFIG_SYS_MAX_FLASH_SECT	256
69 #define CONFIG_SYS_MONITOR_BASE		0
70 #define CONFIG_SYS_FLASH_BASE		0
71 
72 /*
73  * flash_toggle does not work for out supoort card.
74  * We need to use flash_status_poll.
75  */
76 #define CONFIG_SYS_CFI_FLASH_STATUS_POLL
77 
78 #define CONFIG_FLASH_SHOW_PROGRESS	45 /* count down from 45/5: 9..1 */
79 
80 #define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1
81 
82 /* serial console configuration */
83 #define CONFIG_BAUDRATE			115200
84 
85 #define CONFIG_SYS_GENERIC_BOARD
86 
87 #if !defined(CONFIG_SPL_BUILD)
88 #define CONFIG_USE_ARCH_MEMSET
89 #define CONFIG_USE_ARCH_MEMCPY
90 #endif
91 
92 #define CONFIG_SYS_LONGHELP		/* undef to save memory */
93 
94 #define CONFIG_CMDLINE_EDITING		/* add command line history	*/
95 #define CONFIG_SYS_CBSIZE		1024	/* Console I/O Buffer Size */
96 /* Print Buffer Size */
97 #define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
98 #define CONFIG_SYS_MAXARGS		16	/* max number of command */
99 /* Boot Argument Buffer Size */
100 #define CONFIG_SYS_BARGSIZE		(CONFIG_SYS_CBSIZE)
101 
102 #define CONFIG_CONS_INDEX		1
103 
104 /*
105  * For NAND booting the environment is embedded in the U-Boot image. Please take
106  * look at the file board/amcc/canyonlands/u-boot-nand.lds for details.
107  */
108 /* #define CONFIG_ENV_IS_IN_NAND */
109 #define CONFIG_ENV_IS_NOWHERE
110 #define CONFIG_ENV_SIZE				0x2000
111 #define CONFIG_ENV_OFFSET			0x0
112 /* #define CONFIG_ENV_OFFSET_REDUND	(CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) */
113 
114 /* Time clock 1MHz */
115 #define CONFIG_SYS_TIMER_RATE			1000000
116 
117 /*
118  * By default, ARP timeout is 5 sec.
119  * The first ARP request does not seem to work.
120  * So we need to retry ARP request anyway.
121  * We want to shrink the interval until the second ARP request.
122  */
123 #define CONFIG_ARP_TIMEOUT	500UL  /* 0.5 msec */
124 
125 #define CONFIG_SYS_MAX_NAND_DEVICE			1
126 #define CONFIG_SYS_NAND_MAX_CHIPS			2
127 #define CONFIG_SYS_NAND_ONFI_DETECTION
128 
129 #define CONFIG_NAND_DENALI_ECC_SIZE			1024
130 
131 #ifdef CONFIG_ARCH_UNIPHIER_PH1_SLD3
132 #define CONFIG_SYS_NAND_REGS_BASE			0xf8100000
133 #define CONFIG_SYS_NAND_DATA_BASE			0xf8000000
134 #else
135 #define CONFIG_SYS_NAND_REGS_BASE			0x68100000
136 #define CONFIG_SYS_NAND_DATA_BASE			0x68000000
137 #endif
138 
139 #define CONFIG_SYS_NAND_BASE		(CONFIG_SYS_NAND_DATA_BASE + 0x10)
140 
141 #define CONFIG_SYS_NAND_USE_FLASH_BBT
142 #define CONFIG_SYS_NAND_BAD_BLOCK_POS			0
143 
144 /* USB */
145 #define CONFIG_USB_MAX_CONTROLLER_COUNT		2
146 #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS	4
147 #define CONFIG_CMD_FAT
148 #define CONFIG_FAT_WRITE
149 #define CONFIG_DOS_PARTITION
150 
151 /* memtest works on */
152 #define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
153 #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_SDRAM_BASE + 0x01000000)
154 
155 #define CONFIG_BOOTDELAY			3
156 #define CONFIG_ZERO_BOOTDELAY_CHECK	/* check for keypress on bootdelay==0 */
157 
158 /*
159  * Network Configuration
160  */
161 #define CONFIG_SERVERIP			192.168.11.1
162 #define CONFIG_IPADDR			192.168.11.10
163 #define CONFIG_GATEWAYIP		192.168.11.1
164 #define CONFIG_NETMASK			255.255.255.0
165 
166 #define CONFIG_LOADADDR			0x84000000
167 #define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
168 
169 #define CONFIG_CMDLINE_EDITING		/* add command line history	*/
170 
171 #define CONFIG_BOOTCOMMAND		"run $bootmode"
172 
173 #define CONFIG_ROOTPATH			"/nfs/root/path"
174 #define CONFIG_NFSBOOTCOMMAND						\
175 	"setenv bootargs $bootargs root=/dev/nfs rw "			\
176 	"nfsroot=$serverip:$rootpath "					\
177 	"ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off;" \
178 	"tftpboot; bootm;"
179 
180 #ifdef CONFIG_FIT
181 #define CONFIG_BOOTFILE			"fitImage"
182 #define LINUXBOOT_ENV_SETTINGS \
183 	"fit_addr=0x00100000\0" \
184 	"fit_addr_r=0x84100000\0" \
185 	"fit_size=0x00f00000\0" \
186 	"norboot=setexpr fit_addr $nor_base + $fit_addr &&" \
187 		"bootm $fit_addr\0" \
188 	"nandboot=nand read $fit_addr_r $fit_addr $fit_size &&" \
189 		"bootm $fit_addr_r\0" \
190 	"tftpboot=tftpboot $fit_addr_r $bootfile &&" \
191 		"bootm $fit_addr_r\0"
192 #else
193 #define CONFIG_BOOTFILE			"uImage"
194 #define LINUXBOOT_ENV_SETTINGS \
195 	"fdt_addr=0x00100000\0" \
196 	"fdt_addr_r=0x84100000\0" \
197 	"fdt_size=0x00008000\0" \
198 	"fdt_file=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \
199 	"kernel_addr=0x00200000\0" \
200 	"kernel_addr_r=0x84200000\0" \
201 	"kernel_size=0x00800000\0" \
202 	"ramdisk_addr=0x00a00000\0" \
203 	"ramdisk_addr_r=0x84a00000\0" \
204 	"ramdisk_size=0x00600000\0" \
205 	"ramdisk_file=rootfs.cpio.uboot\0" \
206 	"norboot=setexpr kernel_addr $nor_base + $kernel_addr &&" \
207 		"setexpr ramdisk_addr $nor_base + $ramdisk_addr &&" \
208 		"setexpr fdt_addr $nor_base + $fdt_addr &&" \
209 		"bootm $kernel_addr $ramdisk_addr $fdt_addr\0" \
210 	"nandboot=nand read $kernel_addr_r $kernel_addr $kernel_size &&" \
211 		"nand read $ramdisk_addr_r $ramdisk_addr $ramdisk_size &&" \
212 		"nand read $fdt_addr_r $fdt_addr $fdt_size &&" \
213 		"bootm $kernel_addr_r $ramdisk_addr_r $fdt_addr_r\0" \
214 	"tftpboot=tftpboot $kernel_addr_r $bootfile &&" \
215 		"tftpboot $ramdisk_addr_r $ramdisk_file &&" \
216 		"tftpboot $fdt_addr_r $fdt_file &&" \
217 		"bootm $kernel_addr_r $ramdisk_addr_r $fdt_addr_r\0"
218 #endif
219 
220 #define	CONFIG_EXTRA_ENV_SETTINGS				\
221 	"netdev=eth0\0"						\
222 	"verify=n\0"						\
223 	"norbase=0x42000000\0"					\
224 	"nandupdate=nand erase 0 0x00100000 &&"			\
225 		"tftpboot u-boot-spl-dtb.bin &&"		\
226 		"nand write $loadaddr 0 0x00010000 &&"		\
227 		"tftpboot u-boot-dtb.img &&"			\
228 		"nand write $loadaddr 0x00010000 0x000f0000\0"	\
229 	LINUXBOOT_ENV_SETTINGS
230 
231 /* Open Firmware flat tree */
232 #define CONFIG_OF_LIBFDT
233 
234 #define CONFIG_SYS_SDRAM_BASE		0x80000000
235 #define CONFIG_NR_DRAM_BANKS		2
236 
237 #if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD3) || \
238 	defined(CONFIG_ARCH_UNIPHIER_PH1_LD4) || \
239 	defined(CONFIG_ARCH_UNIPHIER_PH1_SLD8)
240 #define CONFIG_SPL_TEXT_BASE		0x00040000
241 #else
242 #define CONFIG_SPL_TEXT_BASE		0x00100000
243 #endif
244 
245 #define CONFIG_SPL_STACK		(0x0ff08000)
246 #define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_TEXT_BASE)
247 
248 #define CONFIG_PANIC_HANG
249 
250 #define CONFIG_SPL_FRAMEWORK
251 #define CONFIG_SPL_SERIAL_SUPPORT
252 #define CONFIG_SPL_NAND_SUPPORT
253 
254 #define CONFIG_SPL_LIBCOMMON_SUPPORT	/* for mem_malloc_init */
255 #define CONFIG_SPL_LIBGENERIC_SUPPORT
256 
257 #define CONFIG_SPL_BOARD_INIT
258 
259 #define CONFIG_SYS_NAND_U_BOOT_OFFS		0x10000
260 
261 #define CONFIG_SPL_MAX_FOOTPRINT		0x10000
262 
263 #endif /* __CONFIG_UNIPHIER_COMMON_H__ */
264