1 /* 2 * Copyright (C) 2012-2015 Panasonic Corporation 3 * Copyright (C) 2015-2016 Socionext Inc. 4 * Author: Masahiro Yamada <yamada.masahiro@socionext.com> 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 /* U-Boot - Common settings for UniPhier Family */ 10 11 #ifndef __CONFIG_UNIPHIER_COMMON_H__ 12 #define __CONFIG_UNIPHIER_COMMON_H__ 13 14 #define CONFIG_ARMV7_PSCI_1_0 15 16 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 17 18 /*----------------------------------------------------------------------- 19 * MMU and Cache Setting 20 *----------------------------------------------------------------------*/ 21 22 /* Comment out the following to enable L1 cache */ 23 /* #define CONFIG_SYS_ICACHE_OFF */ 24 /* #define CONFIG_SYS_DCACHE_OFF */ 25 26 #define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024) 27 28 #define CONFIG_TIMESTAMP 29 30 /* FLASH related */ 31 #define CONFIG_MTD_DEVICE 32 33 #define CONFIG_SMC911X_32_BIT 34 /* dummy: referenced by examples/standalone/smc911x_eeprom.c */ 35 #define CONFIG_SMC911X_BASE 0 36 37 #ifdef CONFIG_MICRO_SUPPORT_CARD 38 #define CONFIG_SMC911X 39 #endif 40 41 #define CONFIG_FLASH_CFI_DRIVER 42 #define CONFIG_SYS_FLASH_CFI 43 44 #define CONFIG_SYS_MAX_FLASH_SECT 256 45 #define CONFIG_SYS_MONITOR_BASE 0 46 #define CONFIG_SYS_MONITOR_LEN 0x00080000 /* 512KB */ 47 #define CONFIG_SYS_FLASH_BASE 0 48 49 /* 50 * flash_toggle does not work for our support card. 51 * We need to use flash_status_poll. 52 */ 53 #define CONFIG_SYS_CFI_FLASH_STATUS_POLL 54 55 #define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ 56 57 #define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1 58 59 /* serial console configuration */ 60 #define CONFIG_BAUDRATE 115200 61 62 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 63 64 #define CONFIG_CMDLINE_EDITING /* add command line history */ 65 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ 66 /* Print Buffer Size */ 67 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 68 #define CONFIG_SYS_MAXARGS 16 /* max number of command */ 69 /* Boot Argument Buffer Size */ 70 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) 71 72 #define CONFIG_CONS_INDEX 1 73 74 /* #define CONFIG_ENV_IS_NOWHERE */ 75 /* #define CONFIG_ENV_IS_IN_NAND */ 76 #define CONFIG_ENV_IS_IN_MMC 77 #define CONFIG_ENV_OFFSET 0x100000 78 #define CONFIG_ENV_SIZE 0x2000 79 /* #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) */ 80 81 #define CONFIG_SYS_MMC_ENV_DEV 0 82 #define CONFIG_SYS_MMC_ENV_PART 1 83 84 #ifdef CONFIG_ARMV8_MULTIENTRY 85 #define CPU_RELEASE_ADDR 0x80000000 86 #define COUNTER_FREQUENCY 50000000 87 #define CONFIG_GICV3 88 #define GICD_BASE 0x5fe00000 89 #if defined(CONFIG_ARCH_UNIPHIER_LD11) 90 #define GICR_BASE 0x5fe40000 91 #elif defined(CONFIG_ARCH_UNIPHIER_LD20) 92 #define GICR_BASE 0x5fe80000 93 #endif 94 #elif !defined(CONFIG_ARM64) 95 /* Time clock 1MHz */ 96 #define CONFIG_SYS_TIMER_RATE 1000000 97 #endif 98 99 #define CONFIG_SYS_MAX_NAND_DEVICE 1 100 #define CONFIG_SYS_NAND_MAX_CHIPS 2 101 #define CONFIG_SYS_NAND_ONFI_DETECTION 102 103 #define CONFIG_NAND_DENALI_ECC_SIZE 1024 104 105 #ifdef CONFIG_ARCH_UNIPHIER_SLD3 106 #define CONFIG_SYS_NAND_REGS_BASE 0xf8100000 107 #define CONFIG_SYS_NAND_DATA_BASE 0xf8000000 108 #else 109 #define CONFIG_SYS_NAND_REGS_BASE 0x68100000 110 #define CONFIG_SYS_NAND_DATA_BASE 0x68000000 111 #endif 112 113 #define CONFIG_SYS_NAND_BASE (CONFIG_SYS_NAND_DATA_BASE + 0x10) 114 115 #define CONFIG_SYS_NAND_USE_FLASH_BBT 116 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 117 118 /* USB */ 119 #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 4 120 #define CONFIG_FAT_WRITE 121 122 /* SD/MMC */ 123 #define CONFIG_SUPPORT_EMMC_BOOT 124 125 /* memtest works on */ 126 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE 127 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x01000000) 128 129 /* 130 * Network Configuration 131 */ 132 #define CONFIG_SERVERIP 192.168.11.1 133 #define CONFIG_IPADDR 192.168.11.10 134 #define CONFIG_GATEWAYIP 192.168.11.1 135 #define CONFIG_NETMASK 255.255.255.0 136 137 #define CONFIG_LOADADDR 0x84000000 138 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 139 140 #define CONFIG_CMDLINE_EDITING /* add command line history */ 141 142 #if defined(CONFIG_ARM64) && !defined(CONFIG_ARMV8_MULTIENTRY) 143 /* ARM Trusted Firmware */ 144 #define BOOT_IMAGES \ 145 "second_image=unph_bl.bin\0" \ 146 "third_image=fip.bin\0" 147 #else 148 #define BOOT_IMAGES \ 149 "second_image=u-boot-spl.bin\0" \ 150 "third_image=u-boot.bin\0" 151 #endif 152 153 #define CONFIG_BOOTCOMMAND "run $bootmode" 154 155 #define CONFIG_ROOTPATH "/nfs/root/path" 156 #define CONFIG_NFSBOOTCOMMAND \ 157 "setenv bootargs $bootargs root=/dev/nfs rw " \ 158 "nfsroot=$serverip:$rootpath " \ 159 "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off;" \ 160 "run __nfsboot" 161 162 #ifdef CONFIG_FIT 163 #define CONFIG_BOOTFILE "fitImage" 164 #define LINUXBOOT_ENV_SETTINGS \ 165 "fit_addr=0x00100000\0" \ 166 "fit_addr_r=0x84100000\0" \ 167 "fit_size=0x00f00000\0" \ 168 "norboot=setexpr fit_addr $nor_base + $fit_addr &&" \ 169 "bootm $fit_addr\0" \ 170 "nandboot=nand read $fit_addr_r $fit_addr $fit_size &&" \ 171 "bootm $fit_addr_r\0" \ 172 "tftpboot=tftpboot $fit_addr_r $bootfile &&" \ 173 "bootm $fit_addr_r\0" \ 174 "__nfsboot=run tftpboot\0" 175 #else 176 #ifdef CONFIG_ARM64 177 #define CONFIG_BOOTFILE "Image.gz" 178 #define LINUXBOOT_CMD "booti" 179 #define KERNEL_ADDR_LOAD "kernel_addr_load=0x84200000\0" 180 #define KERNEL_ADDR_R "kernel_addr_r=0x80080000\0" 181 #else 182 #define CONFIG_BOOTFILE "zImage" 183 #define LINUXBOOT_CMD "bootz" 184 #define KERNEL_ADDR_LOAD "kernel_addr_load=0x80208000\0" 185 #define KERNEL_ADDR_R "kernel_addr_r=0x80208000\0" 186 #endif 187 #define LINUXBOOT_ENV_SETTINGS \ 188 "fdt_addr=0x00100000\0" \ 189 "fdt_addr_r=0x84100000\0" \ 190 "fdt_size=0x00008000\0" \ 191 "kernel_addr=0x00200000\0" \ 192 KERNEL_ADDR_LOAD \ 193 KERNEL_ADDR_R \ 194 "kernel_size=0x00800000\0" \ 195 "ramdisk_addr=0x00a00000\0" \ 196 "ramdisk_addr_r=0x84a00000\0" \ 197 "ramdisk_size=0x00600000\0" \ 198 "ramdisk_file=rootfs.cpio.uboot\0" \ 199 "boot_common=setexpr bootm_low $kernel_addr_r '&' fe000000 && " \ 200 "if test $kernel_addr_load = $kernel_addr_r; then " \ 201 "true; " \ 202 "else " \ 203 "unzip $kernel_addr_load $kernel_addr_r; " \ 204 "fi && " \ 205 LINUXBOOT_CMD " $kernel_addr_r $ramdisk_addr_r $fdt_addr_r\0" \ 206 "norboot=setexpr kernel_addr_nor $nor_base + $kernel_addr && " \ 207 "setexpr kernel_size_div4 $kernel_size / 4 && " \ 208 "cp $kernel_addr_nor $kernel_addr_load $kernel_size_div4 && " \ 209 "setexpr ramdisk_addr_nor $nor_base + $ramdisk_addr && " \ 210 "setexpr ramdisk_size_div4 $ramdisk_size / 4 && " \ 211 "cp $ramdisk_addr_nor $ramdisk_addr_r $ramdisk_size_div4 && " \ 212 "setexpr fdt_addr_nor $nor_base + $fdt_addr && " \ 213 "setexpr fdt_size_div4 $fdt_size / 4 && " \ 214 "cp $fdt_addr_nor $fdt_addr_r $fdt_size_div4 && " \ 215 "run boot_common\0" \ 216 "nandboot=nand read $kernel_addr_load $kernel_addr $kernel_size && " \ 217 "nand read $ramdisk_addr_r $ramdisk_addr $ramdisk_size &&" \ 218 "nand read $fdt_addr_r $fdt_addr $fdt_size &&" \ 219 "run boot_common\0" \ 220 "tftpboot=tftpboot $kernel_addr_load $bootfile && " \ 221 "tftpboot $ramdisk_addr_r $ramdisk_file &&" \ 222 "tftpboot $fdt_addr_r $fdt_file &&" \ 223 "run boot_common\0" \ 224 "__nfsboot=tftpboot $kernel_addr_load $bootfile && " \ 225 "tftpboot $fdt_addr_r $fdt_file &&" \ 226 "setenv ramdisk_addr_r - &&" \ 227 "run boot_common\0" 228 #endif 229 230 #define CONFIG_EXTRA_ENV_SETTINGS \ 231 "netdev=eth0\0" \ 232 "verify=n\0" \ 233 "initrd_high=0xffffffffffffffff\0" \ 234 "nor_base=0x42000000\0" \ 235 "sramupdate=setexpr tmp_addr $nor_base + 0x50000 &&" \ 236 "tftpboot $tmp_addr $second_image && " \ 237 "setexpr tmp_addr $nor_base + 0x70000 && " \ 238 "tftpboot $tmp_addr $third_image\0" \ 239 "emmcupdate=mmcsetn &&" \ 240 "mmc partconf $mmc_first_dev 0 1 1 &&" \ 241 "tftpboot $second_image && " \ 242 "mmc write $loadaddr 0 100 && " \ 243 "tftpboot $third_image && " \ 244 "mmc write $loadaddr 100 700\0" \ 245 "nandupdate=nand erase 0 0x00100000 &&" \ 246 "tftpboot $second_image && " \ 247 "nand write $loadaddr 0 0x00020000 && " \ 248 "tftpboot $third_image && " \ 249 "nand write $loadaddr 0x00020000 0x000e0000\0" \ 250 BOOT_IMAGES \ 251 LINUXBOOT_ENV_SETTINGS 252 253 #define CONFIG_SYS_BOOTMAPSZ 0x20000000 254 255 #define CONFIG_SYS_SDRAM_BASE 0x80000000 256 #define CONFIG_NR_DRAM_BANKS 3 257 /* for LD20; the last 64 byte is used for dynamic DDR PHY training */ 258 #define CONFIG_SYS_MEM_TOP_HIDE 64 259 260 #define CONFIG_PANIC_HANG 261 262 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE) 263 264 /* only for SPL */ 265 #if defined(CONFIG_ARM64) 266 #define CONFIG_SPL_TEXT_BASE 0x30000000 267 #elif defined(CONFIG_ARCH_UNIPHIER_SLD3) || \ 268 defined(CONFIG_ARCH_UNIPHIER_LD4) || \ 269 defined(CONFIG_ARCH_UNIPHIER_SLD8) 270 #define CONFIG_SPL_TEXT_BASE 0x00040000 271 #else 272 #define CONFIG_SPL_TEXT_BASE 0x00100000 273 #endif 274 275 #if defined(CONFIG_ARCH_UNIPHIER_LD11) 276 #define CONFIG_SPL_STACK (0x30014c00) 277 #elif defined(CONFIG_ARCH_UNIPHIER_LD20) 278 #define CONFIG_SPL_STACK (0x3001c000) 279 #else 280 #define CONFIG_SPL_STACK (0x00100000) 281 #endif 282 283 #define CONFIG_SPL_FRAMEWORK 284 #ifdef CONFIG_ARM64 285 #define CONFIG_SPL_BOARD_LOAD_IMAGE 286 #endif 287 288 #define CONFIG_SPL_BOARD_INIT 289 290 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000 291 292 /* subtract sizeof(struct image_header) */ 293 #define CONFIG_SYS_UBOOT_BASE (0x70000 - 0x40) 294 295 #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" 296 #define CONFIG_SPL_MAX_FOOTPRINT 0x10000 297 #if defined(CONFIG_ARCH_UNIPHIER_LD20) 298 #define CONFIG_SPL_MAX_SIZE 0x14000 299 #else 300 #define CONFIG_SPL_MAX_SIZE 0x10000 301 #endif 302 #if defined(CONFIG_ARCH_UNIPHIER_LD11) 303 #define CONFIG_SPL_BSS_START_ADDR 0x30012000 304 #elif defined(CONFIG_ARCH_UNIPHIER_LD20) 305 #define CONFIG_SPL_BSS_START_ADDR 0x30016000 306 #endif 307 #define CONFIG_SPL_BSS_MAX_SIZE 0x2000 308 309 #define CONFIG_SPL_PAD_TO 0x20000 310 311 #endif /* __CONFIG_UNIPHIER_COMMON_H__ */ 312