xref: /openbmc/u-boot/include/configs/uniphier.h (revision 4a9a3292)
1 /*
2  * Copyright (C) 2012-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
3  *
4  * SPDX-License-Identifier:	GPL-2.0+
5  */
6 
7 /* U-Boot - Common settings for UniPhier Family */
8 
9 #ifndef __CONFIG_UNIPHIER_COMMON_H__
10 #define __CONFIG_UNIPHIER_COMMON_H__
11 
12 #define CONFIG_I2C_EEPROM
13 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS  10
14 
15 #define CONFIG_SMC911X
16 
17 /* dummy: referenced by examples/standalone/smc911x_eeprom.c */
18 #define CONFIG_SMC911X_BASE	0
19 #define CONFIG_SMC911X_32_BIT
20 
21 /*-----------------------------------------------------------------------
22  * MMU and Cache Setting
23  *----------------------------------------------------------------------*/
24 
25 /* Comment out the following to enable L1 cache */
26 /* #define CONFIG_SYS_ICACHE_OFF */
27 /* #define CONFIG_SYS_DCACHE_OFF */
28 
29 #define CONFIG_SYS_CACHELINE_SIZE	32
30 
31 /* Comment out the following to disable L2 cache */
32 #define CONFIG_UNIPHIER_L2CACHE_ON
33 
34 #define CONFIG_DISPLAY_CPUINFO
35 #define CONFIG_DISPLAY_BOARDINFO
36 #define CONFIG_MISC_INIT_F
37 #define CONFIG_BOARD_EARLY_INIT_F
38 #define CONFIG_BOARD_EARLY_INIT_R
39 #define CONFIG_BOARD_LATE_INIT
40 
41 #define CONFIG_SYS_MALLOC_LEN		(4 * 1024 * 1024)
42 
43 #define CONFIG_TIMESTAMP
44 
45 /* FLASH related */
46 #define CONFIG_MTD_DEVICE
47 
48 /*
49  * uncomment the following to disable FLASH related code.
50  */
51 /* #define CONFIG_SYS_NO_FLASH */
52 
53 #define CONFIG_FLASH_CFI_DRIVER
54 #define CONFIG_SYS_FLASH_CFI
55 
56 #define CONFIG_SYS_MAX_FLASH_SECT	256
57 #define CONFIG_SYS_MONITOR_BASE		0
58 #define CONFIG_SYS_MONITOR_LEN		0x00080000	/* 512KB */
59 #define CONFIG_SYS_FLASH_BASE		0
60 
61 /*
62  * flash_toggle does not work for out supoort card.
63  * We need to use flash_status_poll.
64  */
65 #define CONFIG_SYS_CFI_FLASH_STATUS_POLL
66 
67 #define CONFIG_FLASH_SHOW_PROGRESS	45 /* count down from 45/5: 9..1 */
68 
69 #define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1
70 
71 /* serial console configuration */
72 #define CONFIG_BAUDRATE			115200
73 
74 #if !defined(CONFIG_SPL_BUILD) && !defined(CONFIG_ARM64)
75 #define CONFIG_USE_ARCH_MEMSET
76 #define CONFIG_USE_ARCH_MEMCPY
77 #endif
78 
79 #define CONFIG_SYS_LONGHELP		/* undef to save memory */
80 
81 #define CONFIG_CMDLINE_EDITING		/* add command line history	*/
82 #define CONFIG_SYS_CBSIZE		1024	/* Console I/O Buffer Size */
83 /* Print Buffer Size */
84 #define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
85 #define CONFIG_SYS_MAXARGS		16	/* max number of command */
86 /* Boot Argument Buffer Size */
87 #define CONFIG_SYS_BARGSIZE		(CONFIG_SYS_CBSIZE)
88 
89 #define CONFIG_CONS_INDEX		1
90 
91 /* #define CONFIG_ENV_IS_NOWHERE */
92 /* #define CONFIG_ENV_IS_IN_NAND */
93 #define CONFIG_ENV_IS_IN_MMC
94 #define CONFIG_ENV_OFFSET			0x80000
95 #define CONFIG_ENV_SIZE				0x2000
96 /* #define CONFIG_ENV_OFFSET_REDUND	(CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) */
97 
98 #define CONFIG_SYS_MMC_ENV_DEV		0
99 #define CONFIG_SYS_MMC_ENV_PART		1
100 
101 #ifdef CONFIG_ARM64
102 #define CPU_RELEASE_ADDR			0x80000000
103 #define COUNTER_FREQUENCY			50000000
104 #define CONFIG_GICV3
105 #define GICD_BASE				0x5fe00000
106 #if defined(CONFIG_ARCH_UNIPHIER_LD11)
107 #define GICR_BASE				0x5fe40000
108 #elif defined(CONFIG_ARCH_UNIPHIER_LD20)
109 #define GICR_BASE				0x5fe80000
110 #endif
111 #else
112 /* Time clock 1MHz */
113 #define CONFIG_SYS_TIMER_RATE			1000000
114 #endif
115 
116 
117 #define CONFIG_SYS_MAX_NAND_DEVICE			1
118 #define CONFIG_SYS_NAND_MAX_CHIPS			2
119 #define CONFIG_SYS_NAND_ONFI_DETECTION
120 
121 #define CONFIG_NAND_DENALI_ECC_SIZE			1024
122 
123 #ifdef CONFIG_ARCH_UNIPHIER_SLD3
124 #define CONFIG_SYS_NAND_REGS_BASE			0xf8100000
125 #define CONFIG_SYS_NAND_DATA_BASE			0xf8000000
126 #else
127 #define CONFIG_SYS_NAND_REGS_BASE			0x68100000
128 #define CONFIG_SYS_NAND_DATA_BASE			0x68000000
129 #endif
130 
131 #define CONFIG_SYS_NAND_BASE		(CONFIG_SYS_NAND_DATA_BASE + 0x10)
132 
133 #define CONFIG_SYS_NAND_USE_FLASH_BBT
134 #define CONFIG_SYS_NAND_BAD_BLOCK_POS			0
135 
136 /* USB */
137 #define CONFIG_USB_MAX_CONTROLLER_COUNT		2
138 #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS	4
139 #define CONFIG_FAT_WRITE
140 #define CONFIG_DOS_PARTITION
141 
142 /* SD/MMC */
143 #define CONFIG_SUPPORT_EMMC_BOOT
144 #define CONFIG_GENERIC_MMC
145 
146 /* memtest works on */
147 #define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
148 #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_SDRAM_BASE + 0x01000000)
149 
150 #define CONFIG_ZERO_BOOTDELAY_CHECK	/* check for keypress on bootdelay==0 */
151 
152 /*
153  * Network Configuration
154  */
155 #define CONFIG_SERVERIP			192.168.11.1
156 #define CONFIG_IPADDR			192.168.11.10
157 #define CONFIG_GATEWAYIP		192.168.11.1
158 #define CONFIG_NETMASK			255.255.255.0
159 
160 #define CONFIG_LOADADDR			0x84000000
161 #define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
162 
163 #define CONFIG_CMDLINE_EDITING		/* add command line history	*/
164 
165 #define CONFIG_BOOTCOMMAND		"run $bootmode"
166 
167 #define CONFIG_ROOTPATH			"/nfs/root/path"
168 #define CONFIG_NFSBOOTCOMMAND						\
169 	"setenv bootargs $bootargs root=/dev/nfs rw "			\
170 	"nfsroot=$serverip:$rootpath "					\
171 	"ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off;" \
172 		"run __nfsboot"
173 
174 #ifdef CONFIG_FIT
175 #define CONFIG_BOOTFILE			"fitImage"
176 #define LINUXBOOT_ENV_SETTINGS \
177 	"fit_addr=0x00100000\0" \
178 	"fit_addr_r=0x84100000\0" \
179 	"fit_size=0x00f00000\0" \
180 	"norboot=setexpr fit_addr $nor_base + $fit_addr &&" \
181 		"bootm $fit_addr\0" \
182 	"nandboot=nand read $fit_addr_r $fit_addr $fit_size &&" \
183 		"bootm $fit_addr_r\0" \
184 	"tftpboot=tftpboot $fit_addr_r $bootfile &&" \
185 		"bootm $fit_addr_r\0" \
186 	"__nfsboot=run tftpboot\0"
187 #else
188 #ifdef CONFIG_ARM64
189 #define CONFIG_CMD_BOOTI
190 #define CONFIG_BOOTFILE			"Image"
191 #define LINUXBOOT_CMD			"booti"
192 #define KERNEL_ADDR_R			"kernel_addr_r=0x80080000\0"
193 #define KERNEL_SIZE			"kernel_size=0x00c00000\0"
194 #define RAMDISK_ADDR			"ramdisk_addr=0x00e00000\0"
195 #else
196 #define CONFIG_BOOTFILE			"zImage"
197 #define LINUXBOOT_CMD			"bootz"
198 #define KERNEL_ADDR_R			"kernel_addr_r=0x80208000\0"
199 #define KERNEL_SIZE			"kernel_size=0x00800000\0"
200 #define RAMDISK_ADDR			"ramdisk_addr=0x00a00000\0"
201 #endif
202 #define LINUXBOOT_ENV_SETTINGS \
203 	"fdt_addr=0x00100000\0" \
204 	"fdt_addr_r=0x84100000\0" \
205 	"fdt_size=0x00008000\0" \
206 	"kernel_addr=0x00200000\0" \
207 	KERNEL_ADDR_R \
208 	KERNEL_SIZE \
209 	RAMDISK_ADDR \
210 	"ramdisk_addr_r=0x84a00000\0" \
211 	"ramdisk_size=0x00600000\0" \
212 	"ramdisk_file=rootfs.cpio.uboot\0" \
213 	"boot_common=setexpr bootm_low $kernel_addr_r '&' fe000000 &&" \
214 		LINUXBOOT_CMD " $kernel_addr_r $ramdisk_addr_r $fdt_addr_r\0" \
215 	"norboot=setexpr kernel_addr $nor_base + $kernel_addr &&" \
216 		"setexpr kernel_size $kernel_size / 4 &&" \
217 		"cp $kernel_addr $kernel_addr_r $kernel_size &&" \
218 		"setexpr ramdisk_addr_r $nor_base + $ramdisk_addr &&" \
219 		"setexpr fdt_addr_r $nor_base + $fdt_addr &&" \
220 		"run boot_common\0" \
221 	"nandboot=nand read $kernel_addr_r $kernel_addr $kernel_size &&" \
222 		"nand read $ramdisk_addr_r $ramdisk_addr $ramdisk_size &&" \
223 		"nand read $fdt_addr_r $fdt_addr $fdt_size &&" \
224 		"run boot_common\0" \
225 	"tftpboot=tftpboot $kernel_addr_r $bootfile &&" \
226 		"tftpboot $ramdisk_addr_r $ramdisk_file &&" \
227 		"tftpboot $fdt_addr_r $fdt_file &&" \
228 		"run boot_common\0" \
229 	"__nfsboot=tftpboot $kernel_addr_r $bootfile &&" \
230 		"tftpboot $fdt_addr_r $fdt_file &&" \
231 		"tftpboot $fdt_addr_r $fdt_file &&" \
232 		"setenv ramdisk_addr_r - &&" \
233 		"run boot_common\0"
234 #endif
235 
236 #define	CONFIG_EXTRA_ENV_SETTINGS				\
237 	"netdev=eth0\0"						\
238 	"verify=n\0"						\
239 	"nor_base=0x42000000\0"					\
240 	"sramupdate=setexpr tmp_addr $nor_base + 0x50000 &&"	\
241 		"tftpboot $tmp_addr u-boot-spl.bin &&"		\
242 		"setexpr tmp_addr $nor_base + 0x60000 &&"	\
243 		"tftpboot $tmp_addr u-boot.bin\0"		\
244 	"emmcupdate=mmcsetn &&"					\
245 		"mmc partconf $mmc_first_dev 0 1 1 &&"		\
246 		"tftpboot u-boot-spl.bin &&"			\
247 		"mmc write $loadaddr 0 80 &&"			\
248 		"tftpboot u-boot.bin &&"			\
249 		"mmc write $loadaddr 80 780\0"			\
250 	"nandupdate=nand erase 0 0x00100000 &&"			\
251 		"tftpboot u-boot-spl.bin &&"			\
252 		"nand write $loadaddr 0 0x00010000 &&"		\
253 		"tftpboot u-boot.bin &&"			\
254 		"nand write $loadaddr 0x00010000 0x000f0000\0"	\
255 	LINUXBOOT_ENV_SETTINGS
256 
257 #define CONFIG_SYS_BOOTMAPSZ			0x20000000
258 
259 #define CONFIG_SYS_SDRAM_BASE		0x80000000
260 #define CONFIG_NR_DRAM_BANKS		2
261 /* for LD20; the last 64 byte is used for dynamic DDR PHY training */
262 #define CONFIG_SYS_MEM_TOP_HIDE		64
263 
264 #if defined(CONFIG_ARM64)
265 #define CONFIG_SPL_TEXT_BASE		0x30000000
266 #elif defined(CONFIG_ARCH_UNIPHIER_SLD3) || \
267 	defined(CONFIG_ARCH_UNIPHIER_LD4) || \
268 	defined(CONFIG_ARCH_UNIPHIER_SLD8)
269 #define CONFIG_SPL_TEXT_BASE		0x00040000
270 #else
271 #define CONFIG_SPL_TEXT_BASE		0x00100000
272 #endif
273 
274 #if defined(CONFIG_ARCH_UNIPHIER_LD11)
275 #define CONFIG_SPL_STACK		(0x30014c00)
276 #elif defined(CONFIG_ARCH_UNIPHIER_LD20)
277 #define CONFIG_SPL_STACK		(0x3001c000)
278 #else
279 #define CONFIG_SPL_STACK		(0x00100000)
280 #endif
281 #define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_TEXT_BASE)
282 
283 #define CONFIG_PANIC_HANG
284 
285 #define CONFIG_SPL_FRAMEWORK
286 #define CONFIG_SPL_SERIAL_SUPPORT
287 #define CONFIG_SPL_NOR_SUPPORT
288 #ifdef CONFIG_ARM64
289 #define CONFIG_SPL_BOARD_LOAD_IMAGE
290 #else
291 #define CONFIG_SPL_NAND_SUPPORT
292 #define CONFIG_SPL_MMC_SUPPORT
293 #endif
294 
295 #define CONFIG_SPL_LIBCOMMON_SUPPORT	/* for mem_malloc_init */
296 #define CONFIG_SPL_LIBGENERIC_SUPPORT
297 
298 #define CONFIG_SPL_BOARD_INIT
299 
300 #define CONFIG_SYS_NAND_U_BOOT_OFFS		0x10000
301 
302 /* subtract sizeof(struct image_header) */
303 #define CONFIG_SYS_UBOOT_BASE			(0x60000 - 0x40)
304 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	0x80
305 
306 #define CONFIG_SPL_TARGET			"u-boot-with-spl.bin"
307 #define CONFIG_SPL_MAX_FOOTPRINT		0x10000
308 #define CONFIG_SPL_MAX_SIZE			0x10000
309 #if defined(CONFIG_ARCH_UNIPHIER_LD11)
310 #define CONFIG_SPL_BSS_START_ADDR		0x30012000
311 #elif defined(CONFIG_ARCH_UNIPHIER_LD20)
312 #define CONFIG_SPL_BSS_START_ADDR		0x30016000
313 #endif
314 #define CONFIG_SPL_BSS_MAX_SIZE			0x2000
315 
316 #endif /* __CONFIG_UNIPHIER_COMMON_H__ */
317