xref: /openbmc/u-boot/include/configs/uniphier.h (revision 2d2811c2)
1 /*
2  * Copyright (C) 2012-2015 Panasonic Corporation
3  * Copyright (C) 2015-2016 Socionext Inc.
4  *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
5  *
6  * SPDX-License-Identifier:	GPL-2.0+
7  */
8 
9 /* U-Boot - Common settings for UniPhier Family */
10 
11 #ifndef __CONFIG_UNIPHIER_COMMON_H__
12 #define __CONFIG_UNIPHIER_COMMON_H__
13 
14 #define CONFIG_ARMV7_PSCI
15 #define CONFIG_ARMV7_PSCI_NR_CPUS   4
16 
17 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS  10
18 
19 #define CONFIG_SMC911X
20 
21 /* dummy: referenced by examples/standalone/smc911x_eeprom.c */
22 #define CONFIG_SMC911X_BASE	0
23 #define CONFIG_SMC911X_32_BIT
24 
25 /*-----------------------------------------------------------------------
26  * MMU and Cache Setting
27  *----------------------------------------------------------------------*/
28 
29 /* Comment out the following to enable L1 cache */
30 /* #define CONFIG_SYS_ICACHE_OFF */
31 /* #define CONFIG_SYS_DCACHE_OFF */
32 
33 #ifdef CONFIG_CACHE_UNIPHIER
34 #define CONFIG_SYS_CACHELINE_SIZE	128
35 #else
36 #define CONFIG_SYS_CACHELINE_SIZE	32
37 #endif
38 
39 #define CONFIG_DISPLAY_CPUINFO
40 #define CONFIG_DISPLAY_BOARDINFO
41 #define CONFIG_MISC_INIT_F
42 #define CONFIG_BOARD_EARLY_INIT_F
43 #define CONFIG_BOARD_EARLY_INIT_R
44 #define CONFIG_BOARD_LATE_INIT
45 
46 #define CONFIG_SYS_MALLOC_LEN		(4 * 1024 * 1024)
47 
48 #define CONFIG_TIMESTAMP
49 
50 /* FLASH related */
51 #define CONFIG_MTD_DEVICE
52 
53 /*
54  * uncomment the following to disable FLASH related code.
55  */
56 /* #define CONFIG_SYS_NO_FLASH */
57 
58 #define CONFIG_FLASH_CFI_DRIVER
59 #define CONFIG_SYS_FLASH_CFI
60 
61 #define CONFIG_SYS_MAX_FLASH_SECT	256
62 #define CONFIG_SYS_MONITOR_BASE		0
63 #define CONFIG_SYS_MONITOR_LEN		0x00080000	/* 512KB */
64 #define CONFIG_SYS_FLASH_BASE		0
65 
66 /*
67  * flash_toggle does not work for out supoort card.
68  * We need to use flash_status_poll.
69  */
70 #define CONFIG_SYS_CFI_FLASH_STATUS_POLL
71 
72 #define CONFIG_FLASH_SHOW_PROGRESS	45 /* count down from 45/5: 9..1 */
73 
74 #define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1
75 
76 /* serial console configuration */
77 #define CONFIG_BAUDRATE			115200
78 
79 #if !defined(CONFIG_SPL_BUILD) && !defined(CONFIG_ARM64)
80 #define CONFIG_USE_ARCH_MEMSET
81 #define CONFIG_USE_ARCH_MEMCPY
82 #endif
83 
84 #define CONFIG_SYS_LONGHELP		/* undef to save memory */
85 
86 #define CONFIG_CMDLINE_EDITING		/* add command line history	*/
87 #define CONFIG_SYS_CBSIZE		1024	/* Console I/O Buffer Size */
88 /* Print Buffer Size */
89 #define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
90 #define CONFIG_SYS_MAXARGS		16	/* max number of command */
91 /* Boot Argument Buffer Size */
92 #define CONFIG_SYS_BARGSIZE		(CONFIG_SYS_CBSIZE)
93 
94 #define CONFIG_CONS_INDEX		1
95 
96 /* #define CONFIG_ENV_IS_NOWHERE */
97 /* #define CONFIG_ENV_IS_IN_NAND */
98 #define CONFIG_ENV_IS_IN_MMC
99 #define CONFIG_ENV_OFFSET			0x80000
100 #define CONFIG_ENV_SIZE				0x2000
101 /* #define CONFIG_ENV_OFFSET_REDUND	(CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) */
102 
103 #define CONFIG_SYS_MMC_ENV_DEV		0
104 #define CONFIG_SYS_MMC_ENV_PART		1
105 
106 #ifdef CONFIG_ARM64
107 #define CPU_RELEASE_ADDR			0x80000000
108 #define COUNTER_FREQUENCY			50000000
109 #define CONFIG_GICV3
110 #define GICD_BASE				0x5fe00000
111 #if defined(CONFIG_ARCH_UNIPHIER_LD11)
112 #define GICR_BASE				0x5fe40000
113 #elif defined(CONFIG_ARCH_UNIPHIER_LD20)
114 #define GICR_BASE				0x5fe80000
115 #endif
116 #else
117 /* Time clock 1MHz */
118 #define CONFIG_SYS_TIMER_RATE			1000000
119 #endif
120 
121 
122 #define CONFIG_SYS_MAX_NAND_DEVICE			1
123 #define CONFIG_SYS_NAND_MAX_CHIPS			2
124 #define CONFIG_SYS_NAND_ONFI_DETECTION
125 
126 #define CONFIG_NAND_DENALI_ECC_SIZE			1024
127 
128 #ifdef CONFIG_ARCH_UNIPHIER_SLD3
129 #define CONFIG_SYS_NAND_REGS_BASE			0xf8100000
130 #define CONFIG_SYS_NAND_DATA_BASE			0xf8000000
131 #else
132 #define CONFIG_SYS_NAND_REGS_BASE			0x68100000
133 #define CONFIG_SYS_NAND_DATA_BASE			0x68000000
134 #endif
135 
136 #define CONFIG_SYS_NAND_BASE		(CONFIG_SYS_NAND_DATA_BASE + 0x10)
137 
138 #define CONFIG_SYS_NAND_USE_FLASH_BBT
139 #define CONFIG_SYS_NAND_BAD_BLOCK_POS			0
140 
141 /* USB */
142 #define CONFIG_USB_MAX_CONTROLLER_COUNT		2
143 #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS	4
144 #define CONFIG_FAT_WRITE
145 #define CONFIG_DOS_PARTITION
146 
147 /* SD/MMC */
148 #define CONFIG_SUPPORT_EMMC_BOOT
149 #define CONFIG_GENERIC_MMC
150 
151 /* memtest works on */
152 #define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
153 #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_SDRAM_BASE + 0x01000000)
154 
155 /*
156  * Network Configuration
157  */
158 #define CONFIG_SERVERIP			192.168.11.1
159 #define CONFIG_IPADDR			192.168.11.10
160 #define CONFIG_GATEWAYIP		192.168.11.1
161 #define CONFIG_NETMASK			255.255.255.0
162 
163 #define CONFIG_LOADADDR			0x84000000
164 #define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
165 
166 #define CONFIG_CMDLINE_EDITING		/* add command line history	*/
167 
168 #define CONFIG_BOOTCOMMAND		"run $bootmode"
169 
170 #define CONFIG_ROOTPATH			"/nfs/root/path"
171 #define CONFIG_NFSBOOTCOMMAND						\
172 	"setenv bootargs $bootargs root=/dev/nfs rw "			\
173 	"nfsroot=$serverip:$rootpath "					\
174 	"ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off;" \
175 		"run __nfsboot"
176 
177 #ifdef CONFIG_FIT
178 #define CONFIG_BOOTFILE			"fitImage"
179 #define LINUXBOOT_ENV_SETTINGS \
180 	"fit_addr=0x00100000\0" \
181 	"fit_addr_r=0x84100000\0" \
182 	"fit_size=0x00f00000\0" \
183 	"norboot=setexpr fit_addr $nor_base + $fit_addr &&" \
184 		"bootm $fit_addr\0" \
185 	"nandboot=nand read $fit_addr_r $fit_addr $fit_size &&" \
186 		"bootm $fit_addr_r\0" \
187 	"tftpboot=tftpboot $fit_addr_r $bootfile &&" \
188 		"bootm $fit_addr_r\0" \
189 	"__nfsboot=run tftpboot\0"
190 #else
191 #ifdef CONFIG_ARM64
192 #define CONFIG_CMD_BOOTI
193 #define CONFIG_BOOTFILE			"Image"
194 #define LINUXBOOT_CMD			"booti"
195 #define KERNEL_ADDR_R			"kernel_addr_r=0x80080000\0"
196 #define KERNEL_SIZE			"kernel_size=0x00c00000\0"
197 #define RAMDISK_ADDR			"ramdisk_addr=0x00e00000\0"
198 #else
199 #define CONFIG_BOOTFILE			"zImage"
200 #define LINUXBOOT_CMD			"bootz"
201 #define KERNEL_ADDR_R			"kernel_addr_r=0x80208000\0"
202 #define KERNEL_SIZE			"kernel_size=0x00800000\0"
203 #define RAMDISK_ADDR			"ramdisk_addr=0x00a00000\0"
204 #endif
205 #define LINUXBOOT_ENV_SETTINGS \
206 	"fdt_addr=0x00100000\0" \
207 	"fdt_addr_r=0x84100000\0" \
208 	"fdt_size=0x00008000\0" \
209 	"kernel_addr=0x00200000\0" \
210 	KERNEL_ADDR_R \
211 	KERNEL_SIZE \
212 	RAMDISK_ADDR \
213 	"ramdisk_addr_r=0x84a00000\0" \
214 	"ramdisk_size=0x00600000\0" \
215 	"ramdisk_file=rootfs.cpio.uboot\0" \
216 	"boot_common=setexpr bootm_low $kernel_addr_r '&' fe000000 &&" \
217 		LINUXBOOT_CMD " $kernel_addr_r $ramdisk_addr_r $fdt_addr_r\0" \
218 	"norboot=setexpr kernel_addr $nor_base + $kernel_addr &&" \
219 		"setexpr kernel_size $kernel_size / 4 &&" \
220 		"cp $kernel_addr $kernel_addr_r $kernel_size &&" \
221 		"setexpr ramdisk_addr_r $nor_base + $ramdisk_addr &&" \
222 		"setexpr fdt_addr_r $nor_base + $fdt_addr &&" \
223 		"run boot_common\0" \
224 	"nandboot=nand read $kernel_addr_r $kernel_addr $kernel_size &&" \
225 		"nand read $ramdisk_addr_r $ramdisk_addr $ramdisk_size &&" \
226 		"nand read $fdt_addr_r $fdt_addr $fdt_size &&" \
227 		"run boot_common\0" \
228 	"tftpboot=tftpboot $kernel_addr_r $bootfile &&" \
229 		"tftpboot $ramdisk_addr_r $ramdisk_file &&" \
230 		"tftpboot $fdt_addr_r $fdt_file &&" \
231 		"run boot_common\0" \
232 	"__nfsboot=tftpboot $kernel_addr_r $bootfile &&" \
233 		"tftpboot $fdt_addr_r $fdt_file &&" \
234 		"setenv ramdisk_addr_r - &&" \
235 		"run boot_common\0"
236 #endif
237 
238 #define	CONFIG_EXTRA_ENV_SETTINGS				\
239 	"netdev=eth0\0"						\
240 	"verify=n\0"						\
241 	"nor_base=0x42000000\0"					\
242 	"sramupdate=setexpr tmp_addr $nor_base + 0x50000 &&"	\
243 		"tftpboot $tmp_addr u-boot-spl.bin &&"		\
244 		"setexpr tmp_addr $nor_base + 0x60000 &&"	\
245 		"tftpboot $tmp_addr u-boot.bin\0"		\
246 	"emmcupdate=mmcsetn &&"					\
247 		"mmc partconf $mmc_first_dev 0 1 1 &&"		\
248 		"tftpboot u-boot-spl.bin &&"			\
249 		"mmc write $loadaddr 0 80 &&"			\
250 		"tftpboot u-boot.bin &&"			\
251 		"mmc write $loadaddr 80 780\0"			\
252 	"nandupdate=nand erase 0 0x00100000 &&"			\
253 		"tftpboot u-boot-spl.bin &&"			\
254 		"nand write $loadaddr 0 0x00010000 &&"		\
255 		"tftpboot u-boot.bin &&"			\
256 		"nand write $loadaddr 0x00010000 0x000f0000\0"	\
257 	LINUXBOOT_ENV_SETTINGS
258 
259 #define CONFIG_SYS_BOOTMAPSZ			0x20000000
260 
261 #define CONFIG_SYS_SDRAM_BASE		0x80000000
262 #define CONFIG_NR_DRAM_BANKS		2
263 /* for LD20; the last 64 byte is used for dynamic DDR PHY training */
264 #define CONFIG_SYS_MEM_TOP_HIDE		64
265 
266 #if defined(CONFIG_ARM64)
267 #define CONFIG_SPL_TEXT_BASE		0x30000000
268 #elif defined(CONFIG_ARCH_UNIPHIER_SLD3) || \
269 	defined(CONFIG_ARCH_UNIPHIER_LD4) || \
270 	defined(CONFIG_ARCH_UNIPHIER_SLD8)
271 #define CONFIG_SPL_TEXT_BASE		0x00040000
272 #else
273 #define CONFIG_SPL_TEXT_BASE		0x00100000
274 #endif
275 
276 #if defined(CONFIG_ARCH_UNIPHIER_LD11)
277 #define CONFIG_SPL_STACK		(0x30014c00)
278 #elif defined(CONFIG_ARCH_UNIPHIER_LD20)
279 #define CONFIG_SPL_STACK		(0x3001c000)
280 #else
281 #define CONFIG_SPL_STACK		(0x00100000)
282 #endif
283 #define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_TEXT_BASE)
284 
285 #define CONFIG_PANIC_HANG
286 
287 #define CONFIG_SPL_FRAMEWORK
288 #define CONFIG_SPL_SERIAL_SUPPORT
289 #define CONFIG_SPL_NOR_SUPPORT
290 #ifdef CONFIG_ARM64
291 #define CONFIG_SPL_BOARD_LOAD_IMAGE
292 #else
293 #define CONFIG_SPL_NAND_SUPPORT
294 #define CONFIG_SPL_MMC_SUPPORT
295 #endif
296 
297 #define CONFIG_SPL_LIBCOMMON_SUPPORT	/* for mem_malloc_init */
298 #define CONFIG_SPL_LIBGENERIC_SUPPORT
299 
300 #define CONFIG_SPL_BOARD_INIT
301 
302 #define CONFIG_SYS_NAND_U_BOOT_OFFS		0x10000
303 
304 /* subtract sizeof(struct image_header) */
305 #define CONFIG_SYS_UBOOT_BASE			(0x60000 - 0x40)
306 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	0x80
307 
308 #define CONFIG_SPL_TARGET			"u-boot-with-spl.bin"
309 #define CONFIG_SPL_MAX_FOOTPRINT		0x10000
310 #define CONFIG_SPL_MAX_SIZE			0x10000
311 #if defined(CONFIG_ARCH_UNIPHIER_LD11)
312 #define CONFIG_SPL_BSS_START_ADDR		0x30012000
313 #elif defined(CONFIG_ARCH_UNIPHIER_LD20)
314 #define CONFIG_SPL_BSS_START_ADDR		0x30016000
315 #endif
316 #define CONFIG_SPL_BSS_MAX_SIZE			0x2000
317 
318 #endif /* __CONFIG_UNIPHIER_COMMON_H__ */
319