1 /* 2 * Copyright (C) 2012-2015 Masahiro Yamada <yamada.masahiro@socionext.com> 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 /* U-Boot - Common settings for UniPhier Family */ 8 9 #ifndef __CONFIG_UNIPHIER_COMMON_H__ 10 #define __CONFIG_UNIPHIER_COMMON_H__ 11 12 #define CONFIG_I2C_EEPROM 13 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 14 15 #define CONFIG_SMC911X 16 17 /* dummy: referenced by examples/standalone/smc911x_eeprom.c */ 18 #define CONFIG_SMC911X_BASE 0 19 #define CONFIG_SMC911X_32_BIT 20 21 /*----------------------------------------------------------------------- 22 * MMU and Cache Setting 23 *----------------------------------------------------------------------*/ 24 25 /* Comment out the following to enable L1 cache */ 26 /* #define CONFIG_SYS_ICACHE_OFF */ 27 /* #define CONFIG_SYS_DCACHE_OFF */ 28 29 #define CONFIG_SYS_CACHELINE_SIZE 32 30 31 /* Comment out the following to disable L2 cache */ 32 #define CONFIG_UNIPHIER_L2CACHE_ON 33 34 #define CONFIG_DISPLAY_CPUINFO 35 #define CONFIG_DISPLAY_BOARDINFO 36 #define CONFIG_MISC_INIT_F 37 #define CONFIG_BOARD_EARLY_INIT_F 38 #define CONFIG_BOARD_EARLY_INIT_R 39 #define CONFIG_BOARD_LATE_INIT 40 41 #define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024) 42 43 #define CONFIG_TIMESTAMP 44 45 /* FLASH related */ 46 #define CONFIG_MTD_DEVICE 47 48 /* 49 * uncomment the following to disable FLASH related code. 50 */ 51 /* #define CONFIG_SYS_NO_FLASH */ 52 53 #define CONFIG_FLASH_CFI_DRIVER 54 #define CONFIG_SYS_FLASH_CFI 55 56 #define CONFIG_SYS_MAX_FLASH_SECT 256 57 #define CONFIG_SYS_MONITOR_BASE 0 58 #define CONFIG_SYS_MONITOR_LEN 0x00080000 /* 512KB */ 59 #define CONFIG_SYS_FLASH_BASE 0 60 61 /* 62 * flash_toggle does not work for out supoort card. 63 * We need to use flash_status_poll. 64 */ 65 #define CONFIG_SYS_CFI_FLASH_STATUS_POLL 66 67 #define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ 68 69 #define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1 70 71 /* serial console configuration */ 72 #define CONFIG_BAUDRATE 115200 73 74 75 #if !defined(CONFIG_SPL_BUILD) 76 #define CONFIG_USE_ARCH_MEMSET 77 #define CONFIG_USE_ARCH_MEMCPY 78 #endif 79 80 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 81 82 #define CONFIG_CMDLINE_EDITING /* add command line history */ 83 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ 84 /* Print Buffer Size */ 85 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 86 #define CONFIG_SYS_MAXARGS 16 /* max number of command */ 87 /* Boot Argument Buffer Size */ 88 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) 89 90 #define CONFIG_CONS_INDEX 1 91 92 /* #define CONFIG_ENV_IS_NOWHERE */ 93 /* #define CONFIG_ENV_IS_IN_NAND */ 94 #define CONFIG_ENV_IS_IN_MMC 95 #define CONFIG_ENV_OFFSET 0x80000 96 #define CONFIG_ENV_SIZE 0x2000 97 /* #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) */ 98 99 #define CONFIG_SYS_MMC_ENV_DEV 0 100 #define CONFIG_SYS_MMC_ENV_PART 1 101 102 /* Time clock 1MHz */ 103 #define CONFIG_SYS_TIMER_RATE 1000000 104 105 #define CONFIG_SYS_MAX_NAND_DEVICE 1 106 #define CONFIG_SYS_NAND_MAX_CHIPS 2 107 #define CONFIG_SYS_NAND_ONFI_DETECTION 108 109 #define CONFIG_NAND_DENALI_ECC_SIZE 1024 110 111 #ifdef CONFIG_ARCH_UNIPHIER_SLD3 112 #define CONFIG_SYS_NAND_REGS_BASE 0xf8100000 113 #define CONFIG_SYS_NAND_DATA_BASE 0xf8000000 114 #else 115 #define CONFIG_SYS_NAND_REGS_BASE 0x68100000 116 #define CONFIG_SYS_NAND_DATA_BASE 0x68000000 117 #endif 118 119 #define CONFIG_SYS_NAND_BASE (CONFIG_SYS_NAND_DATA_BASE + 0x10) 120 121 #define CONFIG_SYS_NAND_USE_FLASH_BBT 122 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 123 124 /* USB */ 125 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 126 #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 4 127 #define CONFIG_CMD_FAT 128 #define CONFIG_FAT_WRITE 129 #define CONFIG_DOS_PARTITION 130 131 /* SD/MMC */ 132 #define CONFIG_CMD_MMC 133 #define CONFIG_SUPPORT_EMMC_BOOT 134 #define CONFIG_GENERIC_MMC 135 136 /* memtest works on */ 137 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE 138 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x01000000) 139 140 #define CONFIG_BOOTDELAY 3 141 #define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */ 142 143 /* 144 * Network Configuration 145 */ 146 #define CONFIG_SERVERIP 192.168.11.1 147 #define CONFIG_IPADDR 192.168.11.10 148 #define CONFIG_GATEWAYIP 192.168.11.1 149 #define CONFIG_NETMASK 255.255.255.0 150 151 #define CONFIG_LOADADDR 0x84000000 152 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 153 154 #define CONFIG_CMDLINE_EDITING /* add command line history */ 155 156 #define CONFIG_BOOTCOMMAND "run $bootmode" 157 158 #define CONFIG_ROOTPATH "/nfs/root/path" 159 #define CONFIG_NFSBOOTCOMMAND \ 160 "setenv bootargs $bootargs root=/dev/nfs rw " \ 161 "nfsroot=$serverip:$rootpath " \ 162 "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off;" \ 163 "run __nfsboot" 164 165 #ifdef CONFIG_FIT 166 #define CONFIG_BOOTFILE "fitImage" 167 #define LINUXBOOT_ENV_SETTINGS \ 168 "fit_addr=0x00100000\0" \ 169 "fit_addr_r=0x84100000\0" \ 170 "fit_size=0x00f00000\0" \ 171 "norboot=setexpr fit_addr $nor_base + $fit_addr &&" \ 172 "bootm $fit_addr\0" \ 173 "nandboot=nand read $fit_addr_r $fit_addr $fit_size &&" \ 174 "bootm $fit_addr_r\0" \ 175 "tftpboot=tftpboot $fit_addr_r $bootfile &&" \ 176 "bootm $fit_addr_r\0" \ 177 "__nfsboot=run tftpboot\0" 178 #else 179 #define CONFIG_CMD_BOOTZ 180 #define CONFIG_BOOTFILE "zImage" 181 #define LINUXBOOT_ENV_SETTINGS \ 182 "fdt_addr=0x00100000\0" \ 183 "fdt_addr_r=0x84100000\0" \ 184 "fdt_size=0x00008000\0" \ 185 "kernel_addr=0x00200000\0" \ 186 "kernel_addr_r=0x80208000\0" \ 187 "kernel_size=0x00800000\0" \ 188 "ramdisk_addr=0x00a00000\0" \ 189 "ramdisk_addr_r=0x84a00000\0" \ 190 "ramdisk_size=0x00600000\0" \ 191 "ramdisk_file=rootfs.cpio.uboot\0" \ 192 "boot_common=setexpr bootm_low $kernel_addr_r '&' fe000000 &&" \ 193 "bootz $kernel_addr_r $ramdisk_addr_r $fdt_addr_r\0" \ 194 "norboot=setexpr kernel_addr $nor_base + $kernel_addr &&" \ 195 "cp.b $kernel_addr $kernel_addr_r $kernel_size &&" \ 196 "setexpr ramdisk_addr_r $nor_base + $ramdisk_addr &&" \ 197 "setexpr fdt_addr_r $nor_base + $fdt_addr &&" \ 198 "run boot_common\0" \ 199 "nandboot=nand read $kernel_addr_r $kernel_addr $kernel_size &&" \ 200 "nand read $ramdisk_addr_r $ramdisk_addr $ramdisk_size &&" \ 201 "nand read $fdt_addr_r $fdt_addr $fdt_size &&" \ 202 "run boot_common\0" \ 203 "tftpboot=tftpboot $kernel_addr_r $bootfile &&" \ 204 "tftpboot $ramdisk_addr_r $ramdisk_file &&" \ 205 "tftpboot $fdt_addr_r $fdt_file &&" \ 206 "run boot_common\0" \ 207 "__nfsboot=tftpboot $kernel_addr_r $bootfile &&" \ 208 "tftpboot $fdt_addr_r $fdt_file &&" \ 209 "tftpboot $fdt_addr_r $fdt_file &&" \ 210 "setenv ramdisk_addr_r - &&" \ 211 "run boot_common\0" 212 #endif 213 214 #define CONFIG_EXTRA_ENV_SETTINGS \ 215 "netdev=eth0\0" \ 216 "verify=n\0" \ 217 "nor_base=0x42000000\0" \ 218 "sramupdate=setexpr tmp_addr $nor_base + 0x50000 &&" \ 219 "tftpboot $tmp_addr u-boot-spl.bin &&" \ 220 "setexpr tmp_addr $nor_base + 0x60000 &&" \ 221 "tftpboot $tmp_addr u-boot.bin\0" \ 222 "emmcupdate=mmcsetn &&" \ 223 "mmc partconf $mmc_first_dev 0 1 1 &&" \ 224 "mmc erase 0 800 &&" \ 225 "tftpboot u-boot-spl.bin &&" \ 226 "mmc write $loadaddr 0 80 &&" \ 227 "tftpboot u-boot.bin &&" \ 228 "mmc write $loadaddr 80 780\0" \ 229 "nandupdate=nand erase 0 0x00100000 &&" \ 230 "tftpboot u-boot-spl.bin &&" \ 231 "nand write $loadaddr 0 0x00010000 &&" \ 232 "tftpboot u-boot.bin &&" \ 233 "nand write $loadaddr 0x00010000 0x000f0000\0" \ 234 LINUXBOOT_ENV_SETTINGS 235 236 #define CONFIG_SYS_BOOTMAPSZ 0x20000000 237 238 #define CONFIG_SYS_SDRAM_BASE 0x80000000 239 #define CONFIG_NR_DRAM_BANKS 2 240 241 #if defined(CONFIG_ARCH_UNIPHIER_SLD3) || defined(CONFIG_ARCH_UNIPHIER_LD4) || \ 242 defined(CONFIG_ARCH_UNIPHIER_SLD8) 243 #define CONFIG_SPL_TEXT_BASE 0x00040000 244 #else 245 #define CONFIG_SPL_TEXT_BASE 0x00100000 246 #endif 247 248 #define CONFIG_SPL_STACK (0x00100000) 249 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE) 250 251 #define CONFIG_PANIC_HANG 252 253 #define CONFIG_SPL_FRAMEWORK 254 #define CONFIG_SPL_SERIAL_SUPPORT 255 #define CONFIG_SPL_NOR_SUPPORT 256 #define CONFIG_SPL_NAND_SUPPORT 257 #define CONFIG_SPL_MMC_SUPPORT 258 259 #define CONFIG_SPL_LIBCOMMON_SUPPORT /* for mem_malloc_init */ 260 #define CONFIG_SPL_LIBGENERIC_SUPPORT 261 262 #define CONFIG_SPL_BOARD_INIT 263 264 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x10000 265 266 /* subtract sizeof(struct image_header) */ 267 #define CONFIG_SYS_UBOOT_BASE (0x60000 - 0x40) 268 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x80 269 270 #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" 271 #define CONFIG_SPL_MAX_FOOTPRINT 0x10000 272 #define CONFIG_SPL_MAX_SIZE 0x10000 273 274 #endif /* __CONFIG_UNIPHIER_COMMON_H__ */ 275