1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Copyright (C) 2012-2015 Panasonic Corporation 4 * Copyright (C) 2015-2016 Socionext Inc. 5 * Author: Masahiro Yamada <yamada.masahiro@socionext.com> 6 */ 7 8 /* U-Boot - Common settings for UniPhier Family */ 9 10 #ifndef __CONFIG_UNIPHIER_COMMON_H__ 11 #define __CONFIG_UNIPHIER_COMMON_H__ 12 13 #define CONFIG_ARMV7_PSCI_1_0 14 15 /*----------------------------------------------------------------------- 16 * MMU and Cache Setting 17 *----------------------------------------------------------------------*/ 18 19 /* Comment out the following to enable L1 cache */ 20 /* #define CONFIG_SYS_ICACHE_OFF */ 21 /* #define CONFIG_SYS_DCACHE_OFF */ 22 23 #define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024) 24 25 #define CONFIG_TIMESTAMP 26 27 /* FLASH related */ 28 #define CONFIG_MTD_DEVICE 29 30 #define CONFIG_FLASH_CFI_DRIVER 31 #define CONFIG_SYS_FLASH_CFI 32 33 #define CONFIG_SYS_MAX_FLASH_SECT 256 34 #define CONFIG_SYS_MONITOR_BASE 0 35 #define CONFIG_SYS_MONITOR_LEN 0x00090000 /* 576KB */ 36 #define CONFIG_SYS_FLASH_BASE 0 37 38 /* 39 * flash_toggle does not work for our support card. 40 * We need to use flash_status_poll. 41 */ 42 #define CONFIG_SYS_CFI_FLASH_STATUS_POLL 43 44 #define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ 45 46 #define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1 47 48 /* serial console configuration */ 49 50 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ 51 /* Boot Argument Buffer Size */ 52 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) 53 54 #define CONFIG_ENV_OFFSET 0x100000 55 #define CONFIG_ENV_SIZE 0x2000 56 /* #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) */ 57 58 #define CONFIG_SYS_MMC_ENV_DEV 0 59 #define CONFIG_SYS_MMC_ENV_PART 1 60 61 #if !defined(CONFIG_ARM64) 62 /* Time clock 1MHz */ 63 #define CONFIG_SYS_TIMER_RATE 1000000 64 #endif 65 66 #define CONFIG_SYS_MAX_NAND_DEVICE 1 67 #define CONFIG_SYS_NAND_ONFI_DETECTION 68 #define CONFIG_SYS_NAND_REGS_BASE 0x68100000 69 #define CONFIG_SYS_NAND_DATA_BASE 0x68000000 70 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 71 72 /* SD/MMC */ 73 #define CONFIG_SUPPORT_EMMC_BOOT 74 75 /* memtest works on */ 76 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE 77 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x01000000) 78 79 /* 80 * Network Configuration 81 */ 82 #define CONFIG_SERVERIP 192.168.11.1 83 #define CONFIG_IPADDR 192.168.11.10 84 #define CONFIG_GATEWAYIP 192.168.11.1 85 #define CONFIG_NETMASK 255.255.255.0 86 87 #define CONFIG_LOADADDR 0x85000000 88 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 89 #define CONFIG_SYS_BOOTM_LEN (32 << 20) 90 91 #if defined(CONFIG_ARM64) 92 /* ARM Trusted Firmware */ 93 #define BOOT_IMAGES \ 94 "second_image=unph_bl.bin\0" \ 95 "third_image=fip.bin\0" 96 #else 97 #define BOOT_IMAGES \ 98 "second_image=u-boot-spl.bin\0" \ 99 "third_image=u-boot.bin\0" 100 #endif 101 102 #define CONFIG_BOOTCOMMAND "run $bootmode" 103 104 #define CONFIG_ROOTPATH "/nfs/root/path" 105 #define CONFIG_NFSBOOTCOMMAND \ 106 "setenv bootargs $bootargs root=/dev/nfs rw " \ 107 "nfsroot=$serverip:$rootpath " \ 108 "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off;" \ 109 "run __nfsboot" 110 111 #ifdef CONFIG_FIT 112 #define CONFIG_BOOTFILE "fitImage" 113 #define LINUXBOOT_ENV_SETTINGS \ 114 "fit_addr=0x00100000\0" \ 115 "fit_addr_r=0x85100000\0" \ 116 "fit_size=0x00f00000\0" \ 117 "norboot=setexpr fit_addr $nor_base + $fit_addr &&" \ 118 "bootm $fit_addr\0" \ 119 "nandboot=nand read $fit_addr_r $fit_addr $fit_size &&" \ 120 "bootm $fit_addr_r\0" \ 121 "tftpboot=tftpboot $fit_addr_r $bootfile &&" \ 122 "bootm $fit_addr_r\0" \ 123 "__nfsboot=run tftpboot\0" 124 #else 125 #ifdef CONFIG_ARM64 126 #define CONFIG_BOOTFILE "Image.gz" 127 #define LINUXBOOT_CMD "booti" 128 #define KERNEL_ADDR_LOAD "kernel_addr_load=0x85200000\0" 129 #define KERNEL_ADDR_R "kernel_addr_r=0x82080000\0" 130 #else 131 #define CONFIG_BOOTFILE "zImage" 132 #define LINUXBOOT_CMD "bootz" 133 #define KERNEL_ADDR_LOAD "kernel_addr_load=0x80208000\0" 134 #define KERNEL_ADDR_R "kernel_addr_r=0x80208000\0" 135 #endif 136 #define LINUXBOOT_ENV_SETTINGS \ 137 "fdt_addr=0x00100000\0" \ 138 "fdt_addr_r=0x85100000\0" \ 139 "fdt_size=0x00008000\0" \ 140 "kernel_addr=0x00200000\0" \ 141 KERNEL_ADDR_LOAD \ 142 KERNEL_ADDR_R \ 143 "kernel_size=0x00e00000\0" \ 144 "ramdisk_addr=0x01000000\0" \ 145 "ramdisk_addr_r=0x86000000\0" \ 146 "ramdisk_size=0x00800000\0" \ 147 "ramdisk_file=rootfs.cpio.uboot\0" \ 148 "boot_common=setexpr bootm_low $kernel_addr_r '&' fe000000 && " \ 149 "if test $kernel_addr_load = $kernel_addr_r; then " \ 150 "true; " \ 151 "else " \ 152 "unzip $kernel_addr_load $kernel_addr_r; " \ 153 "fi && " \ 154 LINUXBOOT_CMD " $kernel_addr_r $ramdisk_addr_r $fdt_addr_r\0" \ 155 "norboot=setexpr kernel_addr_nor $nor_base + $kernel_addr && " \ 156 "setexpr kernel_size_div4 $kernel_size / 4 && " \ 157 "cp $kernel_addr_nor $kernel_addr_load $kernel_size_div4 && " \ 158 "setexpr ramdisk_addr_nor $nor_base + $ramdisk_addr && " \ 159 "setexpr ramdisk_size_div4 $ramdisk_size / 4 && " \ 160 "cp $ramdisk_addr_nor $ramdisk_addr_r $ramdisk_size_div4 && " \ 161 "setexpr fdt_addr_nor $nor_base + $fdt_addr && " \ 162 "setexpr fdt_size_div4 $fdt_size / 4 && " \ 163 "cp $fdt_addr_nor $fdt_addr_r $fdt_size_div4 && " \ 164 "run boot_common\0" \ 165 "nandboot=nand read $kernel_addr_load $kernel_addr $kernel_size && " \ 166 "nand read $ramdisk_addr_r $ramdisk_addr $ramdisk_size &&" \ 167 "nand read $fdt_addr_r $fdt_addr $fdt_size &&" \ 168 "run boot_common\0" \ 169 "tftpboot=tftpboot $kernel_addr_load $bootfile && " \ 170 "tftpboot $ramdisk_addr_r $ramdisk_file &&" \ 171 "tftpboot $fdt_addr_r $fdt_file &&" \ 172 "run boot_common\0" \ 173 "__nfsboot=tftpboot $kernel_addr_load $bootfile && " \ 174 "tftpboot $fdt_addr_r $fdt_file &&" \ 175 "setenv ramdisk_addr_r - &&" \ 176 "run boot_common\0" 177 #endif 178 179 #define CONFIG_EXTRA_ENV_SETTINGS \ 180 "netdev=eth0\0" \ 181 "initrd_high=0xffffffffffffffff\0" \ 182 "nor_base=0x42000000\0" \ 183 "sramupdate=setexpr tmp_addr $nor_base + 0x50000 &&" \ 184 "tftpboot $tmp_addr $second_image && " \ 185 "setexpr tmp_addr $nor_base + 0x70000 && " \ 186 "tftpboot $tmp_addr $third_image\0" \ 187 "emmcupdate=mmcsetn &&" \ 188 "mmc dev $mmc_first_dev &&" \ 189 "mmc partconf $mmc_first_dev 0 1 1 &&" \ 190 "tftpboot $second_image && " \ 191 "mmc write $loadaddr 0 100 && " \ 192 "tftpboot $third_image && " \ 193 "mmc write $loadaddr 100 f00\0" \ 194 "nandupdate=nand erase 0 0x00100000 &&" \ 195 "tftpboot $second_image && " \ 196 "nand write $loadaddr 0 0x00020000 && " \ 197 "tftpboot $third_image && " \ 198 "nand write $loadaddr 0x00020000 0x001e0000\0" \ 199 "usbupdate=usb start &&" \ 200 "tftpboot $second_image && " \ 201 "usb write $loadaddr 0 100 && " \ 202 "tftpboot $third_image && " \ 203 "usb write $loadaddr 100 f00\0" \ 204 BOOT_IMAGES \ 205 LINUXBOOT_ENV_SETTINGS 206 207 #define CONFIG_SYS_BOOTMAPSZ 0x20000000 208 209 #define CONFIG_SYS_SDRAM_BASE 0x80000000 210 #define CONFIG_NR_DRAM_BANKS 3 211 212 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE) 213 214 /* only for SPL */ 215 #if defined(CONFIG_ARCH_UNIPHIER_LD4) || \ 216 defined(CONFIG_ARCH_UNIPHIER_SLD8) 217 #define CONFIG_SPL_TEXT_BASE 0x00040000 218 #else 219 #define CONFIG_SPL_TEXT_BASE 0x00100000 220 #endif 221 222 #define CONFIG_SPL_STACK (0x00200000) 223 224 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000 225 226 /* subtract sizeof(struct image_header) */ 227 #define CONFIG_SYS_UBOOT_BASE (0x70000 - 0x40) 228 229 #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" 230 #define CONFIG_SPL_MAX_FOOTPRINT 0x10000 231 #define CONFIG_SPL_MAX_SIZE 0x10000 232 #define CONFIG_SPL_BSS_MAX_SIZE 0x2000 233 234 #define CONFIG_SPL_PAD_TO 0x20000 235 236 #endif /* __CONFIG_UNIPHIER_COMMON_H__ */ 237