1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Copyright (C) 2012-2015 Panasonic Corporation 4 * Copyright (C) 2015-2016 Socionext Inc. 5 * Author: Masahiro Yamada <yamada.masahiro@socionext.com> 6 */ 7 8 /* U-Boot - Common settings for UniPhier Family */ 9 10 #ifndef __CONFIG_UNIPHIER_COMMON_H__ 11 #define __CONFIG_UNIPHIER_COMMON_H__ 12 13 #ifndef CONFIG_SPL_BUILD 14 #include <config_distro_bootcmd.h> 15 16 #ifdef CONFIG_CMD_MMC 17 #define BOOT_TARGET_DEVICE_MMC(func) func(MMC, mmc, 0) func(MMC, mmc, 1) 18 #else 19 #define BOOT_TARGET_DEVICE_MMC(func) 20 #endif 21 22 #ifdef CONFIG_CMD_UBIFS 23 #define BOOT_TARGET_DEVICE_UBIFS(func) func(UBIFS, ubifs, 0) 24 #else 25 #define BOOT_TARGET_DEVICE_UBIFS(func) 26 #endif 27 28 #ifdef CONFIG_CMD_USB 29 #define BOOT_TARGET_DEVICE_USB(func) func(USB, usb, 0) 30 #else 31 #define BOOT_TARGET_DEVICE_USB(func) 32 #endif 33 34 #define BOOT_TARGET_DEVICES(func) \ 35 BOOT_TARGET_DEVICE_MMC(func) \ 36 BOOT_TARGET_DEVICE_UBIFS(func) \ 37 BOOT_TARGET_DEVICE_USB(func) 38 #else 39 #define BOOTENV 40 #endif 41 42 #define CONFIG_ARMV7_PSCI_1_0 43 44 /*----------------------------------------------------------------------- 45 * MMU and Cache Setting 46 *----------------------------------------------------------------------*/ 47 48 /* Comment out the following to enable L1 cache */ 49 /* #define CONFIG_SYS_ICACHE_OFF */ 50 /* #define CONFIG_SYS_DCACHE_OFF */ 51 52 #define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024) 53 54 #define CONFIG_TIMESTAMP 55 56 /* FLASH related */ 57 58 #define CONFIG_SYS_MAX_FLASH_SECT 256 59 #define CONFIG_SYS_MONITOR_BASE 0 60 #define CONFIG_SYS_MONITOR_LEN 0x000d0000 /* 832KB */ 61 #define CONFIG_SYS_FLASH_BASE 0 62 63 /* 64 * flash_toggle does not work for our support card. 65 * We need to use flash_status_poll. 66 */ 67 #define CONFIG_SYS_CFI_FLASH_STATUS_POLL 68 69 #define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ 70 71 #define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1 72 73 /* serial console configuration */ 74 75 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ 76 /* Boot Argument Buffer Size */ 77 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) 78 79 #define CONFIG_ENV_OFFSET 0x100000 80 #define CONFIG_ENV_SIZE 0x2000 81 /* #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) */ 82 83 #define CONFIG_SYS_MMC_ENV_DEV 0 84 #define CONFIG_SYS_MMC_ENV_PART 1 85 86 #if !defined(CONFIG_ARM64) 87 /* Time clock 1MHz */ 88 #define CONFIG_SYS_TIMER_RATE 1000000 89 #endif 90 91 #define CONFIG_SYS_MAX_NAND_DEVICE 1 92 #define CONFIG_SYS_NAND_ONFI_DETECTION 93 #define CONFIG_SYS_NAND_REGS_BASE 0x68100000 94 #define CONFIG_SYS_NAND_DATA_BASE 0x68000000 95 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 96 97 /* SD/MMC */ 98 #define CONFIG_SUPPORT_EMMC_BOOT 99 100 /* memtest works on */ 101 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE 102 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x01000000) 103 104 /* 105 * Network Configuration 106 */ 107 #define CONFIG_SERVERIP 192.168.11.1 108 #define CONFIG_IPADDR 192.168.11.10 109 #define CONFIG_GATEWAYIP 192.168.11.1 110 #define CONFIG_NETMASK 255.255.255.0 111 112 #define CONFIG_LOADADDR 0x85000000 113 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 114 #define CONFIG_SYS_BOOTM_LEN (32 << 20) 115 116 #if defined(CONFIG_ARM64) 117 /* ARM Trusted Firmware */ 118 #define BOOT_IMAGES \ 119 "second_image=unph_bl.bin\0" \ 120 "third_image=fip.bin\0" 121 #else 122 #define BOOT_IMAGES \ 123 "second_image=u-boot-spl.bin\0" \ 124 "third_image=u-boot.bin\0" 125 #endif 126 127 #define CONFIG_ROOTPATH "/nfs/root/path" 128 #define CONFIG_NFSBOOTCOMMAND \ 129 "setenv bootargs $bootargs root=/dev/nfs rw " \ 130 "nfsroot=$serverip:$rootpath " \ 131 "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off;" \ 132 "run __nfsboot" 133 134 #ifdef CONFIG_FIT 135 #define CONFIG_BOOTFILE "fitImage" 136 #define LINUXBOOT_ENV_SETTINGS \ 137 "kernel_addr_r=0x85100000\0" \ 138 "tftpboot=tftpboot $kernel_addr_r $bootfile &&" \ 139 "bootm $kernel_addr_r\0" \ 140 "__nfsboot=run tftpboot\0" 141 #else 142 #ifdef CONFIG_ARM64 143 #define CONFIG_BOOTFILE "Image" 144 #define LINUXBOOT_CMD "booti" 145 #define KERNEL_ADDR_R "kernel_addr_r=0x82080000\0" 146 #else 147 #define CONFIG_BOOTFILE "zImage" 148 #define LINUXBOOT_CMD "bootz" 149 #define KERNEL_ADDR_R "kernel_addr_r=0x80208000\0" 150 #endif 151 #define LINUXBOOT_ENV_SETTINGS \ 152 "fdt_addr_r=0x85100000\0" \ 153 KERNEL_ADDR_R \ 154 "ramdisk_addr_r=0x86000000\0" \ 155 "ramdisk_file=rootfs.cpio.gz\0" \ 156 "boot_common=setexpr bootm_low $kernel_addr_r '&' fe000000 && " \ 157 LINUXBOOT_CMD " $kernel_addr_r $ramdisk_addr_r $fdt_addr_r\0" \ 158 "tftpboot=tftpboot $kernel_addr_r $bootfile && " \ 159 "tftpboot $fdt_addr_r $fdtfile &&" \ 160 "tftpboot $ramdisk_addr_r $ramdisk_file &&" \ 161 "setenv ramdisk_addr_r $ramdisk_addr_r:$filesize &&" \ 162 "run boot_common\0" \ 163 "__nfsboot=tftpboot $kernel_addr_load $bootfile && " \ 164 "tftpboot $fdt_addr_r $fdtfile &&" \ 165 "setenv ramdisk_addr_r - &&" \ 166 "run boot_common\0" 167 #endif 168 169 #define CONFIG_EXTRA_ENV_SETTINGS \ 170 "netdev=eth0\0" \ 171 "initrd_high=0xffffffffffffffff\0" \ 172 "script=boot.scr\0" \ 173 "scriptaddr=0x85000000\0" \ 174 "nor_base=0x42000000\0" \ 175 "emmcboot=mmcsetn && run bootcmd_mmc${mmc_first_dev}\0" \ 176 "nandboot=run bootcmd_ubifs0\0" \ 177 "norboot=run tftpboot\0" \ 178 "usbboot=run bootcmd_usb0\0" \ 179 "emmcscript=setenv devtype mmc && " \ 180 "mmcsetn && " \ 181 "setenv devnum ${mmc_first_dev} && " \ 182 "run loadscript_fat\0" \ 183 "nandscript=echo Running ${script} from ubi ... && " \ 184 "ubi part UBI && " \ 185 "ubifsmount ubi0:boot && " \ 186 "ubifsload ${loadaddr} ${script} && " \ 187 "source\0" \ 188 "norscript=echo Running ${script} from tftp ... && " \ 189 "tftpboot ${script} &&" \ 190 "source\0" \ 191 "usbscript=usb start && " \ 192 "setenv devtype usb && " \ 193 "setenv devnum 0 && " \ 194 "run loadscript_fat\0" \ 195 "loadscript_fat=echo Running ${script} from ${devtype}${devnum} ... && " \ 196 "load ${devtype} ${devnum}:1 ${loadaddr} ${script} && " \ 197 "source\0" \ 198 "sramupdate=setexpr tmp_addr $nor_base + 0x50000 &&" \ 199 "tftpboot $tmp_addr $second_image && " \ 200 "setexpr tmp_addr $nor_base + 0x70000 && " \ 201 "tftpboot $tmp_addr $third_image\0" \ 202 "emmcupdate=mmcsetn &&" \ 203 "mmc dev $mmc_first_dev &&" \ 204 "mmc partconf $mmc_first_dev 0 1 1 &&" \ 205 "tftpboot $second_image && " \ 206 "mmc write $loadaddr 0 100 && " \ 207 "tftpboot $third_image && " \ 208 "mmc write $loadaddr 100 f00\0" \ 209 "nandupdate=nand erase 0 0x00100000 &&" \ 210 "tftpboot $second_image && " \ 211 "nand write $loadaddr 0 0x00020000 && " \ 212 "tftpboot $third_image && " \ 213 "nand write $loadaddr 0x00020000 0x001e0000\0" \ 214 "usbupdate=usb start &&" \ 215 "tftpboot $second_image && " \ 216 "usb write $loadaddr 0 100 && " \ 217 "tftpboot $third_image && " \ 218 "usb write $loadaddr 100 f00\0" \ 219 BOOT_IMAGES \ 220 LINUXBOOT_ENV_SETTINGS \ 221 BOOTENV 222 223 #define CONFIG_SYS_BOOTMAPSZ 0x20000000 224 225 #define CONFIG_SYS_SDRAM_BASE 0x80000000 226 227 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE) 228 229 /* only for SPL */ 230 #if defined(CONFIG_ARCH_UNIPHIER_LD4) || \ 231 defined(CONFIG_ARCH_UNIPHIER_SLD8) 232 #define CONFIG_SPL_TEXT_BASE 0x00040000 233 #else 234 #define CONFIG_SPL_TEXT_BASE 0x00100000 235 #endif 236 237 #define CONFIG_SPL_STACK (0x00200000) 238 239 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000 240 241 /* subtract sizeof(struct image_header) */ 242 #define CONFIG_SYS_UBOOT_BASE (0x130000 - 0x40) 243 244 #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" 245 #define CONFIG_SPL_MAX_FOOTPRINT 0x10000 246 #define CONFIG_SPL_MAX_SIZE 0x10000 247 #define CONFIG_SPL_BSS_MAX_SIZE 0x2000 248 249 #define CONFIG_SPL_PAD_TO 0x20000 250 251 #endif /* __CONFIG_UNIPHIER_COMMON_H__ */ 252