xref: /openbmc/u-boot/include/configs/uniphier.h (revision 1a5a05da)
1 /*
2  * Copyright (C) 2012-2015 Panasonic Corporation
3  * Copyright (C) 2015-2016 Socionext Inc.
4  *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
5  *
6  * SPDX-License-Identifier:	GPL-2.0+
7  */
8 
9 /* U-Boot - Common settings for UniPhier Family */
10 
11 #ifndef __CONFIG_UNIPHIER_COMMON_H__
12 #define __CONFIG_UNIPHIER_COMMON_H__
13 
14 #define CONFIG_ARMV7_PSCI_1_0
15 
16 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS  10
17 
18 /*-----------------------------------------------------------------------
19  * MMU and Cache Setting
20  *----------------------------------------------------------------------*/
21 
22 /* Comment out the following to enable L1 cache */
23 /* #define CONFIG_SYS_ICACHE_OFF */
24 /* #define CONFIG_SYS_DCACHE_OFF */
25 
26 #define CONFIG_SYS_MALLOC_LEN		(4 * 1024 * 1024)
27 
28 #define CONFIG_TIMESTAMP
29 
30 /* FLASH related */
31 #define CONFIG_MTD_DEVICE
32 
33 #define CONFIG_SMC911X_32_BIT
34 /* dummy: referenced by examples/standalone/smc911x_eeprom.c */
35 #define CONFIG_SMC911X_BASE	0
36 
37 #ifdef CONFIG_MICRO_SUPPORT_CARD
38 #define CONFIG_SMC911X
39 #else
40 #define CONFIG_SYS_NO_FLASH
41 #endif
42 
43 #define CONFIG_FLASH_CFI_DRIVER
44 #define CONFIG_SYS_FLASH_CFI
45 
46 #define CONFIG_SYS_MAX_FLASH_SECT	256
47 #define CONFIG_SYS_MONITOR_BASE		0
48 #define CONFIG_SYS_MONITOR_LEN		0x00080000	/* 512KB */
49 #define CONFIG_SYS_FLASH_BASE		0
50 
51 /*
52  * flash_toggle does not work for our support card.
53  * We need to use flash_status_poll.
54  */
55 #define CONFIG_SYS_CFI_FLASH_STATUS_POLL
56 
57 #define CONFIG_FLASH_SHOW_PROGRESS	45 /* count down from 45/5: 9..1 */
58 
59 #define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1
60 
61 /* serial console configuration */
62 #define CONFIG_BAUDRATE			115200
63 
64 #define CONFIG_SYS_LONGHELP		/* undef to save memory */
65 
66 #define CONFIG_CMDLINE_EDITING		/* add command line history	*/
67 #define CONFIG_SYS_CBSIZE		1024	/* Console I/O Buffer Size */
68 /* Print Buffer Size */
69 #define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
70 #define CONFIG_SYS_MAXARGS		16	/* max number of command */
71 /* Boot Argument Buffer Size */
72 #define CONFIG_SYS_BARGSIZE		(CONFIG_SYS_CBSIZE)
73 
74 #define CONFIG_CONS_INDEX		1
75 
76 /* #define CONFIG_ENV_IS_NOWHERE */
77 /* #define CONFIG_ENV_IS_IN_NAND */
78 #define CONFIG_ENV_IS_IN_MMC
79 #define CONFIG_ENV_OFFSET			0x100000
80 #define CONFIG_ENV_SIZE				0x2000
81 /* #define CONFIG_ENV_OFFSET_REDUND	(CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) */
82 
83 #define CONFIG_SYS_MMC_ENV_DEV		0
84 #define CONFIG_SYS_MMC_ENV_PART		1
85 
86 #ifdef CONFIG_ARMV8_MULTIENTRY
87 #define CPU_RELEASE_ADDR			0x80000000
88 #define COUNTER_FREQUENCY			50000000
89 #define CONFIG_GICV3
90 #define GICD_BASE				0x5fe00000
91 #if defined(CONFIG_ARCH_UNIPHIER_LD11)
92 #define GICR_BASE				0x5fe40000
93 #elif defined(CONFIG_ARCH_UNIPHIER_LD20)
94 #define GICR_BASE				0x5fe80000
95 #endif
96 #elif !defined(CONFIG_ARM64)
97 /* Time clock 1MHz */
98 #define CONFIG_SYS_TIMER_RATE			1000000
99 #endif
100 
101 #define CONFIG_SYS_MAX_NAND_DEVICE			1
102 #define CONFIG_SYS_NAND_MAX_CHIPS			2
103 #define CONFIG_SYS_NAND_ONFI_DETECTION
104 
105 #define CONFIG_NAND_DENALI_ECC_SIZE			1024
106 
107 #ifdef CONFIG_ARCH_UNIPHIER_SLD3
108 #define CONFIG_SYS_NAND_REGS_BASE			0xf8100000
109 #define CONFIG_SYS_NAND_DATA_BASE			0xf8000000
110 #else
111 #define CONFIG_SYS_NAND_REGS_BASE			0x68100000
112 #define CONFIG_SYS_NAND_DATA_BASE			0x68000000
113 #endif
114 
115 #define CONFIG_SYS_NAND_BASE		(CONFIG_SYS_NAND_DATA_BASE + 0x10)
116 
117 #define CONFIG_SYS_NAND_USE_FLASH_BBT
118 #define CONFIG_SYS_NAND_BAD_BLOCK_POS			0
119 
120 /* USB */
121 #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS	4
122 #define CONFIG_FAT_WRITE
123 
124 /* SD/MMC */
125 #define CONFIG_SUPPORT_EMMC_BOOT
126 
127 /* memtest works on */
128 #define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
129 #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_SDRAM_BASE + 0x01000000)
130 
131 /*
132  * Network Configuration
133  */
134 #define CONFIG_SERVERIP			192.168.11.1
135 #define CONFIG_IPADDR			192.168.11.10
136 #define CONFIG_GATEWAYIP		192.168.11.1
137 #define CONFIG_NETMASK			255.255.255.0
138 
139 #define CONFIG_LOADADDR			0x84000000
140 #define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
141 
142 #define CONFIG_CMDLINE_EDITING		/* add command line history	*/
143 
144 #if defined(CONFIG_ARM64) && !defined(CONFIG_ARMV8_MULTIENTRY)
145 /* ARM Trusted Firmware */
146 #define BOOT_IMAGES \
147 	"second_image=bl1.bin\0" \
148 	"third_image=fip.bin\0"
149 #else
150 #define BOOT_IMAGES \
151 	"second_image=u-boot-spl.bin\0" \
152 	"third_image=u-boot.bin\0"
153 #endif
154 
155 #define CONFIG_BOOTCOMMAND		"run $bootmode"
156 
157 #define CONFIG_ROOTPATH			"/nfs/root/path"
158 #define CONFIG_NFSBOOTCOMMAND						\
159 	"setenv bootargs $bootargs root=/dev/nfs rw "			\
160 	"nfsroot=$serverip:$rootpath "					\
161 	"ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off;" \
162 		"run __nfsboot"
163 
164 #ifdef CONFIG_FIT
165 #define CONFIG_BOOTFILE			"fitImage"
166 #define LINUXBOOT_ENV_SETTINGS \
167 	"fit_addr=0x00100000\0" \
168 	"fit_addr_r=0x84100000\0" \
169 	"fit_size=0x00f00000\0" \
170 	"norboot=setexpr fit_addr $nor_base + $fit_addr &&" \
171 		"bootm $fit_addr\0" \
172 	"nandboot=nand read $fit_addr_r $fit_addr $fit_size &&" \
173 		"bootm $fit_addr_r\0" \
174 	"tftpboot=tftpboot $fit_addr_r $bootfile &&" \
175 		"bootm $fit_addr_r\0" \
176 	"__nfsboot=run tftpboot\0"
177 #else
178 #ifdef CONFIG_ARM64
179 #define CONFIG_BOOTFILE			"Image.gz"
180 #define LINUXBOOT_CMD			"booti"
181 #define KERNEL_ADDR_LOAD		"kernel_addr_load=0x84200000\0"
182 #define KERNEL_ADDR_R			"kernel_addr_r=0x80080000\0"
183 #else
184 #define CONFIG_BOOTFILE			"zImage"
185 #define LINUXBOOT_CMD			"bootz"
186 #define KERNEL_ADDR_LOAD		"kernel_addr_load=0x80208000\0"
187 #define KERNEL_ADDR_R			"kernel_addr_r=0x80208000\0"
188 #endif
189 #define LINUXBOOT_ENV_SETTINGS \
190 	"fdt_addr=0x00100000\0" \
191 	"fdt_addr_r=0x84100000\0" \
192 	"fdt_size=0x00008000\0" \
193 	"kernel_addr=0x00200000\0" \
194 	KERNEL_ADDR_LOAD \
195 	KERNEL_ADDR_R \
196 	"kernel_size=0x00800000\0" \
197 	"ramdisk_addr=0x00a00000\0" \
198 	"ramdisk_addr_r=0x84a00000\0" \
199 	"ramdisk_size=0x00600000\0" \
200 	"ramdisk_file=rootfs.cpio.uboot\0" \
201 	"boot_common=setexpr bootm_low $kernel_addr_r '&' fe000000 && " \
202 		"if test $kernel_addr_load = $kernel_addr_r; then " \
203 			"true; " \
204 		"else " \
205 			"unzip $kernel_addr_load $kernel_addr_r; " \
206 		"fi && " \
207 		LINUXBOOT_CMD " $kernel_addr_r $ramdisk_addr_r $fdt_addr_r\0" \
208 	"norboot=setexpr kernel_addr_nor $nor_base + $kernel_addr && " \
209 		"setexpr kernel_size_div4 $kernel_size / 4 && " \
210 		"cp $kernel_addr_nor $kernel_addr_load $kernel_size_div4 && " \
211 		"setexpr ramdisk_addr_nor $nor_base + $ramdisk_addr && " \
212 		"setexpr ramdisk_size_div4 $ramdisk_size / 4 && " \
213 		"cp $ramdisk_addr_nor $ramdisk_addr_r $ramdisk_size_div4 && " \
214 		"setexpr fdt_addr_nor $nor_base + $fdt_addr && " \
215 		"setexpr fdt_size_div4 $fdt_size / 4 && " \
216 		"cp $fdt_addr_nor $fdt_addr_r $fdt_size_div4 && " \
217 		"run boot_common\0" \
218 	"nandboot=nand read $kernel_addr_load $kernel_addr $kernel_size && " \
219 		"nand read $ramdisk_addr_r $ramdisk_addr $ramdisk_size &&" \
220 		"nand read $fdt_addr_r $fdt_addr $fdt_size &&" \
221 		"run boot_common\0" \
222 	"tftpboot=tftpboot $kernel_addr_load $bootfile && " \
223 		"tftpboot $ramdisk_addr_r $ramdisk_file &&" \
224 		"tftpboot $fdt_addr_r $fdt_file &&" \
225 		"run boot_common\0" \
226 	"__nfsboot=tftpboot $kernel_addr_load $bootfile && " \
227 		"tftpboot $fdt_addr_r $fdt_file &&" \
228 		"setenv ramdisk_addr_r - &&" \
229 		"run boot_common\0"
230 #endif
231 
232 #define	CONFIG_EXTRA_ENV_SETTINGS				\
233 	"netdev=eth0\0"						\
234 	"verify=n\0"						\
235 	"initrd_high=0xffffffffffffffff\0"			\
236 	"nor_base=0x42000000\0"					\
237 	"sramupdate=setexpr tmp_addr $nor_base + 0x50000 &&"	\
238 		"tftpboot $tmp_addr $second_image && " \
239 		"setexpr tmp_addr $nor_base + 0x70000 && " \
240 		"tftpboot $tmp_addr $third_image\0" \
241 	"emmcupdate=mmcsetn &&"					\
242 		"mmc partconf $mmc_first_dev 0 1 1 &&"		\
243 		"tftpboot $second_image && " \
244 		"mmc write $loadaddr 0 100 && " \
245 		"tftpboot $third_image && " \
246 		"mmc write $loadaddr 100 700\0" \
247 	"nandupdate=nand erase 0 0x00100000 &&"			\
248 		"tftpboot $second_image && " \
249 		"nand write $loadaddr 0 0x00020000 && " \
250 		"tftpboot $third_image && " \
251 		"nand write $loadaddr 0x00020000 0x000e0000\0" \
252 	BOOT_IMAGES \
253 	LINUXBOOT_ENV_SETTINGS
254 
255 #define CONFIG_SYS_BOOTMAPSZ			0x20000000
256 
257 #define CONFIG_SYS_SDRAM_BASE		0x80000000
258 #define CONFIG_NR_DRAM_BANKS		3
259 /* for LD20; the last 64 byte is used for dynamic DDR PHY training */
260 #define CONFIG_SYS_MEM_TOP_HIDE		64
261 
262 #define CONFIG_PANIC_HANG
263 
264 #define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_TEXT_BASE)
265 
266 /* only for SPL */
267 #if defined(CONFIG_ARM64)
268 #define CONFIG_SPL_TEXT_BASE		0x30000000
269 #elif defined(CONFIG_ARCH_UNIPHIER_SLD3) || \
270 	defined(CONFIG_ARCH_UNIPHIER_LD4) || \
271 	defined(CONFIG_ARCH_UNIPHIER_SLD8)
272 #define CONFIG_SPL_TEXT_BASE		0x00040000
273 #else
274 #define CONFIG_SPL_TEXT_BASE		0x00100000
275 #endif
276 
277 #if defined(CONFIG_ARCH_UNIPHIER_LD11)
278 #define CONFIG_SPL_STACK		(0x30014c00)
279 #elif defined(CONFIG_ARCH_UNIPHIER_LD20)
280 #define CONFIG_SPL_STACK		(0x3001c000)
281 #else
282 #define CONFIG_SPL_STACK		(0x00100000)
283 #endif
284 
285 #define CONFIG_SPL_FRAMEWORK
286 #ifdef CONFIG_ARM64
287 #define CONFIG_SPL_BOARD_LOAD_IMAGE
288 #endif
289 
290 #define CONFIG_SPL_BOARD_INIT
291 
292 #define CONFIG_SYS_NAND_U_BOOT_OFFS		0x20000
293 
294 /* subtract sizeof(struct image_header) */
295 #define CONFIG_SYS_UBOOT_BASE			(0x70000 - 0x40)
296 
297 #define CONFIG_SPL_TARGET			"u-boot-with-spl.bin"
298 #define CONFIG_SPL_MAX_FOOTPRINT		0x10000
299 #if defined(CONFIG_ARCH_UNIPHIER_LD20)
300 #define CONFIG_SPL_MAX_SIZE			0x14000
301 #else
302 #define CONFIG_SPL_MAX_SIZE			0x10000
303 #endif
304 #if defined(CONFIG_ARCH_UNIPHIER_LD11)
305 #define CONFIG_SPL_BSS_START_ADDR		0x30012000
306 #elif defined(CONFIG_ARCH_UNIPHIER_LD20)
307 #define CONFIG_SPL_BSS_START_ADDR		0x30016000
308 #endif
309 #define CONFIG_SPL_BSS_MAX_SIZE			0x2000
310 
311 #define CONFIG_SPL_PAD_TO			0x20000
312 
313 #endif /* __CONFIG_UNIPHIER_COMMON_H__ */
314