1 /* 2 * Copyright (C) 2012-2015 Masahiro Yamada <yamada.masahiro@socionext.com> 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 /* U-boot - Common settings for UniPhier Family */ 8 9 #ifndef __CONFIG_UNIPHIER_COMMON_H__ 10 #define __CONFIG_UNIPHIER_COMMON_H__ 11 12 #define CONFIG_I2C_EEPROM 13 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 14 15 #ifdef CONFIG_SYS_NS16550_SERIAL 16 #define CONFIG_SYS_NS16550_COM1 CONFIG_SUPPORT_CARD_UART_BASE 17 #define CONFIG_SYS_NS16550_CLK 12288000 18 #define CONFIG_SYS_NS16550_REG_SIZE -2 19 #endif 20 21 /* TODO: move to Kconfig and device tree */ 22 #if 0 23 #define CONFIG_SYS_NS16550_SERIAL 24 #endif 25 26 #define CONFIG_SMC911X 27 28 /* dummy: referenced by examples/standalone/smc911x_eeprom.c */ 29 #define CONFIG_SMC911X_BASE 0 30 #define CONFIG_SMC911X_32_BIT 31 32 /*----------------------------------------------------------------------- 33 * MMU and Cache Setting 34 *----------------------------------------------------------------------*/ 35 36 /* Comment out the following to enable L1 cache */ 37 /* #define CONFIG_SYS_ICACHE_OFF */ 38 /* #define CONFIG_SYS_DCACHE_OFF */ 39 40 #define CONFIG_SYS_CACHELINE_SIZE 32 41 42 /* Comment out the following to enable L2 cache */ 43 #define CONFIG_UNIPHIER_L2CACHE_ON 44 45 #define CONFIG_DISPLAY_CPUINFO 46 #define CONFIG_DISPLAY_BOARDINFO 47 #define CONFIG_MISC_INIT_F 48 #define CONFIG_BOARD_EARLY_INIT_F 49 #define CONFIG_BOARD_EARLY_INIT_R 50 #define CONFIG_BOARD_LATE_INIT 51 52 #define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024) 53 54 #define CONFIG_TIMESTAMP 55 56 /* FLASH related */ 57 #define CONFIG_MTD_DEVICE 58 59 /* 60 * uncomment the following to disable FLASH related code. 61 */ 62 /* #define CONFIG_SYS_NO_FLASH */ 63 64 #define CONFIG_FLASH_CFI_DRIVER 65 #define CONFIG_SYS_FLASH_CFI 66 67 #define CONFIG_SYS_MAX_FLASH_SECT 256 68 #define CONFIG_SYS_MONITOR_BASE 0 69 #define CONFIG_SYS_FLASH_BASE 0 70 71 /* 72 * flash_toggle does not work for out supoort card. 73 * We need to use flash_status_poll. 74 */ 75 #define CONFIG_SYS_CFI_FLASH_STATUS_POLL 76 77 #define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ 78 79 #define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1 80 81 /* serial console configuration */ 82 #define CONFIG_BAUDRATE 115200 83 84 85 #if !defined(CONFIG_SPL_BUILD) 86 #define CONFIG_USE_ARCH_MEMSET 87 #define CONFIG_USE_ARCH_MEMCPY 88 #endif 89 90 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 91 92 #define CONFIG_CMDLINE_EDITING /* add command line history */ 93 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ 94 /* Print Buffer Size */ 95 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 96 #define CONFIG_SYS_MAXARGS 16 /* max number of command */ 97 /* Boot Argument Buffer Size */ 98 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) 99 100 #define CONFIG_CONS_INDEX 1 101 102 /* 103 * For NAND booting the environment is embedded in the U-Boot image. Please take 104 * look at the file board/amcc/canyonlands/u-boot-nand.lds for details. 105 */ 106 /* #define CONFIG_ENV_IS_IN_NAND */ 107 #define CONFIG_ENV_IS_NOWHERE 108 #define CONFIG_ENV_SIZE 0x2000 109 #define CONFIG_ENV_OFFSET 0x0 110 /* #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) */ 111 112 /* Time clock 1MHz */ 113 #define CONFIG_SYS_TIMER_RATE 1000000 114 115 /* 116 * By default, ARP timeout is 5 sec. 117 * The first ARP request does not seem to work. 118 * So we need to retry ARP request anyway. 119 * We want to shrink the interval until the second ARP request. 120 */ 121 #define CONFIG_ARP_TIMEOUT 500UL /* 0.5 msec */ 122 123 #define CONFIG_SYS_MAX_NAND_DEVICE 1 124 #define CONFIG_SYS_NAND_MAX_CHIPS 2 125 #define CONFIG_SYS_NAND_ONFI_DETECTION 126 127 #define CONFIG_NAND_DENALI_ECC_SIZE 1024 128 129 #ifdef CONFIG_ARCH_UNIPHIER_PH1_SLD3 130 #define CONFIG_SYS_NAND_REGS_BASE 0xf8100000 131 #define CONFIG_SYS_NAND_DATA_BASE 0xf8000000 132 #else 133 #define CONFIG_SYS_NAND_REGS_BASE 0x68100000 134 #define CONFIG_SYS_NAND_DATA_BASE 0x68000000 135 #endif 136 137 #define CONFIG_SYS_NAND_BASE (CONFIG_SYS_NAND_DATA_BASE + 0x10) 138 139 #define CONFIG_SYS_NAND_USE_FLASH_BBT 140 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 141 142 /* USB */ 143 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 144 #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 4 145 #define CONFIG_CMD_FAT 146 #define CONFIG_FAT_WRITE 147 #define CONFIG_DOS_PARTITION 148 149 /* memtest works on */ 150 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE 151 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x01000000) 152 153 #define CONFIG_BOOTDELAY 3 154 #define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */ 155 156 /* 157 * Network Configuration 158 */ 159 #define CONFIG_SERVERIP 192.168.11.1 160 #define CONFIG_IPADDR 192.168.11.10 161 #define CONFIG_GATEWAYIP 192.168.11.1 162 #define CONFIG_NETMASK 255.255.255.0 163 164 #define CONFIG_LOADADDR 0x84000000 165 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 166 167 #define CONFIG_CMDLINE_EDITING /* add command line history */ 168 169 #define CONFIG_BOOTCOMMAND "run $bootmode" 170 171 #define CONFIG_ROOTPATH "/nfs/root/path" 172 #define CONFIG_NFSBOOTCOMMAND \ 173 "setenv bootargs $bootargs root=/dev/nfs rw " \ 174 "nfsroot=$serverip:$rootpath " \ 175 "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off;" \ 176 "tftpboot; bootm;" 177 178 #ifdef CONFIG_FIT 179 #define CONFIG_BOOTFILE "fitImage" 180 #define LINUXBOOT_ENV_SETTINGS \ 181 "fit_addr=0x00100000\0" \ 182 "fit_addr_r=0x84100000\0" \ 183 "fit_size=0x00f00000\0" \ 184 "norboot=setexpr fit_addr $nor_base + $fit_addr &&" \ 185 "bootm $fit_addr\0" \ 186 "nandboot=nand read $fit_addr_r $fit_addr $fit_size &&" \ 187 "bootm $fit_addr_r\0" \ 188 "tftpboot=tftpboot $fit_addr_r $bootfile &&" \ 189 "bootm $fit_addr_r\0" 190 #else 191 #define CONFIG_CMD_BOOTZ 192 #define CONFIG_BOOTFILE "zImage" 193 #define LINUXBOOT_ENV_SETTINGS \ 194 "fdt_addr=0x00100000\0" \ 195 "fdt_addr_r=0x84100000\0" \ 196 "fdt_size=0x00008000\0" \ 197 "kernel_addr=0x00200000\0" \ 198 "kernel_addr_r=0x80208000\0" \ 199 "kernel_size=0x00800000\0" \ 200 "ramdisk_addr=0x00a00000\0" \ 201 "ramdisk_addr_r=0x84a00000\0" \ 202 "ramdisk_size=0x00600000\0" \ 203 "ramdisk_file=rootfs.cpio.uboot\0" \ 204 "norboot=setexpr bootm_low $kernel_addr_r '&' fe000000 &&" \ 205 "setexpr kernel_addr $nor_base + $kernel_addr &&" \ 206 "setexpr ramdisk_addr $nor_base + $ramdisk_addr &&" \ 207 "setexpr fdt_addr $nor_base + $fdt_addr &&" \ 208 "bootz $kernel_addr $ramdisk_addr $fdt_addr\0" \ 209 "nandboot=setexpr bootm_low $kernel_addr_r '&' fe000000 &&" \ 210 "nand read $kernel_addr_r $kernel_addr $kernel_size &&" \ 211 "nand read $ramdisk_addr_r $ramdisk_addr $ramdisk_size &&" \ 212 "nand read $fdt_addr_r $fdt_addr $fdt_size &&" \ 213 "bootz $kernel_addr_r $ramdisk_addr_r $fdt_addr_r\0" \ 214 "tftpboot=setexpr bootm_low $kernel_addr_r '&' fe000000 &&" \ 215 "tftpboot $kernel_addr_r $bootfile &&" \ 216 "tftpboot $ramdisk_addr_r $ramdisk_file &&" \ 217 "tftpboot $fdt_addr_r $fdt_file &&" \ 218 "bootz $kernel_addr_r $ramdisk_addr_r $fdt_addr_r\0" 219 #endif 220 221 #define CONFIG_EXTRA_ENV_SETTINGS \ 222 "netdev=eth0\0" \ 223 "verify=n\0" \ 224 "norbase=0x42000000\0" \ 225 "nandupdate=nand erase 0 0x00100000 &&" \ 226 "tftpboot u-boot-spl-dtb.bin &&" \ 227 "nand write $loadaddr 0 0x00010000 &&" \ 228 "tftpboot u-boot-dtb.img &&" \ 229 "nand write $loadaddr 0x00010000 0x000f0000\0" \ 230 LINUXBOOT_ENV_SETTINGS 231 232 #define CONFIG_SYS_BOOTMAPSZ 0x20000000 233 234 /* Open Firmware flat tree */ 235 #define CONFIG_OF_LIBFDT 236 237 #define CONFIG_SYS_SDRAM_BASE 0x80000000 238 #define CONFIG_NR_DRAM_BANKS 2 239 240 #if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD3) || \ 241 defined(CONFIG_ARCH_UNIPHIER_PH1_LD4) || \ 242 defined(CONFIG_ARCH_UNIPHIER_PH1_SLD8) 243 #define CONFIG_SPL_TEXT_BASE 0x00040000 244 #else 245 #define CONFIG_SPL_TEXT_BASE 0x00100000 246 #endif 247 248 #define CONFIG_SPL_STACK (0x0ff08000) 249 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE) 250 251 #define CONFIG_PANIC_HANG 252 253 #define CONFIG_SPL_FRAMEWORK 254 #define CONFIG_SPL_SERIAL_SUPPORT 255 #define CONFIG_SPL_NAND_SUPPORT 256 257 #define CONFIG_SPL_LIBCOMMON_SUPPORT /* for mem_malloc_init */ 258 #define CONFIG_SPL_LIBGENERIC_SUPPORT 259 260 #define CONFIG_SPL_BOARD_INIT 261 262 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x10000 263 264 #define CONFIG_SPL_MAX_FOOTPRINT 0x10000 265 266 #endif /* __CONFIG_UNIPHIER_COMMON_H__ */ 267