xref: /openbmc/u-boot/include/configs/ulcb.h (revision 8c1b52f4)
1 /*
2  * include/configs/ulcb.h
3  *     This file is ULCB board configuration.
4  *
5  * Copyright (C) 2017 Renesas Electronics Corporation
6  *
7  * SPDX-License-Identifier: GPL-2.0+
8  */
9 
10 #ifndef __ULCB_H
11 #define __ULCB_H
12 
13 #undef DEBUG
14 
15 #include "rcar-gen3-common.h"
16 
17 /* SCIF */
18 #define CONFIG_CONS_SCIF2
19 #define CONFIG_CONS_INDEX	2
20 #define CONFIG_SH_SCIF_CLK_FREQ        CONFIG_S3D4_CLK_FREQ
21 
22 /* [A] Hyper Flash */
23 /* use to RPC(SPI Multi I/O Bus Controller) */
24 
25 /* Ethernet RAVB */
26 #define CONFIG_BITBANGMII
27 #define CONFIG_BITBANGMII_MULTI
28 
29 /* Board Clock */
30 /* XTAL_CLK : 33.33MHz */
31 #define RCAR_XTAL_CLK		33333333u
32 #define CONFIG_SYS_CLK_FREQ	RCAR_XTAL_CLK
33 /* ch0to2 CPclk, ch3to11 S3D2_PEREclk, ch12to14 S3D2_RTclk */
34 /* CPclk 16.66MHz, S3D2 133.33MHz , S3D4 66.66MHz          */
35 #define CONFIG_CP_CLK_FREQ	(CONFIG_SYS_CLK_FREQ / 2)
36 #define CONFIG_PLL1_CLK_FREQ	(CONFIG_SYS_CLK_FREQ * 192 / 2)
37 #define CONFIG_S3D2_CLK_FREQ	(266666666u/2)
38 #define CONFIG_S3D4_CLK_FREQ	(266666666u/4)
39 
40 /* Generic Timer Definitions (use in assembler source) */
41 #define COUNTER_FREQUENCY	0xFE502A	/* 16.66MHz from CPclk */
42 
43 /* CPLD SPI */
44 #define CONFIG_CMD_SPI
45 #define CONFIG_SOFT_SPI
46 #define SPI_DELAY	udelay(0)
47 #define SPI_SDA(val)	ulcb_softspi_sda(val)
48 #define SPI_SCL(val)	ulcb_softspi_scl(val)
49 #define SPI_READ	ulcb_softspi_read()
50 #ifndef	__ASSEMBLY__
51 void ulcb_softspi_sda(int);
52 void ulcb_softspi_scl(int);
53 unsigned char ulcb_softspi_read(void);
54 #endif
55 
56 /* i2c */
57 #define CONFIG_SYS_I2C
58 #define CONFIG_SYS_I2C_SH
59 #define CONFIG_SYS_I2C_SLAVE		0x60
60 #define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS	1
61 #define CONFIG_SYS_I2C_SH_SPEED0	400000
62 #define CONFIG_SH_I2C_DATA_HIGH		4
63 #define CONFIG_SH_I2C_DATA_LOW		5
64 #define CONFIG_SH_I2C_CLOCK		10000000
65 
66 #define CONFIG_SYS_I2C_POWERIC_ADDR	0x30
67 
68 /* SDHI */
69 #define CONFIG_SH_SDHI_FREQ		200000000
70 
71 /* Environment in eMMC, at the end of 2nd "boot sector" */
72 #define CONFIG_ENV_OFFSET		(-CONFIG_ENV_SIZE)
73 #define CONFIG_SYS_MMC_ENV_DEV		1
74 #define CONFIG_SYS_MMC_ENV_PART		2
75 
76 #endif /* __ULCB_H */
77