xref: /openbmc/u-boot/include/configs/ulcb.h (revision 76080d0c)
1 /*
2  * include/configs/ulcb.h
3  *     This file is ULCB board configuration.
4  *
5  * Copyright (C) 2017 Renesas Electronics Corporation
6  *
7  * SPDX-License-Identifier: GPL-2.0+
8  */
9 
10 #ifndef __ULCB_H
11 #define __ULCB_H
12 
13 #undef DEBUG
14 
15 #include "rcar-gen3-common.h"
16 
17 /* Ethernet RAVB */
18 #define CONFIG_BITBANGMII
19 #define CONFIG_BITBANGMII_MULTI
20 
21 /* Board Clock */
22 /* XTAL_CLK : 33.33MHz */
23 #define CONFIG_SYS_CLK_FREQ	33333333u
24 
25 /* Generic Timer Definitions (use in assembler source) */
26 #define COUNTER_FREQUENCY	0xFE502A	/* 16.66MHz from CPclk */
27 
28 /* CPLD SPI */
29 #define CONFIG_CMD_SPI
30 #define CONFIG_SOFT_SPI
31 #define SPI_DELAY	udelay(0)
32 #define SPI_SDA(val)	ulcb_softspi_sda(val)
33 #define SPI_SCL(val)	ulcb_softspi_scl(val)
34 #define SPI_READ	ulcb_softspi_read()
35 #ifndef	__ASSEMBLY__
36 void ulcb_softspi_sda(int);
37 void ulcb_softspi_scl(int);
38 unsigned char ulcb_softspi_read(void);
39 #endif
40 
41 /* i2c */
42 #define CONFIG_SYS_I2C
43 #define CONFIG_SYS_I2C_SH
44 #define CONFIG_SYS_I2C_SLAVE		0x60
45 #define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS	1
46 #define CONFIG_SYS_I2C_SH_SPEED0	400000
47 #define CONFIG_SH_I2C_DATA_HIGH		4
48 #define CONFIG_SH_I2C_DATA_LOW		5
49 #define CONFIG_SH_I2C_CLOCK		10000000
50 
51 #define CONFIG_SYS_I2C_POWERIC_ADDR	0x30
52 
53 /* Environment in eMMC, at the end of 2nd "boot sector" */
54 #define CONFIG_ENV_OFFSET		(-CONFIG_ENV_SIZE)
55 #define CONFIG_SYS_MMC_ENV_DEV		1
56 #define CONFIG_SYS_MMC_ENV_PART		2
57 
58 #endif /* __ULCB_H */
59