xref: /openbmc/u-boot/include/configs/ulcb.h (revision 61e2ff8e)
1 /*
2  * include/configs/ulcb.h
3  *     This file is ULCB board configuration.
4  *
5  * Copyright (C) 2017 Renesas Electronics Corporation
6  *
7  * SPDX-License-Identifier: GPL-2.0+
8  */
9 
10 #ifndef __ULCB_H
11 #define __ULCB_H
12 
13 #undef DEBUG
14 
15 #include "rcar-gen3-common.h"
16 
17 /* SCIF */
18 #define CONFIG_CONS_SCIF2
19 #define CONFIG_CONS_INDEX	2
20 
21 /* [A] Hyper Flash */
22 /* use to RPC(SPI Multi I/O Bus Controller) */
23 
24 /* Ethernet RAVB */
25 #define CONFIG_BITBANGMII
26 #define CONFIG_BITBANGMII_MULTI
27 
28 /* Board Clock */
29 /* XTAL_CLK : 33.33MHz */
30 #define CONFIG_SYS_CLK_FREQ	33333333u
31 
32 /* Generic Timer Definitions (use in assembler source) */
33 #define COUNTER_FREQUENCY	0xFE502A	/* 16.66MHz from CPclk */
34 
35 /* CPLD SPI */
36 #define CONFIG_CMD_SPI
37 #define CONFIG_SOFT_SPI
38 #define SPI_DELAY	udelay(0)
39 #define SPI_SDA(val)	ulcb_softspi_sda(val)
40 #define SPI_SCL(val)	ulcb_softspi_scl(val)
41 #define SPI_READ	ulcb_softspi_read()
42 #ifndef	__ASSEMBLY__
43 void ulcb_softspi_sda(int);
44 void ulcb_softspi_scl(int);
45 unsigned char ulcb_softspi_read(void);
46 #endif
47 
48 /* i2c */
49 #define CONFIG_SYS_I2C
50 #define CONFIG_SYS_I2C_SH
51 #define CONFIG_SYS_I2C_SLAVE		0x60
52 #define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS	1
53 #define CONFIG_SYS_I2C_SH_SPEED0	400000
54 #define CONFIG_SH_I2C_DATA_HIGH		4
55 #define CONFIG_SH_I2C_DATA_LOW		5
56 #define CONFIG_SH_I2C_CLOCK		10000000
57 
58 #define CONFIG_SYS_I2C_POWERIC_ADDR	0x30
59 
60 /* Environment in eMMC, at the end of 2nd "boot sector" */
61 #define CONFIG_ENV_OFFSET		(-CONFIG_ENV_SIZE)
62 #define CONFIG_SYS_MMC_ENV_DEV		1
63 #define CONFIG_SYS_MMC_ENV_PART		2
64 
65 #endif /* __ULCB_H */
66