1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Copyright (C) 2015, Savoir-faire Linux Inc. 4 * 5 * Derived from MX51EVK code by 6 * Guennadi Liakhovetski <lg@denx.de> 7 * Freescale Semiconductor, Inc. 8 * 9 * Configuration settings for the TS4800 Board 10 */ 11 12 #ifndef __CONFIG_H 13 #define __CONFIG_H 14 15 /* High Level Configuration Options */ 16 17 #define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is a 2nd stage bootloader */ 18 19 #define CONFIG_HW_WATCHDOG 20 21 #define CONFIG_MACH_TYPE MACH_TYPE_TS48XX 22 23 /* text base address used when linking */ 24 25 #include <asm/arch/imx-regs.h> 26 27 /* enable passing of ATAGs */ 28 #define CONFIG_CMDLINE_TAG 29 #define CONFIG_SETUP_MEMORY_TAGS 30 #define CONFIG_INITRD_TAG 31 #define CONFIG_REVISION_TAG 32 33 /* 34 * Size of malloc() pool 35 */ 36 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) 37 38 /* 39 * Hardware drivers 40 */ 41 42 #define CONFIG_MXC_UART 43 #define CONFIG_MXC_UART_BASE UART1_BASE 44 45 /* 46 * SPI Configs 47 * */ 48 #define CONFIG_HARD_SPI /* puts SPI: ready */ 49 50 /* 51 * MMC Configs 52 * */ 53 #define CONFIG_SYS_FSL_ESDHC_ADDR MMC_SDHC1_BASE_ADDR 54 55 /* 56 * Eth Configs 57 */ 58 #define CONFIG_PHY_SMSC 59 60 #define CONFIG_FEC_MXC 61 #define IMX_FEC_BASE FEC_BASE_ADDR 62 #define CONFIG_ETHPRIME "FEC" 63 #define CONFIG_FEC_MXC_PHYADDR 0 64 65 /* allow to overwrite serial and ethaddr */ 66 #define CONFIG_ENV_OVERWRITE /* disable vendor parameters protection (serial#, ethaddr) */ 67 68 /*********************************************************** 69 * Command definition 70 ***********************************************************/ 71 72 /* Environment variables */ 73 74 75 #define CONFIG_LOADADDR 0x91000000 /* loadaddr env var */ 76 77 #define CONFIG_EXTRA_ENV_SETTINGS \ 78 "script=boot.scr\0" \ 79 "image=zImage\0" \ 80 "fdt_file=imx51-ts4800.dtb\0" \ 81 "fdt_addr=0x90fe0000\0" \ 82 "mmcdev=0\0" \ 83 "mmcpart=2\0" \ 84 "mmcroot=/dev/mmcblk0p3 rootwait rw\0" \ 85 "mmcargs=setenv bootargs root=${mmcroot}\0" \ 86 "addtty=setenv bootargs ${bootargs} console=ttymxc0,${baudrate}\0" \ 87 "loadbootscript=" \ 88 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 89 "bootscript=echo Running bootscript from mmc ...; " \ 90 "source\0" \ 91 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image};\0" \ 92 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ 93 "mmcboot=echo Booting from mmc ...; " \ 94 "run mmcargs addtty; " \ 95 "if run loadfdt; then " \ 96 "bootz ${loadaddr} - ${fdt_addr}; " \ 97 "else " \ 98 "echo ERR: cannot load FDT; " \ 99 "fi; " 100 101 102 #define CONFIG_BOOTCOMMAND \ 103 "mmc dev ${mmcdev}; if mmc rescan; then " \ 104 "if run loadbootscript; then " \ 105 "run bootscript; " \ 106 "else " \ 107 "if run loadimage; then " \ 108 "run mmcboot; " \ 109 "fi; " \ 110 "fi; " \ 111 "fi; " 112 113 /* 114 * Miscellaneous configurable options 115 */ 116 117 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 118 119 /*----------------------------------------------------------------------- 120 * Physical Memory Map 121 */ 122 #define PHYS_SDRAM_1 CSD0_BASE_ADDR 123 #define PHYS_SDRAM_1_SIZE (256 * 1024 * 1024) 124 125 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1) 126 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) 127 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) 128 129 #define CONFIG_SYS_INIT_SP_OFFSET \ 130 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 131 #define CONFIG_SYS_INIT_SP_ADDR \ 132 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 133 134 /* Low level init */ 135 #define CONFIG_SYS_DDR_CLKSEL 0 136 #define CONFIG_SYS_CLKTL_CBCDR 0x59E35100 137 #define CONFIG_SYS_MAIN_PWR_ON 138 139 /*----------------------------------------------------------------------- 140 * Environment organization 141 */ 142 143 #define CONFIG_ENV_OFFSET (6 * 64 * 1024) 144 #define CONFIG_ENV_SIZE (8 * 1024) 145 #define CONFIG_SYS_MMC_ENV_DEV 0 146 147 #endif 148