1 /* 2 * Copyright (C) 2015, Savoir-faire Linux Inc. 3 * 4 * Derived from MX51EVK code by 5 * Guennadi Liakhovetski <lg@denx.de> 6 * Freescale Semiconductor, Inc. 7 * 8 * Configuration settings for the TS4800 Board 9 * 10 * SPDX-License-Identifier: GPL-2.0+ 11 */ 12 13 #ifndef __CONFIG_H 14 #define __CONFIG_H 15 16 /* High Level Configuration Options */ 17 #define CONFIG_MX51 18 19 #define CONFIG_DISPLAY_CPUINFO 20 #define CONFIG_DISPLAY_BOARDINFO 21 22 #define CONFIG_SYS_NO_FLASH /* No NOR Flash */ 23 #define CONFIG_SKIP_LOWLEVEL_INIT /* U-boot is a 2nd stage bootloader */ 24 25 #define CONFIG_HW_WATCHDOG 26 27 #define CONFIG_OF_LIBFDT 28 29 #define CONFIG_MACH_TYPE MACH_TYPE_TS48XX 30 31 /* text base address used when linking */ 32 #define CONFIG_SYS_TEXT_BASE 0x90008000 33 34 #include <asm/arch/imx-regs.h> 35 36 /* enable passing of ATAGs */ 37 #define CONFIG_CMDLINE_TAG 38 #define CONFIG_SETUP_MEMORY_TAGS 39 #define CONFIG_INITRD_TAG 40 #define CONFIG_REVISION_TAG 41 42 /* 43 * Size of malloc() pool 44 */ 45 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) 46 47 /* 48 * Hardware drivers 49 */ 50 51 #define CONFIG_MXC_UART 52 #define CONFIG_MXC_UART_BASE UART1_BASE 53 #define CONFIG_MXC_GPIO 54 55 /* 56 * SPI Configs 57 * */ 58 #define CONFIG_HARD_SPI /* puts SPI: ready */ 59 #define CONFIG_MXC_SPI /* driver for the SPI controllers*/ 60 #define CONFIG_CMD_SPI /* SPI serial bus support */ 61 62 /* 63 * MMC Configs 64 * */ 65 #define CONFIG_FSL_ESDHC 66 #define CONFIG_SYS_FSL_ESDHC_ADDR MMC_SDHC1_BASE_ADDR 67 68 #define CONFIG_MMC 69 70 #define CONFIG_CMD_MMC 71 #define CONFIG_GENERIC_MMC 72 #define CONFIG_CMD_FAT 73 #define CONFIG_DOS_PARTITION 74 75 /* 76 * Eth Configs 77 */ 78 #define CONFIG_MII 79 #define CONFIG_PHYLIB 80 #define CONFIG_PHY_SMSC 81 82 #define CONFIG_FEC_MXC 83 #define IMX_FEC_BASE FEC_BASE_ADDR 84 #define CONFIG_ETHPRIME "FEC" 85 #define CONFIG_FEC_MXC_PHYADDR 0 86 87 #define CONFIG_CMD_PING 88 #define CONFIG_CMD_DHCP 89 #define CONFIG_CMD_MII 90 91 /* allow to overwrite serial and ethaddr */ 92 #define CONFIG_ENV_OVERWRITE /* disable vendor parameters protection (serial#, ethaddr) */ 93 #define CONFIG_CONS_INDEX 1 /* use UART0 : used by serial driver */ 94 #define CONFIG_BAUDRATE 115200 95 96 /*********************************************************** 97 * Command definition 98 ***********************************************************/ 99 100 #define CONFIG_CMD_BOOTZ 101 #undef CONFIG_CMD_IMLS 102 103 /* Environment variables */ 104 105 #define CONFIG_BOOTDELAY 1 106 107 #define CONFIG_LOADADDR 0x91000000 /* loadaddr env var */ 108 109 #define CONFIG_EXTRA_ENV_SETTINGS \ 110 "script=boot.scr\0" \ 111 "image=uImage\0" \ 112 "mmcdev=0\0" \ 113 "mmcpart=1\0" \ 114 "mmcargs=setenv bootargs root=/dev/mmcblk0p2 rootwait rw\0" \ 115 "addtty=setenv bootargs ${bootargs} console=ttymxc0,${baudrate}\0" \ 116 "loadbootscript=" \ 117 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 118 "bootscript=echo Running bootscript from mmc ...; " \ 119 "source\0" \ 120 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image};\0" \ 121 "mmcboot=echo Booting from mmc ...; " \ 122 "run mmcargs addtty; " \ 123 "bootm; " 124 125 #define CONFIG_BOOTCOMMAND \ 126 "mmc dev ${mmcdev}; if mmc rescan; then " \ 127 "if run loadbootscript; then " \ 128 "run bootscript; " \ 129 "else " \ 130 "if run loadimage; then " \ 131 "run mmcboot; " \ 132 "fi; " \ 133 "fi; " \ 134 "fi; " 135 136 /* 137 * Miscellaneous configurable options 138 */ 139 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 140 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ 141 #define CONFIG_AUTO_COMPLETE 142 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 143 /* Print Buffer Size */ 144 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 145 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 146 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ 147 148 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 149 150 #define CONFIG_CMDLINE_EDITING 151 152 /*----------------------------------------------------------------------- 153 * Physical Memory Map 154 */ 155 #define CONFIG_NR_DRAM_BANKS 1 156 #define PHYS_SDRAM_1 CSD0_BASE_ADDR 157 #define PHYS_SDRAM_1_SIZE (256 * 1024 * 1024) 158 159 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1) 160 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) 161 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) 162 163 #define CONFIG_BOARD_EARLY_INIT_F 164 165 #define CONFIG_SYS_INIT_SP_OFFSET \ 166 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 167 #define CONFIG_SYS_INIT_SP_ADDR \ 168 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 169 170 /* Low level init */ 171 #define CONFIG_SYS_DDR_CLKSEL 0 172 #define CONFIG_SYS_CLKTL_CBCDR 0x59E35100 173 #define CONFIG_SYS_MAIN_PWR_ON 174 175 /*----------------------------------------------------------------------- 176 * Environment organization 177 */ 178 179 #define CONFIG_ENV_OFFSET (6 * 64 * 1024) 180 #define CONFIG_ENV_SIZE (8 * 1024) 181 #define CONFIG_ENV_IS_IN_MMC 182 #define CONFIG_SYS_MMC_ENV_DEV 0 183 184 #endif 185