1 /* 2 * Copyright (C) 2015, Savoir-faire Linux Inc. 3 * 4 * Derived from MX51EVK code by 5 * Guennadi Liakhovetski <lg@denx.de> 6 * Freescale Semiconductor, Inc. 7 * 8 * Configuration settings for the TS4800 Board 9 * 10 * SPDX-License-Identifier: GPL-2.0+ 11 */ 12 13 #ifndef __CONFIG_H 14 #define __CONFIG_H 15 16 /* High Level Configuration Options */ 17 #define CONFIG_MX51 18 19 #define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is a 2nd stage bootloader */ 20 21 #define CONFIG_HW_WATCHDOG 22 23 #define CONFIG_MACH_TYPE MACH_TYPE_TS48XX 24 25 /* text base address used when linking */ 26 #define CONFIG_SYS_TEXT_BASE 0x90008000 27 28 #include <asm/arch/imx-regs.h> 29 30 /* enable passing of ATAGs */ 31 #define CONFIG_CMDLINE_TAG 32 #define CONFIG_SETUP_MEMORY_TAGS 33 #define CONFIG_INITRD_TAG 34 #define CONFIG_REVISION_TAG 35 36 /* 37 * Size of malloc() pool 38 */ 39 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) 40 41 /* 42 * Hardware drivers 43 */ 44 45 #define CONFIG_MXC_UART 46 #define CONFIG_MXC_UART_BASE UART1_BASE 47 #define CONFIG_MXC_GPIO 48 49 /* 50 * SPI Configs 51 * */ 52 #define CONFIG_HARD_SPI /* puts SPI: ready */ 53 #define CONFIG_MXC_SPI /* driver for the SPI controllers*/ 54 55 /* 56 * MMC Configs 57 * */ 58 #define CONFIG_FSL_ESDHC 59 #define CONFIG_SYS_FSL_ESDHC_ADDR MMC_SDHC1_BASE_ADDR 60 61 /* 62 * Eth Configs 63 */ 64 #define CONFIG_MII 65 #define CONFIG_PHYLIB 66 #define CONFIG_PHY_SMSC 67 68 #define CONFIG_FEC_MXC 69 #define IMX_FEC_BASE FEC_BASE_ADDR 70 #define CONFIG_ETHPRIME "FEC" 71 #define CONFIG_FEC_MXC_PHYADDR 0 72 73 /* allow to overwrite serial and ethaddr */ 74 #define CONFIG_ENV_OVERWRITE /* disable vendor parameters protection (serial#, ethaddr) */ 75 #define CONFIG_CONS_INDEX 1 /* use UART0 : used by serial driver */ 76 77 /*********************************************************** 78 * Command definition 79 ***********************************************************/ 80 81 /* Environment variables */ 82 83 84 #define CONFIG_LOADADDR 0x91000000 /* loadaddr env var */ 85 86 #define CONFIG_EXTRA_ENV_SETTINGS \ 87 "script=boot.scr\0" \ 88 "image=zImage\0" \ 89 "fdt_file=imx51-ts4800.dtb\0" \ 90 "fdt_addr=0x90fe0000\0" \ 91 "mmcdev=0\0" \ 92 "mmcpart=2\0" \ 93 "mmcroot=/dev/mmcblk0p3 rootwait rw\0" \ 94 "mmcargs=setenv bootargs root=${mmcroot}\0" \ 95 "addtty=setenv bootargs ${bootargs} console=ttymxc0,${baudrate}\0" \ 96 "loadbootscript=" \ 97 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 98 "bootscript=echo Running bootscript from mmc ...; " \ 99 "source\0" \ 100 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image};\0" \ 101 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ 102 "mmcboot=echo Booting from mmc ...; " \ 103 "run mmcargs addtty; " \ 104 "if run loadfdt; then " \ 105 "bootz ${loadaddr} - ${fdt_addr}; " \ 106 "else " \ 107 "echo ERR: cannot load FDT; " \ 108 "fi; " 109 110 111 #define CONFIG_BOOTCOMMAND \ 112 "mmc dev ${mmcdev}; if mmc rescan; then " \ 113 "if run loadbootscript; then " \ 114 "run bootscript; " \ 115 "else " \ 116 "if run loadimage; then " \ 117 "run mmcboot; " \ 118 "fi; " \ 119 "fi; " \ 120 "fi; " 121 122 /* 123 * Miscellaneous configurable options 124 */ 125 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 126 #define CONFIG_AUTO_COMPLETE 127 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 128 /* Print Buffer Size */ 129 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 130 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 131 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ 132 133 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 134 135 #define CONFIG_CMDLINE_EDITING 136 137 /*----------------------------------------------------------------------- 138 * Physical Memory Map 139 */ 140 #define CONFIG_NR_DRAM_BANKS 1 141 #define PHYS_SDRAM_1 CSD0_BASE_ADDR 142 #define PHYS_SDRAM_1_SIZE (256 * 1024 * 1024) 143 144 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1) 145 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) 146 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) 147 148 #define CONFIG_SYS_INIT_SP_OFFSET \ 149 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 150 #define CONFIG_SYS_INIT_SP_ADDR \ 151 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 152 153 /* Low level init */ 154 #define CONFIG_SYS_DDR_CLKSEL 0 155 #define CONFIG_SYS_CLKTL_CBCDR 0x59E35100 156 #define CONFIG_SYS_MAIN_PWR_ON 157 158 /*----------------------------------------------------------------------- 159 * Environment organization 160 */ 161 162 #define CONFIG_ENV_OFFSET (6 * 64 * 1024) 163 #define CONFIG_ENV_SIZE (8 * 1024) 164 #define CONFIG_ENV_IS_IN_MMC 165 #define CONFIG_SYS_MMC_ENV_DEV 0 166 167 #endif 168