1 /* 2 * (C) Copyright 2006-2008 3 * Texas Instruments. 4 * Richard Woodruff <r-woodruff2@ti.com> 5 * Syed Mohammed Khasim <x0khasim@ti.com> 6 * 7 * (C) Copyright 2012 8 * Corscience GmbH & Co. KG 9 * Thomas Weber <weber@corscience.de> 10 * 11 * Configuration settings for the Tricorder board. 12 * 13 * SPDX-License-Identifier: GPL-2.0+ 14 */ 15 16 #ifndef __CONFIG_H 17 #define __CONFIG_H 18 19 /* High Level Configuration Options */ 20 #define CONFIG_SYS_THUMB_BUILD 21 #define CONFIG_OMAP /* in a TI OMAP core */ 22 /* Common ARM Erratas */ 23 #define CONFIG_ARM_ERRATA_454179 24 #define CONFIG_ARM_ERRATA_430973 25 #define CONFIG_ARM_ERRATA_621766 26 27 #define CONFIG_MACH_TYPE MACH_TYPE_TRICORDER 28 /* 29 * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM 30 * 64 bytes before this address should be set aside for u-boot.img's 31 * header. That is 0x800FFFC0--0x80100000 should not be used for any 32 * other needs. 33 */ 34 #define CONFIG_SYS_TEXT_BASE 0x80100000 35 36 #define CONFIG_SDRC /* The chip has SDRC controller */ 37 38 #include <asm/arch/cpu.h> /* get chip and board defs */ 39 #include <asm/arch/omap.h> 40 41 /* Clock Defines */ 42 #define V_OSCK 26000000 /* Clock output from T2 */ 43 #define V_SCLK (V_OSCK >> 1) 44 45 #define CONFIG_MISC_INIT_R 46 47 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 48 #define CONFIG_SETUP_MEMORY_TAGS 49 #define CONFIG_INITRD_TAG 50 #define CONFIG_REVISION_TAG 51 52 /* Size of malloc() pool */ 53 #define CONFIG_SYS_MALLOC_LEN (1024*1024) 54 55 /* Hardware drivers */ 56 57 /* GPIO support */ 58 #define CONFIG_OMAP_GPIO 59 60 /* GPIO banks */ 61 #define CONFIG_OMAP3_GPIO_2 /* GPIO32..63 are in GPIO bank 2 */ 62 63 /* LED support */ 64 65 /* NS16550 Configuration */ 66 #define CONFIG_SYS_NS16550_SERIAL 67 #define CONFIG_SYS_NS16550_REG_SIZE (-4) 68 #define CONFIG_SYS_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ 69 70 /* select serial console configuration */ 71 #define CONFIG_CONS_INDEX 3 72 #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 73 #define CONFIG_SERIAL3 3 74 #define CONFIG_BAUDRATE 115200 75 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ 76 115200} 77 78 /* I2C */ 79 #define CONFIG_SYS_I2C 80 #define CONFIG_SYS_OMAP24_I2C_SPEED 100000 81 #define CONFIG_SYS_OMAP24_I2C_SLAVE 1 82 #define CONFIG_SYS_I2C_OMAP34XX 83 84 85 /* EEPROM */ 86 #define CONFIG_CMD_EEPROM 87 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 88 #define CONFIG_SYS_EEPROM_BUS_NUM 1 89 90 /* TWL4030 */ 91 #define CONFIG_TWL4030_POWER 92 #define CONFIG_TWL4030_LED 93 94 /* Board NAND Info */ 95 #define CONFIG_SYS_NO_FLASH /* no NOR flash */ 96 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ 97 #define MTDIDS_DEFAULT "nand0=omap2-nand.0" 98 #define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:" \ 99 "128k(SPL)," \ 100 "1m(u-boot)," \ 101 "384k(u-boot-env1)," \ 102 "1152k(mtdoops)," \ 103 "384k(u-boot-env2)," \ 104 "5m(kernel)," \ 105 "2m(fdt)," \ 106 "-(ubi)" 107 108 #define CONFIG_NAND_OMAP_GPMC 109 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ 110 /* to access nand */ 111 #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ 112 /* to access nand at */ 113 /* CS0 */ 114 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */ 115 /* devices */ 116 #define CONFIG_BCH 117 #define CONFIG_SYS_NAND_MAX_OOBFREE 2 118 #define CONFIG_SYS_NAND_MAX_ECCPOS 56 119 120 /* commands to include */ 121 #define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */ 122 #define CONFIG_CMD_NAND /* NAND support */ 123 #define CONFIG_CMD_NAND_LOCK_UNLOCK /* nand (un)lock commands */ 124 #define CONFIG_CMD_UBIFS /* UBIFS commands */ 125 #define CONFIG_LZO /* LZO is needed for UBIFS */ 126 127 #undef CONFIG_CMD_JFFS2 /* JFFS2 Support */ 128 129 /* needed for ubi */ 130 #define CONFIG_RBTREE 131 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ 132 #define CONFIG_MTD_PARTITIONS 133 134 /* Environment information (this is the common part) */ 135 136 137 /* hang() the board on panic() */ 138 #define CONFIG_PANIC_HANG 139 140 /* environment placement (for NAND), is different for FLASHCARD but does not 141 * harm there */ 142 #define CONFIG_ENV_OFFSET 0x120000 /* env start */ 143 #define CONFIG_ENV_OFFSET_REDUND 0x2A0000 /* redundant env start */ 144 #define CONFIG_ENV_SIZE (16 << 10) /* use 16KiB for env */ 145 #define CONFIG_ENV_RANGE (384 << 10) /* allow badblocks in env */ 146 147 /* the loadaddr is the same as CONFIG_SYS_LOAD_ADDR, unfortunately the defiend 148 * value can not be used here! */ 149 #define CONFIG_LOADADDR 0x82000000 150 151 #define CONFIG_COMMON_ENV_SETTINGS \ 152 "console=ttyO2,115200n8\0" \ 153 "mmcdev=0\0" \ 154 "vram=3M\0" \ 155 "defaultdisplay=lcd\0" \ 156 "kernelopts=mtdoops.mtddev=3\0" \ 157 "mtdparts=" MTDPARTS_DEFAULT "\0" \ 158 "mtdids=" MTDIDS_DEFAULT "\0" \ 159 "commonargs=" \ 160 "setenv bootargs console=${console} " \ 161 "${mtdparts} " \ 162 "${kernelopts} " \ 163 "vt.global_cursor_default=0 " \ 164 "vram=${vram} " \ 165 "omapdss.def_disp=${defaultdisplay}\0" 166 167 #define CONFIG_BOOTCOMMAND "run autoboot" 168 169 /* specific environment settings for different use cases 170 * FLASHCARD: used to run a rdimage from sdcard to program the device 171 * 'NORMAL': used to boot kernel from sdcard, nand, ... 172 * 173 * The main aim for the FLASHCARD skin is to have an embedded environment 174 * which will not be influenced by any data already on the device. 175 */ 176 #ifdef CONFIG_FLASHCARD 177 178 #define CONFIG_ENV_IS_NOWHERE 179 180 /* the rdaddr is 16 MiB before the loadaddr */ 181 #define CONFIG_ENV_RDADDR "rdaddr=0x81000000\0" 182 183 #define CONFIG_EXTRA_ENV_SETTINGS \ 184 CONFIG_COMMON_ENV_SETTINGS \ 185 CONFIG_ENV_RDADDR \ 186 "autoboot=" \ 187 "run commonargs; " \ 188 "setenv bootargs ${bootargs} " \ 189 "flashy_updateimg=/dev/mmcblk0p1:corscience_update.img " \ 190 "rdinit=/sbin/init; " \ 191 "mmc dev ${mmcdev}; mmc rescan; " \ 192 "fatload mmc ${mmcdev} ${loadaddr} uImage; " \ 193 "fatload mmc ${mmcdev} ${rdaddr} uRamdisk; " \ 194 "bootm ${loadaddr} ${rdaddr}\0" 195 196 #else /* CONFIG_FLASHCARD */ 197 198 #define CONFIG_ENV_OVERWRITE /* allow to overwrite serial and ethaddr */ 199 200 #define CONFIG_ENV_IS_IN_NAND 201 202 #define CONFIG_EXTRA_ENV_SETTINGS \ 203 CONFIG_COMMON_ENV_SETTINGS \ 204 "mmcargs=" \ 205 "run commonargs; " \ 206 "setenv bootargs ${bootargs} " \ 207 "root=/dev/mmcblk0p2 " \ 208 "rootwait " \ 209 "rw\0" \ 210 "nandargs=" \ 211 "run commonargs; " \ 212 "setenv bootargs ${bootargs} " \ 213 "root=ubi0:root " \ 214 "ubi.mtd=7 " \ 215 "rootfstype=ubifs " \ 216 "ro\0" \ 217 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ 218 "bootscript=echo Running bootscript from mmc ...; " \ 219 "source ${loadaddr}\0" \ 220 "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \ 221 "mmcboot=echo Booting from mmc ...; " \ 222 "run mmcargs; " \ 223 "bootm ${loadaddr}\0" \ 224 "loaduimage_ubi=ubi part ubi; " \ 225 "ubifsmount ubi:root; " \ 226 "ubifsload ${loadaddr} /boot/uImage\0" \ 227 "loaduimage_nand=nand read ${loadaddr} kernel 0x500000\0" \ 228 "nandboot=echo Booting from nand ...; " \ 229 "run nandargs; " \ 230 "run loaduimage_nand; " \ 231 "bootm ${loadaddr}\0" \ 232 "autoboot=mmc dev ${mmcdev}; if mmc rescan; then " \ 233 "if run loadbootscript; then " \ 234 "run bootscript; " \ 235 "else " \ 236 "if run loaduimage; then " \ 237 "run mmcboot; " \ 238 "else run nandboot; " \ 239 "fi; " \ 240 "fi; " \ 241 "else run nandboot; fi\0" 242 243 #endif /* CONFIG_FLASHCARD */ 244 245 /* Miscellaneous configurable options */ 246 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 247 #define CONFIG_CMDLINE_EDITING /* enable cmdline history */ 248 #define CONFIG_AUTO_COMPLETE 249 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ 250 /* Print Buffer Size */ 251 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 252 sizeof(CONFIG_SYS_PROMPT) + 16) 253 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 254 255 /* Boot Argument Buffer Size */ 256 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) 257 258 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0 + 0x00000000) 259 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \ 260 0x07000000) /* 112 MB */ 261 262 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0 + 0x02000000) 263 264 /* 265 * OMAP3 has 12 GP timers, they can be driven by the system clock 266 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). 267 * This rate is divided by a local divisor. 268 */ 269 #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) 270 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ 271 272 /* Physical Memory Map */ 273 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ 274 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 275 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 276 277 /* NAND and environment organization */ 278 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */ 279 280 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 281 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 282 #define CONFIG_SYS_INIT_RAM_SIZE 0x800 283 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 284 CONFIG_SYS_INIT_RAM_SIZE - \ 285 GENERATED_GBL_DATA_SIZE) 286 287 /* SRAM config */ 288 #define CONFIG_SYS_SRAM_START 0x40200000 289 #define CONFIG_SYS_SRAM_SIZE 0x10000 290 291 /* Defines for SPL */ 292 #define CONFIG_SPL_FRAMEWORK 293 #define CONFIG_SPL_NAND_SIMPLE 294 295 #define CONFIG_SPL_BOARD_INIT 296 #define CONFIG_SPL_NAND_BASE 297 #define CONFIG_SPL_NAND_DRIVERS 298 #define CONFIG_SPL_NAND_ECC 299 #define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds" 300 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" 301 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 302 303 #define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/ 304 #define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \ 305 CONFIG_SPL_TEXT_BASE) 306 307 #define CONFIG_SPL_BSS_START_ADDR 0x80000000 /*CONFIG_SYS_SDRAM_BASE*/ 308 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 309 310 /* NAND boot config */ 311 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 312 #define CONFIG_SYS_NAND_PAGE_COUNT 64 313 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 314 #define CONFIG_SYS_NAND_OOBSIZE 64 315 #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) 316 #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS 317 #define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, \ 318 13, 14, 16, 17, 18, 19, 20, 21, 22, \ 319 23, 24, 25, 26, 27, 28, 30, 31, 32, \ 320 33, 34, 35, 36, 37, 38, 39, 40, 41, \ 321 42, 44, 45, 46, 47, 48, 49, 50, 51, \ 322 52, 53, 54, 55, 56} 323 324 #define CONFIG_SYS_NAND_ECCSIZE 512 325 #define CONFIG_SYS_NAND_ECCBYTES 13 326 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW_DETECTION_SW 327 328 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE 329 330 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000 331 #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x100000 332 333 #define CONFIG_SYS_SPL_MALLOC_START 0x80208000 334 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 /* 1 MB */ 335 336 #define CONFIG_SYS_ALT_MEMTEST 337 #define CONFIG_SYS_MEMTEST_SCRATCH 0x81000000 338 #endif /* __CONFIG_H */ 339