xref: /openbmc/u-boot/include/configs/trats2.h (revision be059e88)
1 /*
2  * Copyright (C) 2013 Samsung Electronics
3  * Sanghee Kim <sh0130.kim@samsung.com>
4  * Piotr Wilczek <p.wilczek@samsung.com>
5  *
6  * Configuation settings for the SAMSUNG TRATS2 (EXYNOS4412) board.
7  *
8  * SPDX-License-Identifier:	GPL-2.0+
9  */
10 
11 #ifndef __CONFIG_TRATS2_H
12 #define __CONFIG_TRATS2_H
13 
14 #include <configs/exynos4-common.h>
15 
16 #define CONFIG_TIZEN			/* TIZEN lib */
17 
18 #define CONFIG_SYS_L2CACHE_OFF
19 #ifndef CONFIG_SYS_L2CACHE_OFF
20 #define CONFIG_SYS_L2_PL310
21 #define CONFIG_SYS_PL310_BASE	0x10502000
22 #endif
23 
24 /* TRATS2 has 4 banks of DRAM */
25 #define CONFIG_NR_DRAM_BANKS		4
26 #define CONFIG_SYS_SDRAM_BASE		0x40000000
27 #define PHYS_SDRAM_1			CONFIG_SYS_SDRAM_BASE
28 #define SDRAM_BANK_SIZE			(256 << 20)	/* 256 MB */
29 /* memtest works on */
30 #define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
31 #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_SDRAM_BASE + 0x5E00000)
32 #define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + 0x3E00000)
33 
34 #define CONFIG_SYS_TEXT_BASE		0x43e00000
35 
36 /* select serial console configuration */
37 #define CONFIG_SERIAL2
38 #define CONFIG_BAUDRATE			115200
39 
40 /* Console configuration */
41 
42 #define CONFIG_BOOTARGS			"Please use defined boot"
43 #define CONFIG_BOOTCOMMAND		"run autoboot"
44 #define CONFIG_DEFAULT_CONSOLE		"console=ttySAC2,115200n8\0"
45 
46 #define CONFIG_SYS_INIT_SP_ADDR	(CONFIG_SYS_LOAD_ADDR \
47 					- GENERATED_GBL_DATA_SIZE)
48 
49 #define CONFIG_SYS_MEM_TOP_HIDE	(1 << 20)	/* ram console */
50 
51 #define CONFIG_SYS_MONITOR_BASE	0x00000000
52 
53 #define CONFIG_ENV_IS_IN_MMC
54 #define CONFIG_SYS_MMC_ENV_DEV		CONFIG_MMC_DEFAULT_DEV
55 #define CONFIG_ENV_SIZE			4096
56 #define CONFIG_ENV_OFFSET		((32 - 4) << 10) /* 32KiB - 4KiB */
57 
58 #define CONFIG_ENV_OVERWRITE
59 
60 #define CONFIG_ENV_VARS_UBOOT_CONFIG
61 #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
62 
63 /* Tizen - partitions definitions */
64 #define PARTS_CSA		"csa-mmc"
65 #define PARTS_BOOT		"boot"
66 #define PARTS_QBOOT		"qboot"
67 #define PARTS_CSC		"csc"
68 #define PARTS_ROOT		"platform"
69 #define PARTS_DATA		"data"
70 #define PARTS_UMS		"ums"
71 
72 #define PARTS_DEFAULT \
73 	"uuid_disk=${uuid_gpt_disk};" \
74 	"name="PARTS_CSA",start=5MiB,size=8MiB,uuid=${uuid_gpt_"PARTS_CSA"};" \
75 	"name="PARTS_BOOT",size=60MiB,uuid=${uuid_gpt_"PARTS_BOOT"};" \
76 	"name="PARTS_QBOOT",size=100MiB,uuid=${uuid_gpt_"PARTS_QBOOT"};" \
77 	"name="PARTS_CSC",size=150MiB,uuid=${uuid_gpt_"PARTS_CSC"};" \
78 	"name="PARTS_ROOT",size=1536MiB,uuid=${uuid_gpt_"PARTS_ROOT"};" \
79 	"name="PARTS_DATA",size=3000MiB,uuid=${uuid_gpt_"PARTS_DATA"};" \
80 	"name="PARTS_UMS",size=-,uuid=${uuid_gpt_"PARTS_UMS"}\0" \
81 
82 #define CONFIG_DFU_ALT \
83 	"u-boot raw 0x80 0x800;" \
84 	"/uImage ext4 0 2;" \
85 	"/modem.bin ext4 0 2;" \
86 	"/exynos4412-trats2.dtb ext4 0 2;" \
87 	""PARTS_CSA" part 0 1;" \
88 	""PARTS_BOOT" part 0 2;" \
89 	""PARTS_QBOOT" part 0 3;" \
90 	""PARTS_CSC" part 0 4;" \
91 	""PARTS_ROOT" part 0 5;" \
92 	""PARTS_DATA" part 0 6;" \
93 	""PARTS_UMS" part 0 7;" \
94 	"params.bin raw 0x38 0x8;" \
95 	"/Image.itb ext4 0 2\0"
96 
97 #define CONFIG_EXTRA_ENV_SETTINGS \
98 	"bootk=" \
99 		"run loaduimage;" \
100 		"if run loaddtb; then " \
101 			"bootm 0x40007FC0 - ${fdtaddr};" \
102 		"fi;" \
103 		"bootm 0x40007FC0;\0" \
104 	"updatebackup=" \
105 		"mmc dev 0 2; mmc write 0x51000000 0 0x800;" \
106 		" mmc dev 0 0\0" \
107 	"updatebootb=" \
108 		"mmc read 0x51000000 0x80 0x800; run updatebackup\0" \
109 	"mmcboot=" \
110 		"setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \
111 		"${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo}; " \
112 		"run bootk\0" \
113 	"bootchart=set opts init=/sbin/bootchartd; run bootcmd\0" \
114 	"boottrace=setenv opts initcall_debug; run bootcmd\0" \
115 	"verify=n\0" \
116 	"rootfstype=ext4\0" \
117 	"console=" CONFIG_DEFAULT_CONSOLE \
118 	"kernelname=uImage\0" \
119 	"loaduimage=ext4load mmc ${mmcdev}:${mmcbootpart} 0x40007FC0 " \
120 		"${kernelname}\0" \
121 	"loaddtb=ext4load mmc ${mmcdev}:${mmcbootpart} ${fdtaddr} " \
122 		"${fdtfile}\0" \
123 	"mmcdev=" __stringify(CONFIG_MMC_DEFAULT_DEV) "\0" \
124 	"mmcbootpart=2\0" \
125 	"mmcrootpart=5\0" \
126 	"opts=always_resume=1\0" \
127 	"partitions=" PARTS_DEFAULT \
128 	"dfu_alt_info=" CONFIG_DFU_ALT \
129 	"uartpath=ap\0" \
130 	"usbpath=ap\0" \
131 	"consoleon=set console console=ttySAC2,115200n8; save; reset\0" \
132 	"consoleoff=set console console=ram; save; reset\0" \
133 	"spladdr=0x40000100\0" \
134 	"splsize=0x200\0" \
135 	"splfile=falcon.bin\0" \
136 	"spl_export=" \
137 		   "setexpr spl_imgsize ${splsize} + 8 ;" \
138 		   "setenv spl_imgsize 0x${spl_imgsize};" \
139 		   "setexpr spl_imgaddr ${spladdr} - 8 ;" \
140 		   "setexpr spl_addr_tmp ${spladdr} - 4 ;" \
141 		   "mw.b ${spl_imgaddr} 0x00 ${spl_imgsize};run loaduimage;" \
142 		   "setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \
143 		   "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo};" \
144 		   "spl export atags 0x40007FC0;" \
145 		   "crc32 ${spladdr} ${splsize} ${spl_imgaddr};" \
146 		   "mw.l ${spl_addr_tmp} ${splsize};" \
147 		   "ext4write mmc ${mmcdev}:${mmcbootpart}" \
148 		   " /${splfile} ${spl_imgaddr} ${spl_imgsize};" \
149 		   "setenv spl_imgsize;" \
150 		   "setenv spl_imgaddr;" \
151 		   "setenv spl_addr_tmp;\0" \
152 	CONFIG_EXTRA_ENV_ITB \
153 	"fdtaddr=40800000\0" \
154 
155 /* GPT */
156 #define CONFIG_RANDOM_UUID
157 
158 /* Security subsystem - enable hw_rand() */
159 #define CONFIG_EXYNOS_ACE_SHA
160 #define CONFIG_LIB_HW_RAND
161 
162 /* Common misc for Samsung */
163 #define CONFIG_MISC_COMMON
164 
165 #define CONFIG_MISC_INIT_R
166 
167 /* Download menu - Samsung common */
168 #define CONFIG_LCD_MENU
169 #define CONFIG_LCD_MENU_BOARD
170 
171 /* Download menu - definitions for check keys */
172 #ifndef __ASSEMBLY__
173 #include <power/max77686_pmic.h>
174 
175 #define KEY_PWR_PMIC_NAME		"MAX77686_PMIC"
176 #define KEY_PWR_STATUS_REG		MAX77686_REG_PMIC_STATUS1
177 #define KEY_PWR_STATUS_MASK		(1 << 0)
178 #define KEY_PWR_INTERRUPT_REG		MAX77686_REG_PMIC_INT1
179 #define KEY_PWR_INTERRUPT_MASK		(1 << 1)
180 
181 #define KEY_VOL_UP_GPIO			EXYNOS4X12_GPIO_X22
182 #define KEY_VOL_DOWN_GPIO		EXYNOS4X12_GPIO_X33
183 #endif /* __ASSEMBLY__ */
184 
185 /* LCD console */
186 #define LCD_BPP                 LCD_COLOR16
187 #define CONFIG_SYS_WHITE_ON_BLACK
188 
189 /* LCD */
190 #define CONFIG_BMP_16BPP
191 #define CONFIG_FB_ADDR		0x52504000
192 #define CONFIG_EXYNOS_MIPI_DSIM
193 #define CONFIG_VIDEO_BMP_GZIP
194 #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((500 * 160 * 4) + 54)
195 
196 #endif	/* __CONFIG_H */
197