1 /* 2 * Copyright (C) 2011 Samsung Electronics 3 * Heungjun Kim <riverful.kim@samsung.com> 4 * 5 * Configuation settings for the SAMSUNG TRATS (EXYNOS4210) board. 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 10 #ifndef __CONFIG_TRATS_H 11 #define __CONFIG_TRATS_H 12 13 #include <configs/exynos4-common.h> 14 15 #define CONFIG_SYS_PROMPT "Trats # " /* Monitor Command Prompt */ 16 17 #define CONFIG_TRATS 18 19 20 #define CONFIG_TIZEN /* TIZEN lib */ 21 22 #define CONFIG_SYS_L2CACHE_OFF 23 #ifndef CONFIG_SYS_L2CACHE_OFF 24 #define CONFIG_SYS_L2_PL310 25 #define CONFIG_SYS_PL310_BASE 0x10502000 26 #endif 27 28 /* TRATS has 4 banks of DRAM */ 29 #define CONFIG_NR_DRAM_BANKS 4 30 #define CONFIG_SYS_SDRAM_BASE 0x40000000 31 #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE 32 #define CONFIG_SYS_TEXT_BASE 0x63300000 33 #define SDRAM_BANK_SIZE (256 << 20) /* 256 MB */ 34 35 /* memtest works on */ 36 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE 37 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x5000000) 38 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x4800000) 39 40 #define CONFIG_SYS_TEXT_BASE 0x63300000 41 42 /* select serial console configuration */ 43 #define CONFIG_SERIAL2 44 #define CONFIG_BAUDRATE 115200 45 46 /* Console configuration */ 47 #define CONFIG_SYS_CONSOLE_INFO_QUIET 48 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 49 50 /* MACH_TYPE_TRATS macro will be removed once added to mach-types */ 51 #define MACH_TYPE_TRATS 3928 52 #define CONFIG_MACH_TYPE MACH_TYPE_TRATS 53 54 #define CONFIG_BOOTARGS "Please use defined boot" 55 #define CONFIG_BOOTCOMMAND "run mmcboot" 56 #define CONFIG_DEFAULT_CONSOLE "console=ttySAC2,115200n8\0" 57 58 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR \ 59 - GENERATED_GBL_DATA_SIZE) 60 61 #define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */ 62 63 #define CONFIG_SYS_MONITOR_BASE 0x00000000 64 65 #define CONFIG_BOOTBLOCK "10" 66 #define CONFIG_ENV_COMMON_BOOT "${console} ${meminfo}" 67 68 #define CONFIG_ENV_IS_IN_MMC 69 #define CONFIG_SYS_MMC_ENV_DEV CONFIG_MMC_DEFAULT_DEV 70 #define CONFIG_ENV_SIZE 4096 71 #define CONFIG_ENV_OFFSET ((32 - 4) << 10) /* 32KiB - 4KiB */ 72 73 #define CONFIG_ENV_OVERWRITE 74 75 #define CONFIG_ENV_VARS_UBOOT_CONFIG 76 #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG 77 78 /* Tizen - partitions definitions */ 79 #define PARTS_CSA "csa-mmc" 80 #define PARTS_BOOT "boot" 81 #define PARTS_QBOOT "qboot" 82 #define PARTS_CSC "csc" 83 #define PARTS_ROOT "platform" 84 #define PARTS_DATA "data" 85 #define PARTS_UMS "ums" 86 87 #define PARTS_DEFAULT \ 88 "uuid_disk=${uuid_gpt_disk};" \ 89 "name="PARTS_CSA",start=5MiB,size=8MiB,uuid=${uuid_gpt_"PARTS_CSA"};" \ 90 "name="PARTS_BOOT",size=60MiB,uuid=${uuid_gpt_"PARTS_BOOT"};" \ 91 "name="PARTS_QBOOT",size=100MiB,uuid=${uuid_gpt_"PARTS_QBOOT"};" \ 92 "name="PARTS_CSC",size=150MiB,uuid=${uuid_gpt_"PARTS_CSC"};" \ 93 "name="PARTS_ROOT",size=1536MiB,uuid=${uuid_gpt_"PARTS_ROOT"};" \ 94 "name="PARTS_DATA",size=3000MiB,uuid=${uuid_gpt_"PARTS_DATA"};" \ 95 "name="PARTS_UMS",size=-,uuid=${uuid_gpt_"PARTS_UMS"}\0" \ 96 97 #define CONFIG_DFU_ALT \ 98 "u-boot raw 0x80 0x400;" \ 99 "/uImage ext4 0 2;" \ 100 "/modem.bin ext4 0 2;" \ 101 "/exynos4210-trats.dtb ext4 0 2;" \ 102 ""PARTS_CSA" part 0 1;" \ 103 ""PARTS_BOOT" part 0 2;" \ 104 ""PARTS_QBOOT" part 0 3;" \ 105 ""PARTS_CSC" part 0 4;" \ 106 ""PARTS_ROOT" part 0 5;" \ 107 ""PARTS_DATA" part 0 6;" \ 108 ""PARTS_UMS" part 0 7;" \ 109 "params.bin raw 0x38 0x8\0" 110 111 #define CONFIG_EXTRA_ENV_SETTINGS \ 112 "bootk=" \ 113 "run loaduimage;" \ 114 "if run loaddtb; then " \ 115 "bootm 0x40007FC0 - ${fdtaddr};" \ 116 "fi;" \ 117 "bootm 0x40007FC0;\0" \ 118 "updatebackup=" \ 119 "mmc dev 0 2; mmc write 0 0x42100000 0 0x200;" \ 120 "mmc dev 0 0\0" \ 121 "updatebootb=" \ 122 "mmc read 0 0x42100000 0x80 0x200; run updatebackup\0" \ 123 "lpj=lpj=3981312\0" \ 124 "nfsboot=" \ 125 "setenv bootargs root=/dev/nfs rw " \ 126 "nfsroot=${nfsroot},nolock,tcp " \ 127 "ip=${ipaddr}:${serverip}:${gatewayip}:" \ 128 "${netmask}:generic:usb0:off " CONFIG_ENV_COMMON_BOOT \ 129 "; run bootk\0" \ 130 "ramfsboot=" \ 131 "setenv bootargs root=/dev/ram0 rw rootfstype=ext2 " \ 132 "${console} ${meminfo} " \ 133 "initrd=0x43000000,8M ramdisk=8192\0" \ 134 "mmcboot=" \ 135 "setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \ 136 "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo}; " \ 137 "run bootk\0" \ 138 "bootchart=setenv opts init=/sbin/bootchartd; run bootcmd\0" \ 139 "boottrace=setenv opts initcall_debug; run bootcmd\0" \ 140 "mmcoops=mmc read 0 0x40000000 0x40 8; md 0x40000000 0x400\0" \ 141 "verify=n\0" \ 142 "rootfstype=ext4\0" \ 143 "console=" CONFIG_DEFAULT_CONSOLE \ 144 "meminfo=crashkernel=32M@0x50000000\0" \ 145 "nfsroot=/nfsroot/arm\0" \ 146 "bootblock=" CONFIG_BOOTBLOCK "\0" \ 147 "loaduimage=ext4load mmc ${mmcdev}:${mmcbootpart} 0x40007FC0 uImage\0" \ 148 "loaddtb=ext4load mmc ${mmcdev}:${mmcbootpart} ${fdtaddr} " \ 149 "${fdtfile}\0" \ 150 "mmcdev=0\0" \ 151 "mmcbootpart=2\0" \ 152 "mmcrootpart=5\0" \ 153 "opts=always_resume=1\0" \ 154 "partitions=" PARTS_DEFAULT \ 155 "dfu_alt_info=" CONFIG_DFU_ALT \ 156 "spladdr=0x40000100\0" \ 157 "splsize=0x200\0" \ 158 "splfile=falcon.bin\0" \ 159 "spl_export=" \ 160 "setexpr spl_imgsize ${splsize} + 8 ;" \ 161 "setenv spl_imgsize 0x${spl_imgsize};" \ 162 "setexpr spl_imgaddr ${spladdr} - 8 ;" \ 163 "setexpr spl_addr_tmp ${spladdr} - 4 ;" \ 164 "mw.b ${spl_imgaddr} 0x00 ${spl_imgsize};run loaduimage;" \ 165 "setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \ 166 "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo};" \ 167 "spl export atags 0x40007FC0;" \ 168 "crc32 ${spladdr} ${splsize} ${spl_imgaddr};" \ 169 "mw.l ${spl_addr_tmp} ${splsize};" \ 170 "ext4write mmc ${mmcdev}:${mmcbootpart}" \ 171 " /${splfile} ${spl_imgaddr} ${spl_imgsize};" \ 172 "setenv spl_imgsize;" \ 173 "setenv spl_imgaddr;" \ 174 "setenv spl_addr_tmp;\0" \ 175 "fdtaddr=40800000\0" \ 176 177 /* Falcon mode definitions */ 178 #define CONFIG_CMD_SPL 179 #define CONFIG_SYS_SPL_ARGS_ADDR CONFIG_SYS_SDRAM_BASE + 0x100 180 181 /* GPT */ 182 #define CONFIG_RANDOM_UUID 183 184 /* I2C */ 185 #include <asm/arch/gpio.h> 186 187 #define CONFIG_CMD_I2C 188 189 #define CONFIG_SYS_I2C 190 #define CONFIG_SYS_I2C_S3C24X0 191 #define CONFIG_SYS_I2C_S3C24X0_SPEED 100000 192 #define CONFIG_SYS_I2C_S3C24X0_SLAVE 0xFE 193 #define CONFIG_MAX_I2C_NUM 8 194 #define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */ 195 #define CONFIG_SYS_I2C_SOFT_SPEED 50000 196 #define CONFIG_SYS_I2C_SOFT_SLAVE 0x7F 197 #define CONFIG_SOFT_I2C_READ_REPEATED_START 198 #define CONFIG_SYS_I2C_INIT_BOARD 199 200 /* I2C FG */ 201 #define CONFIG_SOFT_I2C_GPIO_SCL EXYNOS4_GPIO_Y41 202 #define CONFIG_SOFT_I2C_GPIO_SDA EXYNOS4_GPIO_Y40 203 204 /* POWER */ 205 #define CONFIG_POWER 206 #define CONFIG_POWER_I2C 207 #define CONFIG_POWER_MAX8997 208 209 #define CONFIG_POWER_FG 210 #define CONFIG_POWER_FG_MAX17042 211 #define CONFIG_POWER_MUIC 212 #define CONFIG_POWER_MUIC_MAX8997 213 #define CONFIG_POWER_BATTERY 214 #define CONFIG_POWER_BATTERY_TRATS 215 216 /* Security subsystem - enable hw_rand() */ 217 #define CONFIG_EXYNOS_ACE_SHA 218 #define CONFIG_LIB_HW_RAND 219 220 /* Common misc for Samsung */ 221 #define CONFIG_MISC_COMMON 222 223 #define CONFIG_MISC_INIT_R 224 225 /* Download menu - Samsung common */ 226 #define CONFIG_LCD_MENU 227 #define CONFIG_LCD_MENU_BOARD 228 229 /* Download menu - definitions for check keys */ 230 #ifndef __ASSEMBLY__ 231 #include <power/max8997_pmic.h> 232 233 #define KEY_PWR_PMIC_NAME "MAX8997_PMIC" 234 #define KEY_PWR_STATUS_REG MAX8997_REG_STATUS1 235 #define KEY_PWR_STATUS_MASK (1 << 0) 236 #define KEY_PWR_INTERRUPT_REG MAX8997_REG_INT1 237 #define KEY_PWR_INTERRUPT_MASK (1 << 0) 238 239 #define KEY_VOL_UP_GPIO EXYNOS4_GPIO_X20 240 #define KEY_VOL_DOWN_GPIO EXYNOS4_GPIO_X21 241 #endif /* __ASSEMBLY__ */ 242 243 /* LCD console */ 244 #define LCD_BPP LCD_COLOR16 245 #define CONFIG_SYS_WHITE_ON_BLACK 246 247 /* LCD */ 248 #define CONFIG_EXYNOS_FB 249 #define CONFIG_LCD 250 #define CONFIG_CMD_BMP 251 #define CONFIG_BMP_16BPP 252 #define CONFIG_FB_ADDR 0x52504000 253 #define CONFIG_S6E8AX0 254 #define CONFIG_EXYNOS_MIPI_DSIM 255 #define CONFIG_VIDEO_BMP_GZIP 256 #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((500 * 160 * 4) + 54) 257 258 #endif /* __CONFIG_H */ 259