189f95492SHeungJun, Kim /* 289f95492SHeungJun, Kim * Copyright (C) 2011 Samsung Electronics 389f95492SHeungJun, Kim * Heungjun Kim <riverful.kim@samsung.com> 489f95492SHeungJun, Kim * 589f95492SHeungJun, Kim * Configuation settings for the SAMSUNG TRATS (EXYNOS4210) board. 689f95492SHeungJun, Kim * 71a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+ 889f95492SHeungJun, Kim */ 989f95492SHeungJun, Kim 1089f95492SHeungJun, Kim #ifndef __CONFIG_H 1189f95492SHeungJun, Kim #define __CONFIG_H 1289f95492SHeungJun, Kim 1389f95492SHeungJun, Kim /* 1489f95492SHeungJun, Kim * High Level Configuration Options 1589f95492SHeungJun, Kim * (easy to change) 1689f95492SHeungJun, Kim */ 1789f95492SHeungJun, Kim #define CONFIG_SAMSUNG /* in a SAMSUNG core */ 1889f95492SHeungJun, Kim #define CONFIG_S5P /* which is in a S5P Family */ 1989f95492SHeungJun, Kim #define CONFIG_EXYNOS4210 /* which is in a EXYNOS4210 */ 2089f95492SHeungJun, Kim #define CONFIG_TRATS /* working with TRATS */ 2190464971SDonghwa Lee #define CONFIG_TIZEN /* TIZEN lib */ 2289f95492SHeungJun, Kim 2389f95492SHeungJun, Kim #include <asm/arch/cpu.h> /* get chip and board defs */ 2489f95492SHeungJun, Kim 2589f95492SHeungJun, Kim #define CONFIG_ARCH_CPU_INIT 2689f95492SHeungJun, Kim #define CONFIG_DISPLAY_CPUINFO 2789f95492SHeungJun, Kim #define CONFIG_DISPLAY_BOARDINFO 2889f95492SHeungJun, Kim 29d0460b01SŁukasz Majewski #ifndef CONFIG_SYS_L2CACHE_OFF 30d0460b01SŁukasz Majewski #define CONFIG_SYS_L2_PL310 31d0460b01SŁukasz Majewski #define CONFIG_SYS_PL310_BASE 0x10502000 32d0460b01SŁukasz Majewski #endif 3389f95492SHeungJun, Kim 3489f95492SHeungJun, Kim #define CONFIG_SYS_SDRAM_BASE 0x40000000 3589f95492SHeungJun, Kim #define CONFIG_SYS_TEXT_BASE 0x63300000 3689f95492SHeungJun, Kim 3789f95492SHeungJun, Kim /* input clock of PLL: TRATS has 24MHz input clock at EXYNOS4210 */ 3889f95492SHeungJun, Kim #define CONFIG_SYS_CLK_FREQ_C210 24000000 395e46f83cSChander Kashyap #define CONFIG_SYS_CLK_FREQ CONFIG_SYS_CLK_FREQ_C210 4089f95492SHeungJun, Kim 4189f95492SHeungJun, Kim #define CONFIG_SETUP_MEMORY_TAGS 4289f95492SHeungJun, Kim #define CONFIG_CMDLINE_TAG 4389f95492SHeungJun, Kim #define CONFIG_REVISION_TAG 4489f95492SHeungJun, Kim #define CONFIG_CMDLINE_EDITING 4589f95492SHeungJun, Kim #define CONFIG_SKIP_LOWLEVEL_INIT 4689f95492SHeungJun, Kim #define CONFIG_BOARD_EARLY_INIT_F 4789f95492SHeungJun, Kim 4889f95492SHeungJun, Kim /* MACH_TYPE_TRATS macro will be removed once added to mach-types */ 4989f95492SHeungJun, Kim #define MACH_TYPE_TRATS 3928 5089f95492SHeungJun, Kim #define CONFIG_MACH_TYPE MACH_TYPE_TRATS 5189f95492SHeungJun, Kim 52*e96751daSLukasz Majewski #include <asm/sizes.h> 5389f95492SHeungJun, Kim /* Size of malloc() pool */ 54*e96751daSLukasz Majewski #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (80 * SZ_1M)) 5589f95492SHeungJun, Kim 5689f95492SHeungJun, Kim /* select serial console configuration */ 5789f95492SHeungJun, Kim #define CONFIG_SERIAL2 /* use SERIAL 2 */ 5889f95492SHeungJun, Kim #define CONFIG_BAUDRATE 115200 5989f95492SHeungJun, Kim 6089f95492SHeungJun, Kim /* MMC */ 6189f95492SHeungJun, Kim #define CONFIG_GENERIC_MMC 6289f95492SHeungJun, Kim #define CONFIG_MMC 637d2d58b4SJaehoon Chung #define CONFIG_S5P_SDHCI 647d2d58b4SJaehoon Chung #define CONFIG_SDHCI 65b09ed6e4SJaehoon Chung #define CONFIG_MMC_SDMA 6689f95492SHeungJun, Kim 6789f95492SHeungJun, Kim /* PWM */ 6889f95492SHeungJun, Kim #define CONFIG_PWM 6989f95492SHeungJun, Kim 7089f95492SHeungJun, Kim /* It should define before config_cmd_default.h */ 7189f95492SHeungJun, Kim #define CONFIG_SYS_NO_FLASH 7289f95492SHeungJun, Kim 7389f95492SHeungJun, Kim /* Command definition */ 7489f95492SHeungJun, Kim #include <config_cmd_default.h> 7589f95492SHeungJun, Kim 7689f95492SHeungJun, Kim #undef CONFIG_CMD_FPGA 7789f95492SHeungJun, Kim #undef CONFIG_CMD_MISC 7889f95492SHeungJun, Kim #undef CONFIG_CMD_NET 7989f95492SHeungJun, Kim #undef CONFIG_CMD_NFS 8089f95492SHeungJun, Kim #undef CONFIG_CMD_XIMG 8189f95492SHeungJun, Kim #undef CONFIG_CMD_CACHE 8289f95492SHeungJun, Kim #undef CONFIG_CMD_ONENAND 8389f95492SHeungJun, Kim #undef CONFIG_CMD_MTDPARTS 8489f95492SHeungJun, Kim #define CONFIG_CMD_MMC 8593a1ab57SLukasz Majewski #define CONFIG_CMD_DFU 869960d9a8SLukasz Majewski #define CONFIG_CMD_GPT 8735777e22SŁukasz Majewski #define CONFIG_CMD_SETEXPR 8893a1ab57SLukasz Majewski 8993a1ab57SLukasz Majewski /* FAT */ 9093a1ab57SLukasz Majewski #define CONFIG_CMD_FAT 9193a1ab57SLukasz Majewski #define CONFIG_FAT_WRITE 9293a1ab57SLukasz Majewski 9393a1ab57SLukasz Majewski /* USB Composite download gadget - g_dnl */ 9493a1ab57SLukasz Majewski #define CONFIG_USBDOWNLOAD_GADGET 95*e96751daSLukasz Majewski 96*e96751daSLukasz Majewski /* TIZEN THOR downloader support */ 97*e96751daSLukasz Majewski #define CONFIG_CMD_THOR_DOWNLOAD 98*e96751daSLukasz Majewski #define CONFIG_THOR_FUNCTION 99*e96751daSLukasz Majewski 100*e96751daSLukasz Majewski #define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_32M 10193a1ab57SLukasz Majewski #define CONFIG_DFU_FUNCTION 10293a1ab57SLukasz Majewski #define CONFIG_DFU_MMC 10393a1ab57SLukasz Majewski 10493a1ab57SLukasz Majewski /* USB Samsung's IDs */ 10593a1ab57SLukasz Majewski #define CONFIG_G_DNL_VENDOR_NUM 0x04E8 10693a1ab57SLukasz Majewski #define CONFIG_G_DNL_PRODUCT_NUM 0x6601 107*e96751daSLukasz Majewski #define CONFIG_G_DNL_THOR_VENDOR_NUM CONFIG_G_DNL_VENDOR_NUM 108*e96751daSLukasz Majewski #define CONFIG_G_DNL_THOR_PRODUCT_NUM 0x685D 10993a1ab57SLukasz Majewski #define CONFIG_G_DNL_MANUFACTURER "Samsung" 11089f95492SHeungJun, Kim 11189f95492SHeungJun, Kim #define CONFIG_BOOTDELAY 1 11289f95492SHeungJun, Kim #define CONFIG_ZERO_BOOTDELAY_CHECK 11389f95492SHeungJun, Kim #define CONFIG_BOOTARGS "Please use defined boot" 11489f95492SHeungJun, Kim #define CONFIG_BOOTCOMMAND "run mmcboot" 11589f95492SHeungJun, Kim 11689f95492SHeungJun, Kim #define CONFIG_DEFAULT_CONSOLE "console=ttySAC2,115200n8\0" 11789f95492SHeungJun, Kim #define CONFIG_BOOTBLOCK "10" 11889f95492SHeungJun, Kim #define CONFIG_ENV_COMMON_BOOT "${console} ${meminfo}" 11989f95492SHeungJun, Kim 1209960d9a8SLukasz Majewski /* Tizen - partitions definitions */ 1219960d9a8SLukasz Majewski #define PARTS_CSA "csa-mmc" 1229960d9a8SLukasz Majewski #define PARTS_BOOTLOADER "u-boot" 1239960d9a8SLukasz Majewski #define PARTS_BOOT "boot" 1249960d9a8SLukasz Majewski #define PARTS_ROOT "platform" 1259960d9a8SLukasz Majewski #define PARTS_DATA "data" 1269960d9a8SLukasz Majewski #define PARTS_CSC "csc" 1279960d9a8SLukasz Majewski #define PARTS_UMS "ums" 1289960d9a8SLukasz Majewski 1299960d9a8SLukasz Majewski #define PARTS_DEFAULT \ 1309960d9a8SLukasz Majewski "uuid_disk=${uuid_gpt_disk};" \ 1319960d9a8SLukasz Majewski "name="PARTS_CSA",size=8MiB,uuid=${uuid_gpt_"PARTS_CSA"};" \ 1329960d9a8SLukasz Majewski "name="PARTS_BOOTLOADER",size=60MiB," \ 1339960d9a8SLukasz Majewski "uuid=${uuid_gpt_"PARTS_BOOTLOADER"};" \ 1349960d9a8SLukasz Majewski "name="PARTS_BOOT",size=100MiB,uuid=${uuid_gpt_"PARTS_BOOT"};" \ 1359960d9a8SLukasz Majewski "name="PARTS_ROOT",size=1GiB,uuid=${uuid_gpt_"PARTS_ROOT"};" \ 1369960d9a8SLukasz Majewski "name="PARTS_DATA",size=3GiB,uuid=${uuid_gpt_"PARTS_DATA"};" \ 1379960d9a8SLukasz Majewski "name="PARTS_CSC",size=150MiB,uuid=${uuid_gpt_"PARTS_CSC"};" \ 1389960d9a8SLukasz Majewski "name="PARTS_UMS",size=-,uuid=${uuid_gpt_"PARTS_UMS"}\0" \ 1399960d9a8SLukasz Majewski 14093a1ab57SLukasz Majewski #define CONFIG_DFU_ALT \ 14193a1ab57SLukasz Majewski "u-boot mmc 80 400;" \ 142ba223bb2SArkadiusz Wlodarczyk "uImage ext4 0 2;" \ 143*e96751daSLukasz Majewski "exynos4210-trats.dtb ext4 0 2;" \ 144*e96751daSLukasz Majewski ""PARTS_ROOT" part 0 5\0" 14593a1ab57SLukasz Majewski 14689f95492SHeungJun, Kim #define CONFIG_ENV_OVERWRITE 14789f95492SHeungJun, Kim #define CONFIG_SYS_CONSOLE_INFO_QUIET 14889f95492SHeungJun, Kim #define CONFIG_SYS_CONSOLE_IS_IN_ENV 14989f95492SHeungJun, Kim 15089f95492SHeungJun, Kim #define CONFIG_EXTRA_ENV_SETTINGS \ 15189f95492SHeungJun, Kim "bootk=" \ 152ba223bb2SArkadiusz Wlodarczyk "run loaddtb; run loaduimage; bootm 0x40007FC0 - ${fdtaddr}\0" \ 15389f95492SHeungJun, Kim "updatemmc=" \ 15489f95492SHeungJun, Kim "mmc boot 0 1 1 1; mmc write 0 0x42008000 0 0x200;" \ 15589f95492SHeungJun, Kim "mmc boot 0 1 1 0\0" \ 15689f95492SHeungJun, Kim "updatebackup=" \ 15789f95492SHeungJun, Kim "mmc boot 0 1 1 2; mmc write 0 0x42100000 0 0x200;" \ 15889f95492SHeungJun, Kim "mmc boot 0 1 1 0\0" \ 15989f95492SHeungJun, Kim "updatebootb=" \ 16089f95492SHeungJun, Kim "mmc read 0 0x42100000 0x80 0x200; run updatebackup\0" \ 16189f95492SHeungJun, Kim "lpj=lpj=3981312\0" \ 16289f95492SHeungJun, Kim "nfsboot=" \ 16335777e22SŁukasz Majewski "setenv bootargs root=/dev/nfs rw " \ 16489f95492SHeungJun, Kim "nfsroot=${nfsroot},nolock,tcp " \ 16589f95492SHeungJun, Kim "ip=${ipaddr}:${serverip}:${gatewayip}:" \ 16689f95492SHeungJun, Kim "${netmask}:generic:usb0:off " CONFIG_ENV_COMMON_BOOT \ 16789f95492SHeungJun, Kim "; run bootk\0" \ 16889f95492SHeungJun, Kim "ramfsboot=" \ 16935777e22SŁukasz Majewski "setenv bootargs root=/dev/ram0 rw rootfstype=ext2 " \ 17089f95492SHeungJun, Kim "${console} ${meminfo} " \ 17189f95492SHeungJun, Kim "initrd=0x43000000,8M ramdisk=8192\0" \ 17289f95492SHeungJun, Kim "mmcboot=" \ 17335777e22SŁukasz Majewski "setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \ 17489f95492SHeungJun, Kim "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo}; " \ 175ba223bb2SArkadiusz Wlodarczyk "run loaddtb; run loaduimage; bootm 0x40007FC0 - ${fdtaddr}\0" \ 17635777e22SŁukasz Majewski "bootchart=setenv opts init=/sbin/bootchartd; run bootcmd\0" \ 17789f95492SHeungJun, Kim "boottrace=setenv opts initcall_debug; run bootcmd\0" \ 17889f95492SHeungJun, Kim "mmcoops=mmc read 0 0x40000000 0x40 8; md 0x40000000 0x400\0" \ 17989f95492SHeungJun, Kim "verify=n\0" \ 18089f95492SHeungJun, Kim "rootfstype=ext4\0" \ 18189f95492SHeungJun, Kim "console=" CONFIG_DEFAULT_CONSOLE \ 18289f95492SHeungJun, Kim "meminfo=crashkernel=32M@0x50000000\0" \ 18389f95492SHeungJun, Kim "nfsroot=/nfsroot/arm\0" \ 18489f95492SHeungJun, Kim "bootblock=" CONFIG_BOOTBLOCK "\0" \ 18535777e22SŁukasz Majewski "loaduimage=ext4load mmc ${mmcdev}:${mmcbootpart} 0x40007FC0 uImage\0" \ 186ba223bb2SArkadiusz Wlodarczyk "loaddtb=ext4load mmc ${mmcdev}:${mmcbootpart} ${fdtaddr} " \ 187ba223bb2SArkadiusz Wlodarczyk "${fdtfile}\0" \ 18889f95492SHeungJun, Kim "mmcdev=0\0" \ 18989f95492SHeungJun, Kim "mmcbootpart=2\0" \ 19035777e22SŁukasz Majewski "mmcrootpart=5\0" \ 19193a1ab57SLukasz Majewski "opts=always_resume=1\0" \ 1929960d9a8SLukasz Majewski "partitions=" PARTS_DEFAULT \ 19335777e22SŁukasz Majewski "dfu_alt_info=" CONFIG_DFU_ALT \ 19435777e22SŁukasz Majewski "spladdr=0x40000100\0" \ 19535777e22SŁukasz Majewski "splsize=0x200\0" \ 19635777e22SŁukasz Majewski "splfile=falcon.bin\0" \ 19735777e22SŁukasz Majewski "spl_export=" \ 19835777e22SŁukasz Majewski "setexpr spl_imgsize ${splsize} + 8 ;" \ 199dc993a65SPrzemyslaw Marczak "setenv spl_imgsize 0x${spl_imgsize};" \ 20035777e22SŁukasz Majewski "setexpr spl_imgaddr ${spladdr} - 8 ;" \ 20135777e22SŁukasz Majewski "setexpr spl_addr_tmp ${spladdr} - 4 ;" \ 20235777e22SŁukasz Majewski "mw.b ${spl_imgaddr} 0x00 ${spl_imgsize};run loaduimage;" \ 20335777e22SŁukasz Majewski "setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \ 20435777e22SŁukasz Majewski "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo};" \ 20535777e22SŁukasz Majewski "spl export atags 0x40007FC0;" \ 20635777e22SŁukasz Majewski "crc32 ${spladdr} ${splsize} ${spl_imgaddr};" \ 20735777e22SŁukasz Majewski "mw.l ${spl_addr_tmp} ${splsize};" \ 20835777e22SŁukasz Majewski "ext4write mmc ${mmcdev}:${mmcbootpart}" \ 20935777e22SŁukasz Majewski " /${splfile} ${spl_imgaddr} ${spl_imgsize};" \ 21035777e22SŁukasz Majewski "setenv spl_imgsize;" \ 21135777e22SŁukasz Majewski "setenv spl_imgaddr;" \ 212ba223bb2SArkadiusz Wlodarczyk "setenv spl_addr_tmp;\0" \ 213ba223bb2SArkadiusz Wlodarczyk "fdtaddr=40800000\0" \ 214ba223bb2SArkadiusz Wlodarczyk "fdtfile=exynos4210-trats.dtb\0" 215ba223bb2SArkadiusz Wlodarczyk 21689f95492SHeungJun, Kim 21789f95492SHeungJun, Kim /* Miscellaneous configurable options */ 21889f95492SHeungJun, Kim #define CONFIG_SYS_LONGHELP /* undef to save memory */ 21989f95492SHeungJun, Kim #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ 22089f95492SHeungJun, Kim #define CONFIG_SYS_PROMPT "TRATS # " 22189f95492SHeungJun, Kim #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 22289f95492SHeungJun, Kim #define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */ 22389f95492SHeungJun, Kim #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 22489f95492SHeungJun, Kim /* Boot Argument Buffer Size */ 22589f95492SHeungJun, Kim #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 22689f95492SHeungJun, Kim /* memtest works on */ 22789f95492SHeungJun, Kim #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE 22889f95492SHeungJun, Kim #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x5000000) 22989f95492SHeungJun, Kim #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x4800000) 23089f95492SHeungJun, Kim 23189f95492SHeungJun, Kim #define CONFIG_SYS_HZ 1000 23289f95492SHeungJun, Kim 233b5598578SPiotr Wilczek /* TRATS has 4 banks of DRAM */ 234b5598578SPiotr Wilczek #define CONFIG_NR_DRAM_BANKS 4 235b5598578SPiotr Wilczek #define SDRAM_BANK_SIZE (256UL << 20UL) /* 256 MB */ 236b5598578SPiotr Wilczek #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE 237b5598578SPiotr Wilczek #define PHYS_SDRAM_1_SIZE SDRAM_BANK_SIZE 238b5598578SPiotr Wilczek #define PHYS_SDRAM_2 (CONFIG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE) 239b5598578SPiotr Wilczek #define PHYS_SDRAM_2_SIZE SDRAM_BANK_SIZE 240b5598578SPiotr Wilczek #define PHYS_SDRAM_3 (CONFIG_SYS_SDRAM_BASE + (2 * SDRAM_BANK_SIZE)) 241b5598578SPiotr Wilczek #define PHYS_SDRAM_3_SIZE SDRAM_BANK_SIZE 242b5598578SPiotr Wilczek #define PHYS_SDRAM_4 (CONFIG_SYS_SDRAM_BASE + (3 * SDRAM_BANK_SIZE)) 243b5598578SPiotr Wilczek #define PHYS_SDRAM_4_SIZE SDRAM_BANK_SIZE 24489f95492SHeungJun, Kim 24589f95492SHeungJun, Kim #define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */ 24689f95492SHeungJun, Kim 24789f95492SHeungJun, Kim #define CONFIG_SYS_MONITOR_BASE 0x00000000 24889f95492SHeungJun, Kim #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */ 24989f95492SHeungJun, Kim 25089f95492SHeungJun, Kim #define CONFIG_ENV_IS_IN_MMC 25189f95492SHeungJun, Kim #define CONFIG_SYS_MMC_ENV_DEV 0 25289f95492SHeungJun, Kim #define CONFIG_ENV_SIZE 4096 25389f95492SHeungJun, Kim #define CONFIG_ENV_OFFSET ((32 - 4) << 10) /* 32KiB - 4KiB */ 25489f95492SHeungJun, Kim 25589f95492SHeungJun, Kim #define CONFIG_DOS_PARTITION 25635777e22SŁukasz Majewski #define CONFIG_EFI_PARTITION 25735777e22SŁukasz Majewski 25835777e22SŁukasz Majewski /* EXT4 */ 25935777e22SŁukasz Majewski #define CONFIG_CMD_EXT4 26035777e22SŁukasz Majewski #define CONFIG_CMD_EXT4_WRITE 26135777e22SŁukasz Majewski /* Falcon mode definitions */ 26235777e22SŁukasz Majewski #define CONFIG_CMD_SPL 26335777e22SŁukasz Majewski #define CONFIG_SYS_SPL_ARGS_ADDR PHYS_SDRAM_1 + 0x100 26489f95492SHeungJun, Kim 2659960d9a8SLukasz Majewski /* GPT */ 2669960d9a8SLukasz Majewski #define CONFIG_EFI_PARTITION 2679960d9a8SLukasz Majewski #define CONFIG_PARTITION_UUIDS 2689960d9a8SLukasz Majewski 26989f95492SHeungJun, Kim #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR - GENERATED_GBL_DATA_SIZE) 27089f95492SHeungJun, Kim #define CONFIG_SYS_CACHELINE_SIZE 32 27189f95492SHeungJun, Kim 272ea818dbbSHeiko Schocher #define CONFIG_SYS_I2C 273ea818dbbSHeiko Schocher #define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */ 274ea818dbbSHeiko Schocher #define CONFIG_SYS_I2C_SOFT_SPEED 50000 275ea818dbbSHeiko Schocher #define CONFIG_SYS_I2C_SOFT_SLAVE 0xFE 2762936df1fSŁukasz Majewski #define I2C_SOFT_DECLARATIONS2 2772936df1fSŁukasz Majewski #define CONFIG_SYS_I2C_SOFT_SPEED_2 50000 2782936df1fSŁukasz Majewski #define CONFIG_SYS_I2C_SOFT_SLAVE_2 0x7F 27989f95492SHeungJun, Kim #define CONFIG_SOFT_I2C_READ_REPEATED_START 280fd8dca83SŁukasz Majewski #define CONFIG_SYS_I2C_INIT_BOARD 28189f95492SHeungJun, Kim #define CONFIG_I2C_MULTI_BUS 282fd8dca83SŁukasz Majewski #define CONFIG_SOFT_I2C_MULTI_BUS 283fd8dca83SŁukasz Majewski #define CONFIG_SYS_MAX_I2C_BUS 15 284fd8dca83SŁukasz Majewski 285fd8dca83SŁukasz Majewski #include <asm/arch/gpio.h> 286fd8dca83SŁukasz Majewski 287fd8dca83SŁukasz Majewski /* I2C PMIC */ 288fd8dca83SŁukasz Majewski #define CONFIG_SOFT_I2C_I2C5_SCL exynos4_gpio_part1_get_nr(b, 7) 289fd8dca83SŁukasz Majewski #define CONFIG_SOFT_I2C_I2C5_SDA exynos4_gpio_part1_get_nr(b, 6) 290fd8dca83SŁukasz Majewski 291fd8dca83SŁukasz Majewski /* I2C FG */ 292fd8dca83SŁukasz Majewski #define CONFIG_SOFT_I2C_I2C9_SCL exynos4_gpio_part2_get_nr(y4, 1) 293fd8dca83SŁukasz Majewski #define CONFIG_SOFT_I2C_I2C9_SDA exynos4_gpio_part2_get_nr(y4, 0) 294fd8dca83SŁukasz Majewski 295fd8dca83SŁukasz Majewski #define CONFIG_SOFT_I2C_GPIO_SCL get_multi_scl_pin() 296fd8dca83SŁukasz Majewski #define CONFIG_SOFT_I2C_GPIO_SDA get_multi_sda_pin() 297fd8dca83SŁukasz Majewski #define I2C_INIT multi_i2c_init() 29889f95492SHeungJun, Kim 299be3b51aaSŁukasz Majewski #define CONFIG_POWER 300be3b51aaSŁukasz Majewski #define CONFIG_POWER_I2C 301be3b51aaSŁukasz Majewski #define CONFIG_POWER_MAX8997 30289f95492SHeungJun, Kim 3035a77358cSŁukasz Majewski #define CONFIG_POWER_FG 3045a77358cSŁukasz Majewski #define CONFIG_POWER_FG_MAX17042 3057dcda99dSŁukasz Majewski #define CONFIG_POWER_MUIC 3067dcda99dSŁukasz Majewski #define CONFIG_POWER_MUIC_MAX8997 30761365ffcSŁukasz Majewski #define CONFIG_POWER_BATTERY 30861365ffcSŁukasz Majewski #define CONFIG_POWER_BATTERY_TRATS 30989f95492SHeungJun, Kim #define CONFIG_USB_GADGET 31089f95492SHeungJun, Kim #define CONFIG_USB_GADGET_S3C_UDC_OTG 31189f95492SHeungJun, Kim #define CONFIG_USB_GADGET_DUALSPEED 31293a1ab57SLukasz Majewski #define CONFIG_USB_GADGET_VBUS_DRAW 2 31389f95492SHeungJun, Kim 31451b1cd6dSDonghwa Lee /* LCD */ 31551b1cd6dSDonghwa Lee #define CONFIG_EXYNOS_FB 31651b1cd6dSDonghwa Lee #define CONFIG_LCD 31790464971SDonghwa Lee #define CONFIG_CMD_BMP 31890464971SDonghwa Lee #define CONFIG_BMP_32BPP 31951b1cd6dSDonghwa Lee #define CONFIG_FB_ADDR 0x52504000 32051b1cd6dSDonghwa Lee #define CONFIG_S6E8AX0 32151b1cd6dSDonghwa Lee #define CONFIG_EXYNOS_MIPI_DSIM 32290464971SDonghwa Lee #define CONFIG_VIDEO_BMP_GZIP 32390464971SDonghwa Lee #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((500 * 120 * 4) + (1 << 12)) 32451b1cd6dSDonghwa Lee 32583301b4fSLukasz Majewski #define CONFIG_CMD_USB_MASS_STORAGE 32683301b4fSLukasz Majewski #if defined(CONFIG_CMD_USB_MASS_STORAGE) 32783301b4fSLukasz Majewski #define CONFIG_USB_GADGET_MASS_STORAGE 32883301b4fSLukasz Majewski #endif 32983301b4fSLukasz Majewski 330ba223bb2SArkadiusz Wlodarczyk /* Pass open firmware flat tree */ 331ba223bb2SArkadiusz Wlodarczyk #define CONFIG_OF_LIBFDT 1 332ba223bb2SArkadiusz Wlodarczyk 33389f95492SHeungJun, Kim #endif /* __CONFIG_H */ 334