189f95492SHeungJun, Kim /* 289f95492SHeungJun, Kim * Copyright (C) 2011 Samsung Electronics 389f95492SHeungJun, Kim * Heungjun Kim <riverful.kim@samsung.com> 489f95492SHeungJun, Kim * 589f95492SHeungJun, Kim * Configuation settings for the SAMSUNG TRATS (EXYNOS4210) board. 689f95492SHeungJun, Kim * 789f95492SHeungJun, Kim * See file CREDITS for list of people who contributed to this 889f95492SHeungJun, Kim * project. 989f95492SHeungJun, Kim * 1089f95492SHeungJun, Kim * This program is free software; you can redistribute it and/or 1189f95492SHeungJun, Kim * modify it under the terms of the GNU General Public License as 1289f95492SHeungJun, Kim * published by the Free Software Foundation; either version 2 of 1389f95492SHeungJun, Kim * the License, or (at your option) any later version. 1489f95492SHeungJun, Kim * 1589f95492SHeungJun, Kim * This program is distributed in the hope that it will be useful, 1689f95492SHeungJun, Kim * but WITHOUT ANY WARRANTY; without even the implied warranty of 1789f95492SHeungJun, Kim * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 1889f95492SHeungJun, Kim * GNU General Public License for more details. 1989f95492SHeungJun, Kim * 2089f95492SHeungJun, Kim * You should have received a copy of the GNU General Public License 2189f95492SHeungJun, Kim * along with this program; if not, write to the Free Software 2289f95492SHeungJun, Kim * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 2389f95492SHeungJun, Kim * MA 02111-1307 USA 2489f95492SHeungJun, Kim */ 2589f95492SHeungJun, Kim 2689f95492SHeungJun, Kim #ifndef __CONFIG_H 2789f95492SHeungJun, Kim #define __CONFIG_H 2889f95492SHeungJun, Kim 2989f95492SHeungJun, Kim /* 3089f95492SHeungJun, Kim * High Level Configuration Options 3189f95492SHeungJun, Kim * (easy to change) 3289f95492SHeungJun, Kim */ 3389f95492SHeungJun, Kim #define CONFIG_SAMSUNG /* in a SAMSUNG core */ 3489f95492SHeungJun, Kim #define CONFIG_S5P /* which is in a S5P Family */ 3589f95492SHeungJun, Kim #define CONFIG_EXYNOS4210 /* which is in a EXYNOS4210 */ 3689f95492SHeungJun, Kim #define CONFIG_TRATS /* working with TRATS */ 3789f95492SHeungJun, Kim 3889f95492SHeungJun, Kim #include <asm/arch/cpu.h> /* get chip and board defs */ 3989f95492SHeungJun, Kim 4089f95492SHeungJun, Kim #define CONFIG_ARCH_CPU_INIT 4189f95492SHeungJun, Kim #define CONFIG_DISPLAY_CPUINFO 4289f95492SHeungJun, Kim #define CONFIG_DISPLAY_BOARDINFO 4389f95492SHeungJun, Kim 4489f95492SHeungJun, Kim /* Keep L2 Cache Disabled */ 4589f95492SHeungJun, Kim #define CONFIG_SYS_L2CACHE_OFF 4689f95492SHeungJun, Kim 4789f95492SHeungJun, Kim #define CONFIG_SYS_SDRAM_BASE 0x40000000 4889f95492SHeungJun, Kim #define CONFIG_SYS_TEXT_BASE 0x63300000 4989f95492SHeungJun, Kim 5089f95492SHeungJun, Kim /* input clock of PLL: TRATS has 24MHz input clock at EXYNOS4210 */ 5189f95492SHeungJun, Kim #define CONFIG_SYS_CLK_FREQ_C210 24000000 52*5e46f83cSChander Kashyap #define CONFIG_SYS_CLK_FREQ CONFIG_SYS_CLK_FREQ_C210 5389f95492SHeungJun, Kim 5489f95492SHeungJun, Kim #define CONFIG_SETUP_MEMORY_TAGS 5589f95492SHeungJun, Kim #define CONFIG_CMDLINE_TAG 5689f95492SHeungJun, Kim #define CONFIG_INITRD_TAG 5789f95492SHeungJun, Kim #define CONFIG_REVISION_TAG 5889f95492SHeungJun, Kim #define CONFIG_CMDLINE_EDITING 5989f95492SHeungJun, Kim #define CONFIG_SKIP_LOWLEVEL_INIT 6089f95492SHeungJun, Kim #define CONFIG_BOARD_EARLY_INIT_F 6189f95492SHeungJun, Kim 6289f95492SHeungJun, Kim /* MACH_TYPE_TRATS macro will be removed once added to mach-types */ 6389f95492SHeungJun, Kim #define MACH_TYPE_TRATS 3928 6489f95492SHeungJun, Kim #define CONFIG_MACH_TYPE MACH_TYPE_TRATS 6589f95492SHeungJun, Kim 6689f95492SHeungJun, Kim /* Size of malloc() pool */ 6789f95492SHeungJun, Kim #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (1 << 20)) 6889f95492SHeungJun, Kim 6989f95492SHeungJun, Kim /* select serial console configuration */ 7089f95492SHeungJun, Kim #define CONFIG_SERIAL_MULTI 7189f95492SHeungJun, Kim #define CONFIG_SERIAL2 /* use SERIAL 2 */ 7289f95492SHeungJun, Kim #define CONFIG_BAUDRATE 115200 7389f95492SHeungJun, Kim 7489f95492SHeungJun, Kim /* MMC */ 7589f95492SHeungJun, Kim #define CONFIG_GENERIC_MMC 7689f95492SHeungJun, Kim #define CONFIG_MMC 7789f95492SHeungJun, Kim #define CONFIG_S5P_MMC 7889f95492SHeungJun, Kim 7989f95492SHeungJun, Kim /* PWM */ 8089f95492SHeungJun, Kim #define CONFIG_PWM 8189f95492SHeungJun, Kim 8289f95492SHeungJun, Kim /* It should define before config_cmd_default.h */ 8389f95492SHeungJun, Kim #define CONFIG_SYS_NO_FLASH 8489f95492SHeungJun, Kim 8589f95492SHeungJun, Kim /* Command definition */ 8689f95492SHeungJun, Kim #include <config_cmd_default.h> 8789f95492SHeungJun, Kim 8889f95492SHeungJun, Kim #undef CONFIG_CMD_FPGA 8989f95492SHeungJun, Kim #undef CONFIG_CMD_MISC 9089f95492SHeungJun, Kim #undef CONFIG_CMD_NET 9189f95492SHeungJun, Kim #undef CONFIG_CMD_NFS 9289f95492SHeungJun, Kim #undef CONFIG_CMD_XIMG 9389f95492SHeungJun, Kim #undef CONFIG_CMD_CACHE 9489f95492SHeungJun, Kim #undef CONFIG_CMD_ONENAND 9589f95492SHeungJun, Kim #undef CONFIG_CMD_MTDPARTS 9689f95492SHeungJun, Kim #define CONFIG_CMD_MMC 9789f95492SHeungJun, Kim 9889f95492SHeungJun, Kim #define CONFIG_BOOTDELAY 1 9989f95492SHeungJun, Kim #define CONFIG_ZERO_BOOTDELAY_CHECK 10089f95492SHeungJun, Kim #define CONFIG_BOOTARGS "Please use defined boot" 10189f95492SHeungJun, Kim #define CONFIG_BOOTCOMMAND "run mmcboot" 10289f95492SHeungJun, Kim 10389f95492SHeungJun, Kim #define CONFIG_DEFAULT_CONSOLE "console=ttySAC2,115200n8\0" 10489f95492SHeungJun, Kim #define CONFIG_BOOTBLOCK "10" 10589f95492SHeungJun, Kim #define CONFIG_ENV_COMMON_BOOT "${console} ${meminfo}" 10689f95492SHeungJun, Kim 10789f95492SHeungJun, Kim #define CONFIG_ENV_OVERWRITE 10889f95492SHeungJun, Kim #define CONFIG_SYS_CONSOLE_INFO_QUIET 10989f95492SHeungJun, Kim #define CONFIG_SYS_CONSOLE_IS_IN_ENV 11089f95492SHeungJun, Kim 11189f95492SHeungJun, Kim #define CONFIG_EXTRA_ENV_SETTINGS \ 11289f95492SHeungJun, Kim "bootk=" \ 11389f95492SHeungJun, Kim "run loaduimage; bootm 0x40007FC0\0" \ 11489f95492SHeungJun, Kim "updatemmc=" \ 11589f95492SHeungJun, Kim "mmc boot 0 1 1 1; mmc write 0 0x42008000 0 0x200;" \ 11689f95492SHeungJun, Kim "mmc boot 0 1 1 0\0" \ 11789f95492SHeungJun, Kim "updatebackup=" \ 11889f95492SHeungJun, Kim "mmc boot 0 1 1 2; mmc write 0 0x42100000 0 0x200;" \ 11989f95492SHeungJun, Kim "mmc boot 0 1 1 0\0" \ 12089f95492SHeungJun, Kim "updatebootb=" \ 12189f95492SHeungJun, Kim "mmc read 0 0x42100000 0x80 0x200; run updatebackup\0" \ 12289f95492SHeungJun, Kim "lpj=lpj=3981312\0" \ 12389f95492SHeungJun, Kim "nfsboot=" \ 12489f95492SHeungJun, Kim "set bootargs root=/dev/nfs rw " \ 12589f95492SHeungJun, Kim "nfsroot=${nfsroot},nolock,tcp " \ 12689f95492SHeungJun, Kim "ip=${ipaddr}:${serverip}:${gatewayip}:" \ 12789f95492SHeungJun, Kim "${netmask}:generic:usb0:off " CONFIG_ENV_COMMON_BOOT \ 12889f95492SHeungJun, Kim "; run bootk\0" \ 12989f95492SHeungJun, Kim "ramfsboot=" \ 13089f95492SHeungJun, Kim "set bootargs root=/dev/ram0 rw rootfstype=ext2 " \ 13189f95492SHeungJun, Kim "${console} ${meminfo} " \ 13289f95492SHeungJun, Kim "initrd=0x43000000,8M ramdisk=8192\0" \ 13389f95492SHeungJun, Kim "mmcboot=" \ 13489f95492SHeungJun, Kim "set bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \ 13589f95492SHeungJun, Kim "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo}; " \ 13689f95492SHeungJun, Kim "run loaduimage; bootm 0x40007FC0\0" \ 13789f95492SHeungJun, Kim "bootchart=set opts init=/sbin/bootchartd; run bootcmd\0" \ 13889f95492SHeungJun, Kim "boottrace=setenv opts initcall_debug; run bootcmd\0" \ 13989f95492SHeungJun, Kim "mmcoops=mmc read 0 0x40000000 0x40 8; md 0x40000000 0x400\0" \ 14089f95492SHeungJun, Kim "verify=n\0" \ 14189f95492SHeungJun, Kim "rootfstype=ext4\0" \ 14289f95492SHeungJun, Kim "console=" CONFIG_DEFAULT_CONSOLE \ 14389f95492SHeungJun, Kim "meminfo=crashkernel=32M@0x50000000\0" \ 14489f95492SHeungJun, Kim "nfsroot=/nfsroot/arm\0" \ 14589f95492SHeungJun, Kim "bootblock=" CONFIG_BOOTBLOCK "\0" \ 14689f95492SHeungJun, Kim "mmcdev=0\0" \ 14789f95492SHeungJun, Kim "mmcbootpart=2\0" \ 14889f95492SHeungJun, Kim "mmcrootpart=3\0" \ 14989f95492SHeungJun, Kim "opts=always_resume=1" 15089f95492SHeungJun, Kim 15189f95492SHeungJun, Kim /* Miscellaneous configurable options */ 15289f95492SHeungJun, Kim #define CONFIG_SYS_LONGHELP /* undef to save memory */ 15389f95492SHeungJun, Kim #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ 15489f95492SHeungJun, Kim #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " 15589f95492SHeungJun, Kim #define CONFIG_SYS_PROMPT "TRATS # " 15689f95492SHeungJun, Kim #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 15789f95492SHeungJun, Kim #define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */ 15889f95492SHeungJun, Kim #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 15989f95492SHeungJun, Kim /* Boot Argument Buffer Size */ 16089f95492SHeungJun, Kim #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 16189f95492SHeungJun, Kim /* memtest works on */ 16289f95492SHeungJun, Kim #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE 16389f95492SHeungJun, Kim #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x5000000) 16489f95492SHeungJun, Kim #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x4800000) 16589f95492SHeungJun, Kim 16689f95492SHeungJun, Kim #define CONFIG_SYS_HZ 1000 16789f95492SHeungJun, Kim 16889f95492SHeungJun, Kim /* valid baudrates */ 16989f95492SHeungJun, Kim #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } 17089f95492SHeungJun, Kim 17189f95492SHeungJun, Kim /* Stack sizes */ 17289f95492SHeungJun, Kim #define CONFIG_STACKSIZE (256 << 10) /* regular stack 256KB */ 17389f95492SHeungJun, Kim 17489f95492SHeungJun, Kim /* TRATS has 2 banks of DRAM */ 17589f95492SHeungJun, Kim #define CONFIG_NR_DRAM_BANKS 2 17689f95492SHeungJun, Kim #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE /* LDDDR2 DMC 0 */ 17789f95492SHeungJun, Kim #define PHYS_SDRAM_1_SIZE (256 << 20) /* 256 MB in CS 0 */ 17889f95492SHeungJun, Kim #define PHYS_SDRAM_2 0x50000000 /* LPDDR2 DMC 1 */ 17989f95492SHeungJun, Kim #define PHYS_SDRAM_2_SIZE (256 << 20) /* 256 MB in CS 0 */ 18089f95492SHeungJun, Kim 18189f95492SHeungJun, Kim #define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */ 18289f95492SHeungJun, Kim 18389f95492SHeungJun, Kim #define CONFIG_SYS_MONITOR_BASE 0x00000000 18489f95492SHeungJun, Kim #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */ 18589f95492SHeungJun, Kim 18689f95492SHeungJun, Kim #define CONFIG_ENV_IS_IN_MMC 18789f95492SHeungJun, Kim #define CONFIG_SYS_MMC_ENV_DEV 0 18889f95492SHeungJun, Kim #define CONFIG_ENV_SIZE 4096 18989f95492SHeungJun, Kim #define CONFIG_ENV_OFFSET ((32 - 4) << 10) /* 32KiB - 4KiB */ 19089f95492SHeungJun, Kim 19189f95492SHeungJun, Kim #define CONFIG_DOS_PARTITION 19289f95492SHeungJun, Kim 19389f95492SHeungJun, Kim #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR - GENERATED_GBL_DATA_SIZE) 19489f95492SHeungJun, Kim #define CONFIG_SYS_CACHELINE_SIZE 32 19589f95492SHeungJun, Kim 19689f95492SHeungJun, Kim #include <asm/arch/gpio.h> 19789f95492SHeungJun, Kim /* 19889f95492SHeungJun, Kim * I2C Settings 19989f95492SHeungJun, Kim */ 20089f95492SHeungJun, Kim #define CONFIG_SOFT_I2C_GPIO_SCL exynos4_gpio_part1_get_nr(b, 7) 20189f95492SHeungJun, Kim #define CONFIG_SOFT_I2C_GPIO_SDA exynos4_gpio_part1_get_nr(b, 6) 20289f95492SHeungJun, Kim 20389f95492SHeungJun, Kim #define CONFIG_SOFT_I2C 20489f95492SHeungJun, Kim #define CONFIG_SOFT_I2C_READ_REPEATED_START 20589f95492SHeungJun, Kim #define CONFIG_SYS_I2C_SPEED 50000 20689f95492SHeungJun, Kim #define CONFIG_I2C_MULTI_BUS 20789f95492SHeungJun, Kim #define CONFIG_SYS_MAX_I2C_BUS 7 20889f95492SHeungJun, Kim 20989f95492SHeungJun, Kim #define CONFIG_PMIC 21089f95492SHeungJun, Kim #define CONFIG_PMIC_I2C 21189f95492SHeungJun, Kim #define CONFIG_PMIC_MAX8998 21289f95492SHeungJun, Kim 21389f95492SHeungJun, Kim #define CONFIG_USB_GADGET 21489f95492SHeungJun, Kim #define CONFIG_USB_GADGET_S3C_UDC_OTG 21589f95492SHeungJun, Kim #define CONFIG_USB_GADGET_DUALSPEED 21689f95492SHeungJun, Kim 21789f95492SHeungJun, Kim #endif /* __CONFIG_H */ 218