189f95492SHeungJun, Kim /* 289f95492SHeungJun, Kim * Copyright (C) 2011 Samsung Electronics 389f95492SHeungJun, Kim * Heungjun Kim <riverful.kim@samsung.com> 489f95492SHeungJun, Kim * 589f95492SHeungJun, Kim * Configuation settings for the SAMSUNG TRATS (EXYNOS4210) board. 689f95492SHeungJun, Kim * 7*1a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+ 889f95492SHeungJun, Kim */ 989f95492SHeungJun, Kim 1089f95492SHeungJun, Kim #ifndef __CONFIG_H 1189f95492SHeungJun, Kim #define __CONFIG_H 1289f95492SHeungJun, Kim 1389f95492SHeungJun, Kim /* 1489f95492SHeungJun, Kim * High Level Configuration Options 1589f95492SHeungJun, Kim * (easy to change) 1689f95492SHeungJun, Kim */ 1789f95492SHeungJun, Kim #define CONFIG_SAMSUNG /* in a SAMSUNG core */ 1889f95492SHeungJun, Kim #define CONFIG_S5P /* which is in a S5P Family */ 1989f95492SHeungJun, Kim #define CONFIG_EXYNOS4210 /* which is in a EXYNOS4210 */ 2089f95492SHeungJun, Kim #define CONFIG_TRATS /* working with TRATS */ 2190464971SDonghwa Lee #define CONFIG_TIZEN /* TIZEN lib */ 2289f95492SHeungJun, Kim 2389f95492SHeungJun, Kim #include <asm/arch/cpu.h> /* get chip and board defs */ 2489f95492SHeungJun, Kim 2589f95492SHeungJun, Kim #define CONFIG_ARCH_CPU_INIT 2689f95492SHeungJun, Kim #define CONFIG_DISPLAY_CPUINFO 2789f95492SHeungJun, Kim #define CONFIG_DISPLAY_BOARDINFO 2889f95492SHeungJun, Kim 29d0460b01SŁukasz Majewski #ifndef CONFIG_SYS_L2CACHE_OFF 30d0460b01SŁukasz Majewski #define CONFIG_SYS_L2_PL310 31d0460b01SŁukasz Majewski #define CONFIG_SYS_PL310_BASE 0x10502000 32d0460b01SŁukasz Majewski #endif 3389f95492SHeungJun, Kim 3489f95492SHeungJun, Kim #define CONFIG_SYS_SDRAM_BASE 0x40000000 3589f95492SHeungJun, Kim #define CONFIG_SYS_TEXT_BASE 0x63300000 3689f95492SHeungJun, Kim 3789f95492SHeungJun, Kim /* input clock of PLL: TRATS has 24MHz input clock at EXYNOS4210 */ 3889f95492SHeungJun, Kim #define CONFIG_SYS_CLK_FREQ_C210 24000000 395e46f83cSChander Kashyap #define CONFIG_SYS_CLK_FREQ CONFIG_SYS_CLK_FREQ_C210 4089f95492SHeungJun, Kim 4189f95492SHeungJun, Kim #define CONFIG_SETUP_MEMORY_TAGS 4289f95492SHeungJun, Kim #define CONFIG_CMDLINE_TAG 4389f95492SHeungJun, Kim #define CONFIG_REVISION_TAG 4489f95492SHeungJun, Kim #define CONFIG_CMDLINE_EDITING 4589f95492SHeungJun, Kim #define CONFIG_SKIP_LOWLEVEL_INIT 4689f95492SHeungJun, Kim #define CONFIG_BOARD_EARLY_INIT_F 4789f95492SHeungJun, Kim 4889f95492SHeungJun, Kim /* MACH_TYPE_TRATS macro will be removed once added to mach-types */ 4989f95492SHeungJun, Kim #define MACH_TYPE_TRATS 3928 5089f95492SHeungJun, Kim #define CONFIG_MACH_TYPE MACH_TYPE_TRATS 5189f95492SHeungJun, Kim 5289f95492SHeungJun, Kim /* Size of malloc() pool */ 539199fce2SŁukasz Majewski #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (16 << 20)) 5489f95492SHeungJun, Kim 5589f95492SHeungJun, Kim /* select serial console configuration */ 5689f95492SHeungJun, Kim #define CONFIG_SERIAL2 /* use SERIAL 2 */ 5789f95492SHeungJun, Kim #define CONFIG_BAUDRATE 115200 5889f95492SHeungJun, Kim 5989f95492SHeungJun, Kim /* MMC */ 6089f95492SHeungJun, Kim #define CONFIG_GENERIC_MMC 6189f95492SHeungJun, Kim #define CONFIG_MMC 627d2d58b4SJaehoon Chung #define CONFIG_S5P_SDHCI 637d2d58b4SJaehoon Chung #define CONFIG_SDHCI 64b09ed6e4SJaehoon Chung #define CONFIG_MMC_SDMA 6589f95492SHeungJun, Kim 6689f95492SHeungJun, Kim /* PWM */ 6789f95492SHeungJun, Kim #define CONFIG_PWM 6889f95492SHeungJun, Kim 6989f95492SHeungJun, Kim /* It should define before config_cmd_default.h */ 7089f95492SHeungJun, Kim #define CONFIG_SYS_NO_FLASH 7189f95492SHeungJun, Kim 7289f95492SHeungJun, Kim /* Command definition */ 7389f95492SHeungJun, Kim #include <config_cmd_default.h> 7489f95492SHeungJun, Kim 7589f95492SHeungJun, Kim #undef CONFIG_CMD_FPGA 7689f95492SHeungJun, Kim #undef CONFIG_CMD_MISC 7789f95492SHeungJun, Kim #undef CONFIG_CMD_NET 7889f95492SHeungJun, Kim #undef CONFIG_CMD_NFS 7989f95492SHeungJun, Kim #undef CONFIG_CMD_XIMG 8089f95492SHeungJun, Kim #undef CONFIG_CMD_CACHE 8189f95492SHeungJun, Kim #undef CONFIG_CMD_ONENAND 8289f95492SHeungJun, Kim #undef CONFIG_CMD_MTDPARTS 8389f95492SHeungJun, Kim #define CONFIG_CMD_MMC 8493a1ab57SLukasz Majewski #define CONFIG_CMD_DFU 859960d9a8SLukasz Majewski #define CONFIG_CMD_GPT 8635777e22SŁukasz Majewski #define CONFIG_CMD_SETEXPR 8793a1ab57SLukasz Majewski 8893a1ab57SLukasz Majewski /* FAT */ 8993a1ab57SLukasz Majewski #define CONFIG_CMD_FAT 9093a1ab57SLukasz Majewski #define CONFIG_FAT_WRITE 9193a1ab57SLukasz Majewski 9293a1ab57SLukasz Majewski /* USB Composite download gadget - g_dnl */ 9393a1ab57SLukasz Majewski #define CONFIG_USBDOWNLOAD_GADGET 9493a1ab57SLukasz Majewski #define CONFIG_DFU_FUNCTION 9593a1ab57SLukasz Majewski #define CONFIG_DFU_MMC 9693a1ab57SLukasz Majewski 9793a1ab57SLukasz Majewski /* USB Samsung's IDs */ 9893a1ab57SLukasz Majewski #define CONFIG_G_DNL_VENDOR_NUM 0x04E8 9993a1ab57SLukasz Majewski #define CONFIG_G_DNL_PRODUCT_NUM 0x6601 10093a1ab57SLukasz Majewski #define CONFIG_G_DNL_MANUFACTURER "Samsung" 10189f95492SHeungJun, Kim 10289f95492SHeungJun, Kim #define CONFIG_BOOTDELAY 1 10389f95492SHeungJun, Kim #define CONFIG_ZERO_BOOTDELAY_CHECK 10489f95492SHeungJun, Kim #define CONFIG_BOOTARGS "Please use defined boot" 10589f95492SHeungJun, Kim #define CONFIG_BOOTCOMMAND "run mmcboot" 10689f95492SHeungJun, Kim 10789f95492SHeungJun, Kim #define CONFIG_DEFAULT_CONSOLE "console=ttySAC2,115200n8\0" 10889f95492SHeungJun, Kim #define CONFIG_BOOTBLOCK "10" 10989f95492SHeungJun, Kim #define CONFIG_ENV_COMMON_BOOT "${console} ${meminfo}" 11089f95492SHeungJun, Kim 1119960d9a8SLukasz Majewski /* Tizen - partitions definitions */ 1129960d9a8SLukasz Majewski #define PARTS_CSA "csa-mmc" 1139960d9a8SLukasz Majewski #define PARTS_BOOTLOADER "u-boot" 1149960d9a8SLukasz Majewski #define PARTS_BOOT "boot" 1159960d9a8SLukasz Majewski #define PARTS_ROOT "platform" 1169960d9a8SLukasz Majewski #define PARTS_DATA "data" 1179960d9a8SLukasz Majewski #define PARTS_CSC "csc" 1189960d9a8SLukasz Majewski #define PARTS_UMS "ums" 1199960d9a8SLukasz Majewski 1209960d9a8SLukasz Majewski #define PARTS_DEFAULT \ 1219960d9a8SLukasz Majewski "uuid_disk=${uuid_gpt_disk};" \ 1229960d9a8SLukasz Majewski "name="PARTS_CSA",size=8MiB,uuid=${uuid_gpt_"PARTS_CSA"};" \ 1239960d9a8SLukasz Majewski "name="PARTS_BOOTLOADER",size=60MiB," \ 1249960d9a8SLukasz Majewski "uuid=${uuid_gpt_"PARTS_BOOTLOADER"};" \ 1259960d9a8SLukasz Majewski "name="PARTS_BOOT",size=100MiB,uuid=${uuid_gpt_"PARTS_BOOT"};" \ 1269960d9a8SLukasz Majewski "name="PARTS_ROOT",size=1GiB,uuid=${uuid_gpt_"PARTS_ROOT"};" \ 1279960d9a8SLukasz Majewski "name="PARTS_DATA",size=3GiB,uuid=${uuid_gpt_"PARTS_DATA"};" \ 1289960d9a8SLukasz Majewski "name="PARTS_CSC",size=150MiB,uuid=${uuid_gpt_"PARTS_CSC"};" \ 1299960d9a8SLukasz Majewski "name="PARTS_UMS",size=-,uuid=${uuid_gpt_"PARTS_UMS"}\0" \ 1309960d9a8SLukasz Majewski 13193a1ab57SLukasz Majewski #define CONFIG_DFU_ALT \ 13293a1ab57SLukasz Majewski "u-boot mmc 80 400;" \ 133ba223bb2SArkadiusz Wlodarczyk "uImage ext4 0 2;" \ 134ba223bb2SArkadiusz Wlodarczyk "exynos4210-trats.dtb ext4 0 2\0" 13593a1ab57SLukasz Majewski 13689f95492SHeungJun, Kim #define CONFIG_ENV_OVERWRITE 13789f95492SHeungJun, Kim #define CONFIG_SYS_CONSOLE_INFO_QUIET 13889f95492SHeungJun, Kim #define CONFIG_SYS_CONSOLE_IS_IN_ENV 13989f95492SHeungJun, Kim 14089f95492SHeungJun, Kim #define CONFIG_EXTRA_ENV_SETTINGS \ 14189f95492SHeungJun, Kim "bootk=" \ 142ba223bb2SArkadiusz Wlodarczyk "run loaddtb; run loaduimage; bootm 0x40007FC0 - ${fdtaddr}\0" \ 14389f95492SHeungJun, Kim "updatemmc=" \ 14489f95492SHeungJun, Kim "mmc boot 0 1 1 1; mmc write 0 0x42008000 0 0x200;" \ 14589f95492SHeungJun, Kim "mmc boot 0 1 1 0\0" \ 14689f95492SHeungJun, Kim "updatebackup=" \ 14789f95492SHeungJun, Kim "mmc boot 0 1 1 2; mmc write 0 0x42100000 0 0x200;" \ 14889f95492SHeungJun, Kim "mmc boot 0 1 1 0\0" \ 14989f95492SHeungJun, Kim "updatebootb=" \ 15089f95492SHeungJun, Kim "mmc read 0 0x42100000 0x80 0x200; run updatebackup\0" \ 15189f95492SHeungJun, Kim "lpj=lpj=3981312\0" \ 15289f95492SHeungJun, Kim "nfsboot=" \ 15335777e22SŁukasz Majewski "setenv bootargs root=/dev/nfs rw " \ 15489f95492SHeungJun, Kim "nfsroot=${nfsroot},nolock,tcp " \ 15589f95492SHeungJun, Kim "ip=${ipaddr}:${serverip}:${gatewayip}:" \ 15689f95492SHeungJun, Kim "${netmask}:generic:usb0:off " CONFIG_ENV_COMMON_BOOT \ 15789f95492SHeungJun, Kim "; run bootk\0" \ 15889f95492SHeungJun, Kim "ramfsboot=" \ 15935777e22SŁukasz Majewski "setenv bootargs root=/dev/ram0 rw rootfstype=ext2 " \ 16089f95492SHeungJun, Kim "${console} ${meminfo} " \ 16189f95492SHeungJun, Kim "initrd=0x43000000,8M ramdisk=8192\0" \ 16289f95492SHeungJun, Kim "mmcboot=" \ 16335777e22SŁukasz Majewski "setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \ 16489f95492SHeungJun, Kim "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo}; " \ 165ba223bb2SArkadiusz Wlodarczyk "run loaddtb; run loaduimage; bootm 0x40007FC0 - ${fdtaddr}\0" \ 16635777e22SŁukasz Majewski "bootchart=setenv opts init=/sbin/bootchartd; run bootcmd\0" \ 16789f95492SHeungJun, Kim "boottrace=setenv opts initcall_debug; run bootcmd\0" \ 16889f95492SHeungJun, Kim "mmcoops=mmc read 0 0x40000000 0x40 8; md 0x40000000 0x400\0" \ 16989f95492SHeungJun, Kim "verify=n\0" \ 17089f95492SHeungJun, Kim "rootfstype=ext4\0" \ 17189f95492SHeungJun, Kim "console=" CONFIG_DEFAULT_CONSOLE \ 17289f95492SHeungJun, Kim "meminfo=crashkernel=32M@0x50000000\0" \ 17389f95492SHeungJun, Kim "nfsroot=/nfsroot/arm\0" \ 17489f95492SHeungJun, Kim "bootblock=" CONFIG_BOOTBLOCK "\0" \ 17535777e22SŁukasz Majewski "loaduimage=ext4load mmc ${mmcdev}:${mmcbootpart} 0x40007FC0 uImage\0" \ 176ba223bb2SArkadiusz Wlodarczyk "loaddtb=ext4load mmc ${mmcdev}:${mmcbootpart} ${fdtaddr} " \ 177ba223bb2SArkadiusz Wlodarczyk "${fdtfile}\0" \ 17889f95492SHeungJun, Kim "mmcdev=0\0" \ 17989f95492SHeungJun, Kim "mmcbootpart=2\0" \ 18035777e22SŁukasz Majewski "mmcrootpart=5\0" \ 18193a1ab57SLukasz Majewski "opts=always_resume=1\0" \ 1829960d9a8SLukasz Majewski "partitions=" PARTS_DEFAULT \ 18335777e22SŁukasz Majewski "dfu_alt_info=" CONFIG_DFU_ALT \ 18435777e22SŁukasz Majewski "spladdr=0x40000100\0" \ 18535777e22SŁukasz Majewski "splsize=0x200\0" \ 18635777e22SŁukasz Majewski "splfile=falcon.bin\0" \ 18735777e22SŁukasz Majewski "spl_export=" \ 18835777e22SŁukasz Majewski "setexpr spl_imgsize ${splsize} + 8 ;" \ 189dc993a65SPrzemyslaw Marczak "setenv spl_imgsize 0x${spl_imgsize};" \ 19035777e22SŁukasz Majewski "setexpr spl_imgaddr ${spladdr} - 8 ;" \ 19135777e22SŁukasz Majewski "setexpr spl_addr_tmp ${spladdr} - 4 ;" \ 19235777e22SŁukasz Majewski "mw.b ${spl_imgaddr} 0x00 ${spl_imgsize};run loaduimage;" \ 19335777e22SŁukasz Majewski "setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \ 19435777e22SŁukasz Majewski "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo};" \ 19535777e22SŁukasz Majewski "spl export atags 0x40007FC0;" \ 19635777e22SŁukasz Majewski "crc32 ${spladdr} ${splsize} ${spl_imgaddr};" \ 19735777e22SŁukasz Majewski "mw.l ${spl_addr_tmp} ${splsize};" \ 19835777e22SŁukasz Majewski "ext4write mmc ${mmcdev}:${mmcbootpart}" \ 19935777e22SŁukasz Majewski " /${splfile} ${spl_imgaddr} ${spl_imgsize};" \ 20035777e22SŁukasz Majewski "setenv spl_imgsize;" \ 20135777e22SŁukasz Majewski "setenv spl_imgaddr;" \ 202ba223bb2SArkadiusz Wlodarczyk "setenv spl_addr_tmp;\0" \ 203ba223bb2SArkadiusz Wlodarczyk "fdtaddr=40800000\0" \ 204ba223bb2SArkadiusz Wlodarczyk "fdtfile=exynos4210-trats.dtb\0" 205ba223bb2SArkadiusz Wlodarczyk 20689f95492SHeungJun, Kim 20789f95492SHeungJun, Kim /* Miscellaneous configurable options */ 20889f95492SHeungJun, Kim #define CONFIG_SYS_LONGHELP /* undef to save memory */ 20989f95492SHeungJun, Kim #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ 21089f95492SHeungJun, Kim #define CONFIG_SYS_PROMPT "TRATS # " 21189f95492SHeungJun, Kim #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 21289f95492SHeungJun, Kim #define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */ 21389f95492SHeungJun, Kim #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 21489f95492SHeungJun, Kim /* Boot Argument Buffer Size */ 21589f95492SHeungJun, Kim #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 21689f95492SHeungJun, Kim /* memtest works on */ 21789f95492SHeungJun, Kim #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE 21889f95492SHeungJun, Kim #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x5000000) 21989f95492SHeungJun, Kim #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x4800000) 22089f95492SHeungJun, Kim 22189f95492SHeungJun, Kim #define CONFIG_SYS_HZ 1000 22289f95492SHeungJun, Kim 223b5598578SPiotr Wilczek /* TRATS has 4 banks of DRAM */ 224b5598578SPiotr Wilczek #define CONFIG_NR_DRAM_BANKS 4 225b5598578SPiotr Wilczek #define SDRAM_BANK_SIZE (256UL << 20UL) /* 256 MB */ 226b5598578SPiotr Wilczek #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE 227b5598578SPiotr Wilczek #define PHYS_SDRAM_1_SIZE SDRAM_BANK_SIZE 228b5598578SPiotr Wilczek #define PHYS_SDRAM_2 (CONFIG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE) 229b5598578SPiotr Wilczek #define PHYS_SDRAM_2_SIZE SDRAM_BANK_SIZE 230b5598578SPiotr Wilczek #define PHYS_SDRAM_3 (CONFIG_SYS_SDRAM_BASE + (2 * SDRAM_BANK_SIZE)) 231b5598578SPiotr Wilczek #define PHYS_SDRAM_3_SIZE SDRAM_BANK_SIZE 232b5598578SPiotr Wilczek #define PHYS_SDRAM_4 (CONFIG_SYS_SDRAM_BASE + (3 * SDRAM_BANK_SIZE)) 233b5598578SPiotr Wilczek #define PHYS_SDRAM_4_SIZE SDRAM_BANK_SIZE 23489f95492SHeungJun, Kim 23589f95492SHeungJun, Kim #define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */ 23689f95492SHeungJun, Kim 23789f95492SHeungJun, Kim #define CONFIG_SYS_MONITOR_BASE 0x00000000 23889f95492SHeungJun, Kim #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */ 23989f95492SHeungJun, Kim 24089f95492SHeungJun, Kim #define CONFIG_ENV_IS_IN_MMC 24189f95492SHeungJun, Kim #define CONFIG_SYS_MMC_ENV_DEV 0 24289f95492SHeungJun, Kim #define CONFIG_ENV_SIZE 4096 24389f95492SHeungJun, Kim #define CONFIG_ENV_OFFSET ((32 - 4) << 10) /* 32KiB - 4KiB */ 24489f95492SHeungJun, Kim 24589f95492SHeungJun, Kim #define CONFIG_DOS_PARTITION 24635777e22SŁukasz Majewski #define CONFIG_EFI_PARTITION 24735777e22SŁukasz Majewski 24835777e22SŁukasz Majewski /* EXT4 */ 24935777e22SŁukasz Majewski #define CONFIG_CMD_EXT4 25035777e22SŁukasz Majewski #define CONFIG_CMD_EXT4_WRITE 25135777e22SŁukasz Majewski /* Falcon mode definitions */ 25235777e22SŁukasz Majewski #define CONFIG_CMD_SPL 25335777e22SŁukasz Majewski #define CONFIG_SYS_SPL_ARGS_ADDR PHYS_SDRAM_1 + 0x100 25489f95492SHeungJun, Kim 2559960d9a8SLukasz Majewski /* GPT */ 2569960d9a8SLukasz Majewski #define CONFIG_EFI_PARTITION 2579960d9a8SLukasz Majewski #define CONFIG_PARTITION_UUIDS 2589960d9a8SLukasz Majewski 25989f95492SHeungJun, Kim #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR - GENERATED_GBL_DATA_SIZE) 26089f95492SHeungJun, Kim #define CONFIG_SYS_CACHELINE_SIZE 32 26189f95492SHeungJun, Kim 26289f95492SHeungJun, Kim #define CONFIG_SOFT_I2C 26389f95492SHeungJun, Kim #define CONFIG_SOFT_I2C_READ_REPEATED_START 264fd8dca83SŁukasz Majewski #define CONFIG_SYS_I2C_INIT_BOARD 26589f95492SHeungJun, Kim #define CONFIG_SYS_I2C_SPEED 50000 26689f95492SHeungJun, Kim #define CONFIG_I2C_MULTI_BUS 267fd8dca83SŁukasz Majewski #define CONFIG_SOFT_I2C_MULTI_BUS 268fd8dca83SŁukasz Majewski #define CONFIG_SYS_MAX_I2C_BUS 15 269fd8dca83SŁukasz Majewski 270fd8dca83SŁukasz Majewski #include <asm/arch/gpio.h> 271fd8dca83SŁukasz Majewski 272fd8dca83SŁukasz Majewski /* I2C PMIC */ 273fd8dca83SŁukasz Majewski #define CONFIG_SOFT_I2C_I2C5_SCL exynos4_gpio_part1_get_nr(b, 7) 274fd8dca83SŁukasz Majewski #define CONFIG_SOFT_I2C_I2C5_SDA exynos4_gpio_part1_get_nr(b, 6) 275fd8dca83SŁukasz Majewski 276fd8dca83SŁukasz Majewski /* I2C FG */ 277fd8dca83SŁukasz Majewski #define CONFIG_SOFT_I2C_I2C9_SCL exynos4_gpio_part2_get_nr(y4, 1) 278fd8dca83SŁukasz Majewski #define CONFIG_SOFT_I2C_I2C9_SDA exynos4_gpio_part2_get_nr(y4, 0) 279fd8dca83SŁukasz Majewski 280fd8dca83SŁukasz Majewski #define CONFIG_SOFT_I2C_GPIO_SCL get_multi_scl_pin() 281fd8dca83SŁukasz Majewski #define CONFIG_SOFT_I2C_GPIO_SDA get_multi_sda_pin() 282fd8dca83SŁukasz Majewski #define I2C_INIT multi_i2c_init() 28389f95492SHeungJun, Kim 284be3b51aaSŁukasz Majewski #define CONFIG_POWER 285be3b51aaSŁukasz Majewski #define CONFIG_POWER_I2C 286be3b51aaSŁukasz Majewski #define CONFIG_POWER_MAX8997 28789f95492SHeungJun, Kim 2885a77358cSŁukasz Majewski #define CONFIG_POWER_FG 2895a77358cSŁukasz Majewski #define CONFIG_POWER_FG_MAX17042 2907dcda99dSŁukasz Majewski #define CONFIG_POWER_MUIC 2917dcda99dSŁukasz Majewski #define CONFIG_POWER_MUIC_MAX8997 29261365ffcSŁukasz Majewski #define CONFIG_POWER_BATTERY 29361365ffcSŁukasz Majewski #define CONFIG_POWER_BATTERY_TRATS 29489f95492SHeungJun, Kim #define CONFIG_USB_GADGET 29589f95492SHeungJun, Kim #define CONFIG_USB_GADGET_S3C_UDC_OTG 29689f95492SHeungJun, Kim #define CONFIG_USB_GADGET_DUALSPEED 29793a1ab57SLukasz Majewski #define CONFIG_USB_GADGET_VBUS_DRAW 2 29889f95492SHeungJun, Kim 29951b1cd6dSDonghwa Lee /* LCD */ 30051b1cd6dSDonghwa Lee #define CONFIG_EXYNOS_FB 30151b1cd6dSDonghwa Lee #define CONFIG_LCD 30290464971SDonghwa Lee #define CONFIG_CMD_BMP 30390464971SDonghwa Lee #define CONFIG_BMP_32BPP 30451b1cd6dSDonghwa Lee #define CONFIG_FB_ADDR 0x52504000 30551b1cd6dSDonghwa Lee #define CONFIG_S6E8AX0 30651b1cd6dSDonghwa Lee #define CONFIG_EXYNOS_MIPI_DSIM 30790464971SDonghwa Lee #define CONFIG_VIDEO_BMP_GZIP 30890464971SDonghwa Lee #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((500 * 120 * 4) + (1 << 12)) 30951b1cd6dSDonghwa Lee 31083301b4fSLukasz Majewski #define CONFIG_CMD_USB_MASS_STORAGE 31183301b4fSLukasz Majewski #if defined(CONFIG_CMD_USB_MASS_STORAGE) 31283301b4fSLukasz Majewski #define CONFIG_USB_GADGET_MASS_STORAGE 31383301b4fSLukasz Majewski #endif 31483301b4fSLukasz Majewski 315ba223bb2SArkadiusz Wlodarczyk /* Pass open firmware flat tree */ 316ba223bb2SArkadiusz Wlodarczyk #define CONFIG_OF_LIBFDT 1 317ba223bb2SArkadiusz Wlodarczyk 31889f95492SHeungJun, Kim #endif /* __CONFIG_H */ 319