183d290c5STom Rini /* SPDX-License-Identifier: GPL-2.0+ */ 289f95492SHeungJun, Kim /* 389f95492SHeungJun, Kim * Copyright (C) 2011 Samsung Electronics 489f95492SHeungJun, Kim * Heungjun Kim <riverful.kim@samsung.com> 589f95492SHeungJun, Kim * 689f95492SHeungJun, Kim * Configuation settings for the SAMSUNG TRATS (EXYNOS4210) board. 789f95492SHeungJun, Kim */ 889f95492SHeungJun, Kim 9fe601647SPiotr Wilczek #ifndef __CONFIG_TRATS_H 10fe601647SPiotr Wilczek #define __CONFIG_TRATS_H 1189f95492SHeungJun, Kim 124c7bb1d2SSimon Glass #include <configs/exynos4-common.h> 13fe601647SPiotr Wilczek 14fe601647SPiotr Wilczek #define CONFIG_TRATS 15fe601647SPiotr Wilczek 1690464971SDonghwa Lee #define CONFIG_TIZEN /* TIZEN lib */ 1789f95492SHeungJun, Kim 18c4e96dbfSŁukasz Majewski #define CONFIG_SYS_L2CACHE_OFF 19d0460b01SŁukasz Majewski #ifndef CONFIG_SYS_L2CACHE_OFF 20d0460b01SŁukasz Majewski #define CONFIG_SYS_L2_PL310 21d0460b01SŁukasz Majewski #define CONFIG_SYS_PL310_BASE 0x10502000 22d0460b01SŁukasz Majewski #endif 2389f95492SHeungJun, Kim 24fe601647SPiotr Wilczek /* TRATS has 4 banks of DRAM */ 2589f95492SHeungJun, Kim #define CONFIG_SYS_SDRAM_BASE 0x40000000 26fe601647SPiotr Wilczek #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE 27fe601647SPiotr Wilczek #define SDRAM_BANK_SIZE (256 << 20) /* 256 MB */ 2889f95492SHeungJun, Kim 29fe601647SPiotr Wilczek /* memtest works on */ 30fe601647SPiotr Wilczek #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE 31fe601647SPiotr Wilczek #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x5000000) 32fe601647SPiotr Wilczek #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x4800000) 3389f95492SHeungJun, Kim 3489f95492SHeungJun, Kim /* select serial console configuration */ 3589f95492SHeungJun, Kim 36fe601647SPiotr Wilczek #define CONFIG_MACH_TYPE MACH_TYPE_TRATS 3789f95492SHeungJun, Kim 380a1387bfSŁukasz Majewski #define CONFIG_BOOTCOMMAND "run autoboot" 39*767edf0fSSeung-Woo Kim #define CONFIG_DEFAULT_CONSOLE "console=ttySAC2,115200n8\0" 4089f95492SHeungJun, Kim 41fe601647SPiotr Wilczek #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR \ 42fe601647SPiotr Wilczek - GENERATED_GBL_DATA_SIZE) 43fe601647SPiotr Wilczek 44fe601647SPiotr Wilczek #define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */ 45fe601647SPiotr Wilczek 46fe601647SPiotr Wilczek #define CONFIG_SYS_MONITOR_BASE 0x00000000 47fe601647SPiotr Wilczek 4889f95492SHeungJun, Kim #define CONFIG_BOOTBLOCK "10" 4989f95492SHeungJun, Kim #define CONFIG_ENV_COMMON_BOOT "${console} ${meminfo}" 5089f95492SHeungJun, Kim 51fe601647SPiotr Wilczek #define CONFIG_SYS_MMC_ENV_DEV CONFIG_MMC_DEFAULT_DEV 52fe601647SPiotr Wilczek #define CONFIG_ENV_SIZE 4096 53fe601647SPiotr Wilczek #define CONFIG_ENV_OFFSET ((32 - 4) << 10) /* 32KiB - 4KiB */ 54fe601647SPiotr Wilczek 55fe601647SPiotr Wilczek #define CONFIG_ENV_OVERWRITE 56fe601647SPiotr Wilczek 579960d9a8SLukasz Majewski /* Tizen - partitions definitions */ 589960d9a8SLukasz Majewski #define PARTS_CSA "csa-mmc" 599960d9a8SLukasz Majewski #define PARTS_BOOT "boot" 6018f3e0ebSPrzemyslaw Marczak #define PARTS_QBOOT "qboot" 6118f3e0ebSPrzemyslaw Marczak #define PARTS_CSC "csc" 629960d9a8SLukasz Majewski #define PARTS_ROOT "platform" 639960d9a8SLukasz Majewski #define PARTS_DATA "data" 649960d9a8SLukasz Majewski #define PARTS_UMS "ums" 659960d9a8SLukasz Majewski 669960d9a8SLukasz Majewski #define PARTS_DEFAULT \ 679960d9a8SLukasz Majewski "uuid_disk=${uuid_gpt_disk};" \ 6818f3e0ebSPrzemyslaw Marczak "name="PARTS_CSA",start=5MiB,size=8MiB,uuid=${uuid_gpt_"PARTS_CSA"};" \ 6918f3e0ebSPrzemyslaw Marczak "name="PARTS_BOOT",size=60MiB,uuid=${uuid_gpt_"PARTS_BOOT"};" \ 7018f3e0ebSPrzemyslaw Marczak "name="PARTS_QBOOT",size=100MiB,uuid=${uuid_gpt_"PARTS_QBOOT"};" \ 719960d9a8SLukasz Majewski "name="PARTS_CSC",size=150MiB,uuid=${uuid_gpt_"PARTS_CSC"};" \ 7218f3e0ebSPrzemyslaw Marczak "name="PARTS_ROOT",size=1536MiB,uuid=${uuid_gpt_"PARTS_ROOT"};" \ 7318f3e0ebSPrzemyslaw Marczak "name="PARTS_DATA",size=3000MiB,uuid=${uuid_gpt_"PARTS_DATA"};" \ 749960d9a8SLukasz Majewski "name="PARTS_UMS",size=-,uuid=${uuid_gpt_"PARTS_UMS"}\0" \ 759960d9a8SLukasz Majewski 7693a1ab57SLukasz Majewski #define CONFIG_DFU_ALT \ 77b7d4259aSMateusz Zalega "u-boot raw 0x80 0x400;" \ 78dcb7eb66SŁukasz Majewski "/uImage ext4 0 2;" \ 79dcb7eb66SŁukasz Majewski "/modem.bin ext4 0 2;" \ 80dcb7eb66SŁukasz Majewski "/exynos4210-trats.dtb ext4 0 2;" \ 8118f3e0ebSPrzemyslaw Marczak ""PARTS_CSA" part 0 1;" \ 82cdd15bceSŁukasz Majewski ""PARTS_BOOT" part 0 2;" \ 8318f3e0ebSPrzemyslaw Marczak ""PARTS_QBOOT" part 0 3;" \ 8418f3e0ebSPrzemyslaw Marczak ""PARTS_CSC" part 0 4;" \ 85cdd15bceSŁukasz Majewski ""PARTS_ROOT" part 0 5;" \ 86cdd15bceSŁukasz Majewski ""PARTS_DATA" part 0 6;" \ 87a0afc6f3SPrzemyslaw Marczak ""PARTS_UMS" part 0 7;" \ 880a1387bfSŁukasz Majewski "params.bin raw 0x38 0x8;" \ 890a1387bfSŁukasz Majewski "/Image.itb ext4 0 2\0" 9093a1ab57SLukasz Majewski 9189f95492SHeungJun, Kim #define CONFIG_EXTRA_ENV_SETTINGS \ 9289f95492SHeungJun, Kim "bootk=" \ 93425e26deSPiotr Wilczek "run loaduimage;" \ 94425e26deSPiotr Wilczek "if run loaddtb; then " \ 95425e26deSPiotr Wilczek "bootm 0x40007FC0 - ${fdtaddr};" \ 96425e26deSPiotr Wilczek "fi;" \ 97425e26deSPiotr Wilczek "bootm 0x40007FC0;\0" \ 9889f95492SHeungJun, Kim "updatebackup=" \ 99188c42b3SJaehoon Chung "mmc dev 0 2; mmc write 0 0x42100000 0 0x200;" \ 100188c42b3SJaehoon Chung "mmc dev 0 0\0" \ 10189f95492SHeungJun, Kim "updatebootb=" \ 10289f95492SHeungJun, Kim "mmc read 0 0x42100000 0x80 0x200; run updatebackup\0" \ 10389f95492SHeungJun, Kim "lpj=lpj=3981312\0" \ 10489f95492SHeungJun, Kim "nfsboot=" \ 10535777e22SŁukasz Majewski "setenv bootargs root=/dev/nfs rw " \ 10689f95492SHeungJun, Kim "nfsroot=${nfsroot},nolock,tcp " \ 10789f95492SHeungJun, Kim "ip=${ipaddr}:${serverip}:${gatewayip}:" \ 10889f95492SHeungJun, Kim "${netmask}:generic:usb0:off " CONFIG_ENV_COMMON_BOOT \ 10989f95492SHeungJun, Kim "; run bootk\0" \ 11089f95492SHeungJun, Kim "ramfsboot=" \ 11135777e22SŁukasz Majewski "setenv bootargs root=/dev/ram0 rw rootfstype=ext2 " \ 11289f95492SHeungJun, Kim "${console} ${meminfo} " \ 11389f95492SHeungJun, Kim "initrd=0x43000000,8M ramdisk=8192\0" \ 11489f95492SHeungJun, Kim "mmcboot=" \ 11535777e22SŁukasz Majewski "setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \ 11689f95492SHeungJun, Kim "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo}; " \ 117425e26deSPiotr Wilczek "run bootk\0" \ 11835777e22SŁukasz Majewski "bootchart=setenv opts init=/sbin/bootchartd; run bootcmd\0" \ 11989f95492SHeungJun, Kim "boottrace=setenv opts initcall_debug; run bootcmd\0" \ 12089f95492SHeungJun, Kim "mmcoops=mmc read 0 0x40000000 0x40 8; md 0x40000000 0x400\0" \ 12189f95492SHeungJun, Kim "verify=n\0" \ 12289f95492SHeungJun, Kim "rootfstype=ext4\0" \ 123*767edf0fSSeung-Woo Kim "console=" CONFIG_DEFAULT_CONSOLE \ 12489f95492SHeungJun, Kim "meminfo=crashkernel=32M@0x50000000\0" \ 12589f95492SHeungJun, Kim "nfsroot=/nfsroot/arm\0" \ 12689f95492SHeungJun, Kim "bootblock=" CONFIG_BOOTBLOCK "\0" \ 12735777e22SŁukasz Majewski "loaduimage=ext4load mmc ${mmcdev}:${mmcbootpart} 0x40007FC0 uImage\0" \ 128ba223bb2SArkadiusz Wlodarczyk "loaddtb=ext4load mmc ${mmcdev}:${mmcbootpart} ${fdtaddr} " \ 129ba223bb2SArkadiusz Wlodarczyk "${fdtfile}\0" \ 13089f95492SHeungJun, Kim "mmcdev=0\0" \ 13189f95492SHeungJun, Kim "mmcbootpart=2\0" \ 13235777e22SŁukasz Majewski "mmcrootpart=5\0" \ 13393a1ab57SLukasz Majewski "opts=always_resume=1\0" \ 1349960d9a8SLukasz Majewski "partitions=" PARTS_DEFAULT \ 13535777e22SŁukasz Majewski "dfu_alt_info=" CONFIG_DFU_ALT \ 13635777e22SŁukasz Majewski "spladdr=0x40000100\0" \ 13735777e22SŁukasz Majewski "splsize=0x200\0" \ 13835777e22SŁukasz Majewski "splfile=falcon.bin\0" \ 13935777e22SŁukasz Majewski "spl_export=" \ 14035777e22SŁukasz Majewski "setexpr spl_imgsize ${splsize} + 8 ;" \ 141dc993a65SPrzemyslaw Marczak "setenv spl_imgsize 0x${spl_imgsize};" \ 14235777e22SŁukasz Majewski "setexpr spl_imgaddr ${spladdr} - 8 ;" \ 14335777e22SŁukasz Majewski "setexpr spl_addr_tmp ${spladdr} - 4 ;" \ 14435777e22SŁukasz Majewski "mw.b ${spl_imgaddr} 0x00 ${spl_imgsize};run loaduimage;" \ 14535777e22SŁukasz Majewski "setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \ 14635777e22SŁukasz Majewski "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo};" \ 14735777e22SŁukasz Majewski "spl export atags 0x40007FC0;" \ 14835777e22SŁukasz Majewski "crc32 ${spladdr} ${splsize} ${spl_imgaddr};" \ 14935777e22SŁukasz Majewski "mw.l ${spl_addr_tmp} ${splsize};" \ 15035777e22SŁukasz Majewski "ext4write mmc ${mmcdev}:${mmcbootpart}" \ 15135777e22SŁukasz Majewski " /${splfile} ${spl_imgaddr} ${spl_imgsize};" \ 15235777e22SŁukasz Majewski "setenv spl_imgsize;" \ 15335777e22SŁukasz Majewski "setenv spl_imgaddr;" \ 154ba223bb2SArkadiusz Wlodarczyk "setenv spl_addr_tmp;\0" \ 1550a1387bfSŁukasz Majewski CONFIG_EXTRA_ENV_ITB \ 156ba223bb2SArkadiusz Wlodarczyk "fdtaddr=40800000\0" \ 157ba223bb2SArkadiusz Wlodarczyk 15835777e22SŁukasz Majewski /* Falcon mode definitions */ 159fe601647SPiotr Wilczek #define CONFIG_SYS_SPL_ARGS_ADDR CONFIG_SYS_SDRAM_BASE + 0x100 16089f95492SHeungJun, Kim 1619960d9a8SLukasz Majewski /* GPT */ 1629960d9a8SLukasz Majewski 163e0021706SPrzemyslaw Marczak /* Security subsystem - enable hw_rand() */ 164e0021706SPrzemyslaw Marczak #define CONFIG_EXYNOS_ACE_SHA 165e0021706SPrzemyslaw Marczak 166679549d1SPrzemyslaw Marczak /* Common misc for Samsung */ 167679549d1SPrzemyslaw Marczak #define CONFIG_MISC_COMMON 168679549d1SPrzemyslaw Marczak 16900e64ab6SPrzemyslaw Marczak /* Download menu - Samsung common */ 17000e64ab6SPrzemyslaw Marczak #define CONFIG_LCD_MENU 17100e64ab6SPrzemyslaw Marczak 17200e64ab6SPrzemyslaw Marczak /* Download menu - definitions for check keys */ 17300e64ab6SPrzemyslaw Marczak #ifndef __ASSEMBLY__ 17400e64ab6SPrzemyslaw Marczak 17500e64ab6SPrzemyslaw Marczak #define KEY_PWR_PMIC_NAME "MAX8997_PMIC" 17600e64ab6SPrzemyslaw Marczak #define KEY_PWR_STATUS_REG MAX8997_REG_STATUS1 17700e64ab6SPrzemyslaw Marczak #define KEY_PWR_STATUS_MASK (1 << 0) 17800e64ab6SPrzemyslaw Marczak #define KEY_PWR_INTERRUPT_REG MAX8997_REG_INT1 17900e64ab6SPrzemyslaw Marczak #define KEY_PWR_INTERRUPT_MASK (1 << 0) 18000e64ab6SPrzemyslaw Marczak 1819b97b727SAkshay Saraswat #define KEY_VOL_UP_GPIO EXYNOS4_GPIO_X20 1829b97b727SAkshay Saraswat #define KEY_VOL_DOWN_GPIO EXYNOS4_GPIO_X21 18300e64ab6SPrzemyslaw Marczak #endif /* __ASSEMBLY__ */ 18400e64ab6SPrzemyslaw Marczak 18500e64ab6SPrzemyslaw Marczak /* LCD console */ 18600e64ab6SPrzemyslaw Marczak #define LCD_BPP LCD_COLOR16 18700e64ab6SPrzemyslaw Marczak 18851b1cd6dSDonghwa Lee /* LCD */ 1892df21cb3SPrzemyslaw Marczak #define CONFIG_BMP_16BPP 19051b1cd6dSDonghwa Lee #define CONFIG_FB_ADDR 0x52504000 19151b1cd6dSDonghwa Lee #define CONFIG_EXYNOS_MIPI_DSIM 19290464971SDonghwa Lee #define CONFIG_VIDEO_BMP_GZIP 193903afe18SPrzemyslaw Marczak #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((500 * 160 * 4) + 54) 19451b1cd6dSDonghwa Lee 19589f95492SHeungJun, Kim #endif /* __CONFIG_H */ 196