1 /*
2  * (C) Copyright 2013
3  * Texas Instruments Incorporated.
4  * Sricharan R	  <r.sricharan@ti.com>
5  *
6  * Derived from OMAP4 done by:
7  *	Aneesh V <aneesh@ti.com>
8  *
9  * TI OMAP5 AND DRA7XX common configuration settings
10  *
11  * SPDX-License-Identifier:	GPL-2.0+
12  *
13  * For more details, please see the technical documents listed at
14  * http://www.ti.com/product/omap5432
15  */
16 
17 #ifndef __CONFIG_TI_OMAP5_COMMON_H
18 #define __CONFIG_TI_OMAP5_COMMON_H
19 
20 #define CONFIG_DISPLAY_CPUINFO
21 #define CONFIG_DISPLAY_BOARDINFO
22 
23 /* Common ARM Erratas */
24 #define CONFIG_ARM_ERRATA_798870
25 
26 #define CONFIG_SYS_CACHELINE_SIZE	64
27 
28 /* Use General purpose timer 1 */
29 #define CONFIG_SYS_TIMERBASE		GPT2_BASE
30 
31 /*
32  * For the DDR timing information we can either dynamically determine
33  * the timings to use or use pre-determined timings (based on using the
34  * dynamic method.  Default to the static timing infomation.
35  */
36 #define CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
37 #ifndef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
38 #define CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION
39 #define CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS
40 #endif
41 
42 #define CONFIG_PALMAS_POWER
43 
44 #include <asm/arch/cpu.h>
45 #include <asm/arch/omap.h>
46 
47 #include <configs/ti_armv7_omap.h>
48 
49 /*
50  * Hardware drivers
51  */
52 #define CONFIG_SYS_NS16550_CLK		48000000
53 #if defined(CONFIG_SPL_BUILD) || !defined(CONFIG_DM_SERIAL)
54 #define CONFIG_SYS_NS16550_SERIAL
55 #define CONFIG_SYS_NS16550_REG_SIZE	(-4)
56 #endif
57 
58 /*
59  * Environment setup
60  */
61 #ifndef PARTS_DEFAULT
62 #define PARTS_DEFAULT
63 #endif
64 
65 #ifndef DFUARGS
66 #define DFUARGS
67 #endif
68 
69 #ifndef CONFIG_SPL_BUILD
70 #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
71 #define CONFIG_EXTRA_ENV_SETTINGS \
72 	DEFAULT_LINUX_BOOT_ENV \
73 	DEFAULT_MMC_TI_ARGS \
74 	"console=" CONSOLEDEV ",115200n8\0" \
75 	"fdtfile=undefined\0" \
76 	"bootpart=0:2\0" \
77 	"bootdir=/boot\0" \
78 	"bootfile=zImage\0" \
79 	"usbtty=cdc_acm\0" \
80 	"vram=16M\0" \
81 	"partitions=" PARTS_DEFAULT "\0" \
82 	"optargs=\0" \
83 	"dofastboot=0\0" \
84 	"loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
85 	"bootscript=echo Running bootscript from mmc${mmcdev} ...; " \
86 		"source ${loadaddr}\0" \
87 	"loadimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0" \
88 	"mmcboot=mmc dev ${mmcdev}; " \
89 		"if mmc rescan; then " \
90 			"echo SD/MMC found on device ${mmcdev};" \
91 			"if run loadimage; then " \
92 				"run loadfdt; " \
93 				"echo Booting from mmc${mmcdev} ...; " \
94 				"run args_mmc; " \
95 				"bootz ${loadaddr} - ${fdtaddr}; " \
96 			"fi;" \
97 		"fi;\0" \
98 	"findfdt="\
99 		"if test $board_name = omap5_uevm; then " \
100 			"setenv fdtfile omap5-uevm.dtb; fi; " \
101 		"if test $board_name = dra7xx; then " \
102 			"setenv fdtfile dra7-evm.dtb; fi;" \
103 		"if test $board_name = dra72x; then " \
104 			"setenv fdtfile dra72-evm.dtb; fi;" \
105 		"if test $board_name = beagle_x15; then " \
106 			"setenv fdtfile am57xx-beagle-x15.dtb; fi;" \
107 		"if test $board_name = am57xx_evm; then " \
108 			"setenv fdtfile am57xx-beagle-x15.dtb; fi;" \
109 		"if test $fdtfile = undefined; then " \
110 			"echo WARNING: Could not determine device tree to use; fi; \0" \
111 	"loadfdt=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile};\0" \
112 	DFUARGS \
113 	NETARGS \
114 
115 #define CONFIG_BOOTCOMMAND \
116 	"if test ${dofastboot} -eq 1; then " \
117 		"echo Boot fastboot requested, resetting dofastboot ...;" \
118 		"setenv dofastboot 0; saveenv;" \
119 		"echo Booting into fastboot ...; fastboot 0;" \
120 	"fi;" \
121 	"run findfdt; " \
122 	"run envboot; " \
123 	"run mmcboot;" \
124 	"setenv mmcdev 1; " \
125 	"setenv bootpart 1:2; " \
126 	"setenv mmcroot /dev/mmcblk0p2 rw; " \
127 	"run mmcboot;" \
128 	""
129 #endif
130 
131 /*
132  * SPL related defines.  The Public RAM memory map the ROM defines the
133  * area between 0x40300000 and 0x4031E000 as a download area for OMAP5.
134  * On DRA7xx/AM57XX the download area is between 0x40300000 and 0x4037E000.
135  * We set CONFIG_SPL_DISPLAY_PRINT to have omap_rev_string() called and
136  * print some information.
137  */
138 #ifdef CONFIG_TI_SECURE_DEVICE
139 /*
140  * For memory booting on HS parts, the first 4KB of the internal RAM is
141  * reserved for secure world use and the flash loader image is
142  * preceded by a secure certificate. The SPL will therefore run in internal
143  * RAM from address 0x40301350 (0x40300000+0x1000(reserved)+0x350(cert)).
144  */
145 #define TI_OMAP5_SECURE_BOOT_RESV_SRAM_SZ	0x1000
146 #define CONFIG_SPL_TEXT_BASE	0x40301350
147 #else
148 /*
149  * For all booting on GP parts, the flash loader image is
150  * downloaded into internal RAM at address 0x40300000.
151  */
152 #define CONFIG_SPL_TEXT_BASE	0x40300000
153 #endif
154 
155 /* DRA7xx/AM57xx have 512K of SRAM, OMAP5 only 128K */
156 #if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX)
157 #define TI_ROM_BOOT_LOAD_END		0x4037E000
158 #else
159 #define TI_ROM_BOOT_LOAD_END		0x4031E000
160 #endif
161 #define CONFIG_SPL_MAX_SIZE     (TI_ROM_BOOT_LOAD_END - CONFIG_SPL_TEXT_BASE)
162 #define CONFIG_SPL_DISPLAY_PRINT
163 #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
164 #define CONFIG_SYS_SPL_ARGS_ADDR	(CONFIG_SYS_SDRAM_BASE + \
165 					 (128 << 20))
166 
167 #ifdef CONFIG_NAND
168 #define CONFIG_SPL_NAND_AM33XX_BCH	/* ELM support */
169 #endif
170 
171 /*
172  * Disable MMC DM for SPL build and can be re-enabled after adding
173  * DM support in SPL
174  */
175 #ifdef CONFIG_SPL_BUILD
176 #undef CONFIG_DM_MMC
177 #undef CONFIG_TIMER
178 #undef CONFIG_DM_ETH
179 #endif
180 
181 #endif /* __CONFIG_TI_OMAP5_COMMON_H */
182