1 /* 2 * (C) Copyright 2013 3 * Texas Instruments Incorporated. 4 * Sricharan R <r.sricharan@ti.com> 5 * 6 * Derived from OMAP4 done by: 7 * Aneesh V <aneesh@ti.com> 8 * 9 * TI OMAP5 AND DRA7XX common configuration settings 10 * 11 * SPDX-License-Identifier: GPL-2.0+ 12 * 13 * For more details, please see the technical documents listed at 14 * http://www.ti.com/product/omap5432 15 */ 16 17 #ifndef __CONFIG_TI_OMAP5_COMMON_H 18 #define __CONFIG_TI_OMAP5_COMMON_H 19 20 /* Common ARM Erratas */ 21 #define CONFIG_ARM_ERRATA_798870 22 23 /* Use General purpose timer 1 */ 24 #define CONFIG_SYS_TIMERBASE GPT2_BASE 25 26 /* 27 * For the DDR timing information we can either dynamically determine 28 * the timings to use or use pre-determined timings (based on using the 29 * dynamic method. Default to the static timing infomation. 30 */ 31 #define CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS 32 #ifndef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS 33 #define CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION 34 #define CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS 35 #endif 36 37 #define CONFIG_PALMAS_POWER 38 39 #include <asm/arch/cpu.h> 40 #include <asm/arch/omap.h> 41 42 #include <configs/ti_armv7_omap.h> 43 44 /* 45 * Hardware drivers 46 */ 47 #define CONFIG_SYS_NS16550_CLK 48000000 48 #if defined(CONFIG_SPL_BUILD) || !defined(CONFIG_DM_SERIAL) 49 #define CONFIG_SYS_NS16550_SERIAL 50 #define CONFIG_SYS_NS16550_REG_SIZE (-4) 51 #endif 52 53 /* 54 * Environment setup 55 */ 56 #ifndef PARTS_DEFAULT 57 #define PARTS_DEFAULT 58 #endif 59 60 #ifndef DFUARGS 61 #define DFUARGS 62 #endif 63 64 #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG 65 #define CONFIG_EXTRA_ENV_SETTINGS \ 66 DEFAULT_LINUX_BOOT_ENV \ 67 DEFAULT_MMC_TI_ARGS \ 68 "console=" CONSOLEDEV ",115200n8\0" \ 69 "fdtfile=undefined\0" \ 70 "bootpart=0:2\0" \ 71 "bootdir=/boot\0" \ 72 "bootfile=zImage\0" \ 73 "usbtty=cdc_acm\0" \ 74 "vram=16M\0" \ 75 "partitions=" PARTS_DEFAULT "\0" \ 76 "optargs=\0" \ 77 "dofastboot=0\0" \ 78 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ 79 "bootscript=echo Running bootscript from mmc${mmcdev} ...; " \ 80 "source ${loadaddr}\0" \ 81 "loadimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0" \ 82 "mmcboot=mmc dev ${mmcdev}; " \ 83 "if mmc rescan; then " \ 84 "echo SD/MMC found on device ${mmcdev};" \ 85 "if run loadimage; then " \ 86 "run loadfdt; " \ 87 "echo Booting from mmc${mmcdev} ...; " \ 88 "run args_mmc; " \ 89 "bootz ${loadaddr} - ${fdtaddr}; " \ 90 "fi;" \ 91 "fi;\0" \ 92 "findfdt="\ 93 "if test $board_name = omap5_uevm; then " \ 94 "setenv fdtfile omap5-uevm.dtb; fi; " \ 95 "if test $board_name = dra7xx; then " \ 96 "setenv fdtfile dra7-evm.dtb; fi;" \ 97 "if test $board_name = dra72x-revc; then " \ 98 "setenv fdtfile dra72-evm-revc.dtb; fi;" \ 99 "if test $board_name = dra72x; then " \ 100 "setenv fdtfile dra72-evm.dtb; fi;" \ 101 "if test $board_name = beagle_x15; then " \ 102 "setenv fdtfile am57xx-beagle-x15.dtb; fi;" \ 103 "if test $board_name = am572x_idk; then " \ 104 "setenv fdtfile am572x-idk.dtb; fi;" \ 105 "if test $board_name = am57xx_evm; then " \ 106 "setenv fdtfile am57xx-beagle-x15.dtb; fi;" \ 107 "if test $fdtfile = undefined; then " \ 108 "echo WARNING: Could not determine device tree to use; fi; \0" \ 109 "loadfdt=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile};\0" \ 110 DFUARGS \ 111 NETARGS \ 112 113 #define CONFIG_BOOTCOMMAND \ 114 "if test ${dofastboot} -eq 1; then " \ 115 "echo Boot fastboot requested, resetting dofastboot ...;" \ 116 "setenv dofastboot 0; saveenv;" \ 117 "echo Booting into fastboot ...; fastboot 0;" \ 118 "fi;" \ 119 "run findfdt; " \ 120 "run envboot; " \ 121 "run mmcboot;" \ 122 "setenv mmcdev 1; " \ 123 "setenv bootpart 1:2; " \ 124 "setenv mmcroot /dev/mmcblk0p2 rw; " \ 125 "run mmcboot;" \ 126 "" 127 128 /* 129 * SPL related defines. The Public RAM memory map the ROM defines the 130 * area between 0x40300000 and 0x4031E000 as a download area for OMAP5. 131 * On DRA7xx/AM57XX the download area is between 0x40300000 and 0x4037E000. 132 * We set CONFIG_SPL_DISPLAY_PRINT to have omap_rev_string() called and 133 * print some information. 134 */ 135 #ifdef CONFIG_TI_SECURE_DEVICE 136 /* 137 * For memory booting on HS parts, the first 4KB of the internal RAM is 138 * reserved for secure world use and the flash loader image is 139 * preceded by a secure certificate. The SPL will therefore run in internal 140 * RAM from address 0x40301350 (0x40300000+0x1000(reserved)+0x350(cert)). 141 */ 142 #define TI_OMAP5_SECURE_BOOT_RESV_SRAM_SZ 0x1000 143 #define CONFIG_SPL_TEXT_BASE 0x40301350 144 /* If no specific start address is specified then the secure EMIF 145 * region will be placed at the end of the DDR space. In order to prevent 146 * the main u-boot relocation from clobbering that memory and causing a 147 * firewall violation, we tell u-boot that memory is protected RAM (PRAM) 148 */ 149 #if (CONFIG_TI_SECURE_EMIF_REGION_START == 0) 150 #define CONFIG_PRAM (CONFIG_TI_SECURE_EMIF_TOTAL_REGION_SIZE) >> 10 151 #endif 152 #else 153 /* 154 * For all booting on GP parts, the flash loader image is 155 * downloaded into internal RAM at address 0x40300000. 156 */ 157 #define CONFIG_SPL_TEXT_BASE 0x40300000 158 #endif 159 160 #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" 161 #define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + \ 162 (128 << 20)) 163 164 #ifdef CONFIG_NAND 165 #define CONFIG_SPL_NAND_AM33XX_BCH /* ELM support */ 166 #endif 167 168 /* 169 * Disable MMC DM for SPL build and can be re-enabled after adding 170 * DM support in SPL 171 */ 172 #ifdef CONFIG_SPL_BUILD 173 #undef CONFIG_DM_MMC 174 #undef CONFIG_TIMER 175 #undef CONFIG_DM_ETH 176 #endif 177 178 #endif /* __CONFIG_TI_OMAP5_COMMON_H */ 179