1 /*
2  * ti_omap3_common.h
3  *
4  * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
5  *
6  * SPDX-License-Identifier:	GPL-2.0+
7  *
8  * For more details, please see the technical documents listed at
9  *   http://www.ti.com/product/omap3530
10  *   http://www.ti.com/product/omap3630
11  *   http://www.ti.com/product/dm3730
12  */
13 
14 #ifndef __CONFIG_TI_OMAP3_COMMON_H__
15 #define __CONFIG_TI_OMAP3_COMMON_H__
16 
17 /*
18  * High Level Configuration Options
19  */
20 
21 #include <asm/arch/cpu.h>
22 #include <asm/arch/omap.h>
23 
24 /* Common ARM Erratas */
25 #define CONFIG_ARM_ERRATA_454179
26 #define CONFIG_ARM_ERRATA_430973
27 #define CONFIG_ARM_ERRATA_621766
28 
29 /* The chip has SDRC controller */
30 #define CONFIG_SDRC
31 
32 /* Clock Defines */
33 #define V_OSCK			26000000	/* Clock output from T2 */
34 #define V_SCLK			(V_OSCK >> 1)
35 
36 /* NS16550 Configuration */
37 #define V_NS16550_CLK			48000000	/* 48MHz (APLL96/2) */
38 #define CONFIG_SYS_NS16550_CLK		V_NS16550_CLK
39 #ifdef CONFIG_SPL_BUILD
40 # define CONFIG_SYS_NS16550_SERIAL
41 # define CONFIG_SYS_NS16550_REG_SIZE	(-4)
42 #endif
43 #define CONFIG_SYS_BAUDRATE_TABLE	{4800, 9600, 19200, 38400, 57600, \
44 					115200}
45 
46 /* Select serial console configuration */
47 #define CONFIG_CONS_INDEX		3
48 #ifdef CONFIG_SPL_BUILD
49 #define CONFIG_SYS_NS16550_COM3		OMAP34XX_UART3
50 #define CONFIG_SERIAL3			3
51 #endif
52 
53 /* Physical Memory Map */
54 #define PHYS_SDRAM_1		OMAP34XX_SDRC_CS0
55 #define PHYS_SDRAM_2		OMAP34XX_SDRC_CS1
56 
57 /*
58  * OMAP3 has 12 GP timers, they can be driven by the system clock
59  * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
60  * This rate is divided by a local divisor.
61  */
62 #define CONFIG_SYS_TIMERBASE		(OMAP34XX_GPT2)
63 
64 #define CONFIG_SYS_MONITOR_LEN		(256 << 10)
65 
66 /* TWL4030 */
67 #define CONFIG_TWL4030_POWER
68 
69 /* SPL */
70 #define CONFIG_SPL_TEXT_BASE		0x40200800
71 #define CONFIG_SPL_LDSCRIPT		"arch/arm/mach-omap2/u-boot-spl.lds"
72 #define CONFIG_SYS_SPL_ARGS_ADDR	(CONFIG_SYS_SDRAM_BASE + \
73 					 (64 << 20))
74 
75 #ifdef CONFIG_NAND
76 #define CONFIG_SPL_NAND_SIMPLE
77 #define CONFIG_SYS_NAND_BASE		0x30000000
78 #endif
79 
80 /* Now bring in the rest of the common code. */
81 #include <configs/ti_armv7_omap.h>
82 
83 #endif	/* __CONFIG_TI_OMAP3_COMMON_H__ */
84