1 /*
2  * ti_omap3_common.h
3  *
4  * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
5  *
6  * SPDX-License-Identifier:	GPL-2.0+
7  *
8  * For more details, please see the technical documents listed at
9  *   http://www.ti.com/product/omap3530
10  *   http://www.ti.com/product/omap3630
11  *   http://www.ti.com/product/dm3730
12  */
13 
14 #ifndef __CONFIG_TI_OMAP3_COMMON_H__
15 #define __CONFIG_TI_OMAP3_COMMON_H__
16 
17 #define CONFIG_OMAP34XX
18 
19 #include <asm/arch/cpu.h>
20 #include <asm/arch/omap3.h>
21 
22 /* The chip has SDRC controller */
23 #define CONFIG_SDRC
24 
25 /* Clock Defines */
26 #define V_OSCK			26000000	/* Clock output from T2 */
27 #define V_SCLK			(V_OSCK >> 1)
28 
29 /* NS16550 Configuration */
30 #define V_NS16550_CLK			48000000	/* 48MHz (APLL96/2) */
31 #define CONFIG_SYS_NS16550
32 #define CONFIG_SYS_NS16550_SERIAL
33 #define CONFIG_SYS_NS16550_REG_SIZE	(-4)
34 #define CONFIG_SYS_NS16550_CLK		V_NS16550_CLK
35 #define CONFIG_SYS_BAUDRATE_TABLE	{4800, 9600, 19200, 38400, 57600, \
36 					115200}
37 
38 /* Select serial console configuration */
39 #define CONFIG_CONS_INDEX		3
40 #define CONFIG_SYS_NS16550_COM3		OMAP34XX_UART3
41 #define CONFIG_SERIAL3			3
42 
43 /* Physical Memory Map */
44 #define PHYS_SDRAM_1		OMAP34XX_SDRC_CS0
45 #define PHYS_SDRAM_2		OMAP34XX_SDRC_CS1
46 
47 /*
48  * OMAP3 has 12 GP timers, they can be driven by the system clock
49  * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
50  * This rate is divided by a local divisor.
51  */
52 #define CONFIG_SYS_TIMERBASE		(OMAP34XX_GPT2)
53 
54 #define CONFIG_SYS_MONITOR_LEN		(256 << 10)
55 
56 /* TWL4030 */
57 #define CONFIG_TWL4030_POWER		1
58 
59 /* SPL */
60 #define CONFIG_SPL_TEXT_BASE		0x40200800
61 #define CONFIG_SPL_MAX_SIZE		(54 * 1024)
62 #define CONFIG_SPL_LDSCRIPT		"$(CPUDIR)/omap-common/u-boot-spl.lds"
63 #define CONFIG_SPL_POWER_SUPPORT
64 #define CONFIG_SYS_SPL_ARGS_ADDR	(CONFIG_SYS_SDRAM_BASE + \
65 					 (64 << 20))
66 
67 
68 #ifdef CONFIG_NAND
69 #define CONFIG_SPL_NAND_SUPPORT
70 #define CONFIG_SPL_NAND_SIMPLE
71 #define CONFIG_SYS_NAND_BASE		0x30000000
72 #endif
73 
74 /* Now bring in the rest of the common code. */
75 #include <configs/ti_armv7_common.h>
76 
77 #endif	/* __CONFIG_TI_OMAP3_COMMON_H__ */
78