1 /*
2  * Common configuration header file for all Keystone II EVM platforms
3  *
4  * (C) Copyright 2012-2014
5  *     Texas Instruments Incorporated, <www.ti.com>
6  *
7  * SPDX-License-Identifier:     GPL-2.0+
8  */
9 
10 #ifndef __CONFIG_KS2_EVM_H
11 #define __CONFIG_KS2_EVM_H
12 
13 #define CONFIG_SOC_KEYSTONE
14 
15 /* U-Boot Build Configuration */
16 #define CONFIG_SKIP_LOWLEVEL_INIT	/* U-Boot is a 2nd stage loader */
17 #define CONFIG_BOARD_EARLY_INIT_F
18 
19 /* SoC Configuration */
20 #define CONFIG_ARCH_CPU_INIT
21 #define CONFIG_SYS_ARCH_TIMER
22 #ifndef CONFIG_SYS_TEXT_BASE
23 #define CONFIG_SYS_TEXT_BASE		0x0c000000
24 #endif
25 #define CONFIG_SPL_TARGET		"u-boot-spi.gph"
26 #define CONFIG_SYS_DCACHE_OFF
27 
28 /* Memory Configuration */
29 #define CONFIG_NR_DRAM_BANKS		2
30 #define CONFIG_SYS_LPAE_SDRAM_BASE	0x800000000
31 #define CONFIG_MAX_RAM_BANK_SIZE	(2 << 30)       /* 2GB */
32 #define CONFIG_STACKSIZE		(512 << 10)     /* 512 KiB */
33 #define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SPL_TEXT_BASE - \
34 					GENERATED_GBL_DATA_SIZE)
35 
36 #ifdef CONFIG_SYS_MALLOC_F_LEN
37 #define SPL_MALLOC_F_SIZE	CONFIG_SYS_MALLOC_F_LEN
38 #else
39 #define SPL_MALLOC_F_SIZE	0
40 #endif
41 
42 /* SPL SPI Loader Configuration */
43 #define CONFIG_SPL_PAD_TO		65536
44 #define CONFIG_SPL_MAX_SIZE		(CONFIG_SPL_PAD_TO - 8)
45 #define CONFIG_SPL_BSS_START_ADDR	(CONFIG_SPL_TEXT_BASE + \
46 					CONFIG_SPL_MAX_SIZE)
47 #define CONFIG_SPL_BSS_MAX_SIZE		(32 * 1024)
48 #define CONFIG_SYS_SPL_MALLOC_START	(CONFIG_SPL_BSS_START_ADDR + \
49 					CONFIG_SPL_BSS_MAX_SIZE)
50 #define CONFIG_SYS_SPL_MALLOC_SIZE	(32 * 1024)
51 #define CONFIG_SPL_STACK_SIZE		(8 * 1024)
52 #define CONFIG_SPL_STACK		(CONFIG_SYS_SPL_MALLOC_START + \
53 					CONFIG_SYS_SPL_MALLOC_SIZE + \
54 					SPL_MALLOC_F_SIZE + \
55 					CONFIG_SPL_STACK_SIZE - 4)
56 #define CONFIG_SPL_SPI_LOAD
57 #define CONFIG_SYS_SPI_U_BOOT_OFFS	CONFIG_SPL_PAD_TO
58 
59 /* UART Configuration */
60 #define CONFIG_SYS_NS16550_MEM32
61 #if defined(CONFIG_SPL_BUILD) || !defined(CONFIG_DM_SERIAL)
62 #define CONFIG_SYS_NS16550_SERIAL
63 #define CONFIG_SYS_NS16550_REG_SIZE	-4
64 #endif
65 #define CONFIG_SYS_NS16550_COM1		KS2_UART0_BASE
66 #define CONFIG_SYS_NS16550_COM2		KS2_UART1_BASE
67 #define CONFIG_CONS_INDEX		1
68 
69 #ifndef CONFIG_SOC_K2G
70 #define CONFIG_SYS_NS16550_CLK		ks_clk_get_rate(KS2_CLK1_6)
71 #else
72 #define CONFIG_SYS_NS16550_CLK		ks_clk_get_rate(uart_pll_clk) / 2
73 #endif
74 
75 /* SPI Configuration */
76 #define CONFIG_DAVINCI_SPI
77 #define CONFIG_SYS_SPI_CLK		ks_clk_get_rate(KS2_CLK1_6)
78 #define CONFIG_SF_DEFAULT_SPEED		30000000
79 #define CONFIG_ENV_SPI_MAX_HZ		CONFIG_SF_DEFAULT_SPEED
80 #define CONFIG_SYS_SPI0
81 #define CONFIG_SYS_SPI_BASE		KS2_SPI0_BASE
82 #define CONFIG_SYS_SPI0_NUM_CS		4
83 #define CONFIG_SYS_SPI1
84 #define CONFIG_SYS_SPI1_BASE		KS2_SPI1_BASE
85 #define CONFIG_SYS_SPI1_NUM_CS		4
86 #define CONFIG_SYS_SPI2
87 #define CONFIG_SYS_SPI2_BASE		KS2_SPI2_BASE
88 #define CONFIG_SYS_SPI2_NUM_CS		4
89 #ifdef CONFIG_SPL_BUILD
90 #undef CONFIG_DM_SPI
91 #undef CONFIG_DM_SPI_FLASH
92 #endif
93 
94 /* Network Configuration */
95 #define CONFIG_PHYLIB
96 #define CONFIG_PHY_MARVELL
97 #define CONFIG_MII
98 #define CONFIG_BOOTP_DEFAULT
99 #define CONFIG_BOOTP_DNS
100 #define CONFIG_BOOTP_DNS2
101 #define CONFIG_BOOTP_SEND_HOSTNAME
102 #define CONFIG_NET_RETRY_COUNT		32
103 #define CONFIG_SYS_SGMII_REFCLK_MHZ	312
104 #define CONFIG_SYS_SGMII_LINERATE_MHZ	1250
105 #define CONFIG_SYS_SGMII_RATESCALE	2
106 
107 /* Keyston Navigator Configuration */
108 #define CONFIG_TI_KSNAV
109 #define CONFIG_KSNAV_QM_BASE_ADDRESS		KS2_QM_BASE_ADDRESS
110 #define CONFIG_KSNAV_QM_CONF_BASE		KS2_QM_CONF_BASE
111 #define CONFIG_KSNAV_QM_DESC_SETUP_BASE		KS2_QM_DESC_SETUP_BASE
112 #define CONFIG_KSNAV_QM_STATUS_RAM_BASE		KS2_QM_STATUS_RAM_BASE
113 #define CONFIG_KSNAV_QM_INTD_CONF_BASE		KS2_QM_INTD_CONF_BASE
114 #define CONFIG_KSNAV_QM_PDSP1_CMD_BASE		KS2_QM_PDSP1_CMD_BASE
115 #define CONFIG_KSNAV_QM_PDSP1_CTRL_BASE		KS2_QM_PDSP1_CTRL_BASE
116 #define CONFIG_KSNAV_QM_PDSP1_IRAM_BASE		KS2_QM_PDSP1_IRAM_BASE
117 #define CONFIG_KSNAV_QM_MANAGER_QUEUES_BASE	KS2_QM_MANAGER_QUEUES_BASE
118 #define CONFIG_KSNAV_QM_MANAGER_Q_PROXY_BASE	KS2_QM_MANAGER_Q_PROXY_BASE
119 #define CONFIG_KSNAV_QM_QUEUE_STATUS_BASE	KS2_QM_QUEUE_STATUS_BASE
120 #define CONFIG_KSNAV_QM_LINK_RAM_BASE		KS2_QM_LINK_RAM_BASE
121 #define CONFIG_KSNAV_QM_REGION_NUM		KS2_QM_REGION_NUM
122 #define CONFIG_KSNAV_QM_QPOOL_NUM		KS2_QM_QPOOL_NUM
123 
124 /* NETCP pktdma */
125 #define CONFIG_KSNAV_PKTDMA_NETCP
126 #define CONFIG_KSNAV_NETCP_PDMA_CTRL_BASE	KS2_NETCP_PDMA_CTRL_BASE
127 #define CONFIG_KSNAV_NETCP_PDMA_TX_BASE		KS2_NETCP_PDMA_TX_BASE
128 #define CONFIG_KSNAV_NETCP_PDMA_TX_CH_NUM	KS2_NETCP_PDMA_TX_CH_NUM
129 #define CONFIG_KSNAV_NETCP_PDMA_RX_BASE		KS2_NETCP_PDMA_RX_BASE
130 #define CONFIG_KSNAV_NETCP_PDMA_RX_CH_NUM	KS2_NETCP_PDMA_RX_CH_NUM
131 #define CONFIG_KSNAV_NETCP_PDMA_SCHED_BASE	KS2_NETCP_PDMA_SCHED_BASE
132 #define CONFIG_KSNAV_NETCP_PDMA_RX_FLOW_BASE	KS2_NETCP_PDMA_RX_FLOW_BASE
133 #define CONFIG_KSNAV_NETCP_PDMA_RX_FLOW_NUM	KS2_NETCP_PDMA_RX_FLOW_NUM
134 #define CONFIG_KSNAV_NETCP_PDMA_RX_FREE_QUEUE	KS2_NETCP_PDMA_RX_FREE_QUEUE
135 #define CONFIG_KSNAV_NETCP_PDMA_RX_RCV_QUEUE	KS2_NETCP_PDMA_RX_RCV_QUEUE
136 #define CONFIG_KSNAV_NETCP_PDMA_TX_SND_QUEUE	KS2_NETCP_PDMA_TX_SND_QUEUE
137 
138 /* Keystone net */
139 #define CONFIG_DRIVER_TI_KEYSTONE_NET
140 #define CONFIG_KSNET_MAC_ID_BASE		KS2_MAC_ID_BASE_ADDR
141 #define CONFIG_KSNET_NETCP_BASE			KS2_NETCP_BASE
142 #define CONFIG_KSNET_SERDES_SGMII_BASE		KS2_SGMII_SERDES_BASE
143 #define CONFIG_KSNET_SERDES_SGMII2_BASE		KS2_SGMII_SERDES2_BASE
144 #define CONFIG_KSNET_SERDES_LANES_PER_SGMII	KS2_LANES_PER_SGMII_SERDES
145 
146 /* SerDes */
147 #define CONFIG_TI_KEYSTONE_SERDES
148 
149 #define CONFIG_AEMIF_CNTRL_BASE		KS2_AEMIF_CNTRL_BASE
150 
151 /* I2C Configuration */
152 #define CONFIG_SYS_I2C_DAVINCI
153 #define CONFIG_SYS_DAVINCI_I2C_SPEED	100000
154 #define CONFIG_SYS_DAVINCI_I2C_SLAVE	0x10 /* SMBus host address */
155 #define CONFIG_SYS_DAVINCI_I2C_SPEED1	100000
156 #define CONFIG_SYS_DAVINCI_I2C_SLAVE1	0x10 /* SMBus host address */
157 #define CONFIG_SYS_DAVINCI_I2C_SPEED2	100000
158 #define CONFIG_SYS_DAVINCI_I2C_SLAVE2	0x10 /* SMBus host address */
159 #define I2C_BUS_MAX			3
160 
161 /* EEPROM definitions */
162 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN		2
163 #define CONFIG_SYS_I2C_EEPROM_ADDR		0x50
164 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	6
165 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	20
166 #define CONFIG_ENV_EEPROM_IS_ON_I2C
167 
168 /* NAND Configuration */
169 #define CONFIG_NAND_DAVINCI
170 #define CONFIG_KEYSTONE_RBL_NAND
171 #define CONFIG_KEYSTONE_NAND_MAX_RBL_SIZE	CONFIG_ENV_OFFSET
172 #define CONFIG_SYS_NAND_MASK_CLE		0x4000
173 #define CONFIG_SYS_NAND_MASK_ALE		0x2000
174 #define CONFIG_SYS_NAND_CS			2
175 #define CONFIG_SYS_NAND_USE_FLASH_BBT
176 #define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST
177 
178 #define CONFIG_SYS_NAND_LARGEPAGE
179 #define CONFIG_SYS_NAND_BASE_LIST		{ 0x30000000, }
180 #define CONFIG_SYS_MAX_NAND_DEVICE		1
181 #define CONFIG_SYS_NAND_MAX_CHIPS		1
182 #define CONFIG_SYS_NAND_NO_SUBPAGE_WRITE
183 #define CONFIG_ENV_SIZE				(256 << 10)  /* 256 KiB */
184 #define CONFIG_ENV_IS_IN_NAND
185 #define CONFIG_ENV_OFFSET			0x100000
186 #define CONFIG_MTD_PARTITIONS
187 #define CONFIG_RBTREE
188 #define CONFIG_LZO
189 #define MTDIDS_DEFAULT			"nand0=davinci_nand.0"
190 #define MTDPARTS_DEFAULT		"mtdparts=davinci_nand.0:" \
191 					"1024k(bootloader)ro,512k(params)ro," \
192 					"-(ubifs)"
193 
194 /* USB Configuration */
195 #define CONFIG_USB_XHCI_KEYSTONE
196 #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS	2
197 #define CONFIG_EFI_PARTITION
198 #define CONFIG_FS_FAT
199 #define CONFIG_USB_SS_BASE			KS2_USB_SS_BASE
200 #define CONFIG_USB_HOST_XHCI_BASE		KS2_USB_HOST_XHCI_BASE
201 #define CONFIG_DEV_USB_PHY_BASE			KS2_DEV_USB_PHY_BASE
202 #define CONFIG_USB_PHY_CFG_BASE			KS2_USB_PHY_CFG_BASE
203 
204 /* U-Boot command configuration */
205 #define CONFIG_CMD_SAVES
206 #define CONFIG_CMD_UBIFS
207 #define CONFIG_CMD_EEPROM
208 
209 /* U-Boot general configuration */
210 #define CONFIG_MISC_INIT_R
211 #define CONFIG_CRC32_VERIFY
212 #define CONFIG_MX_CYCLIC
213 #define CONFIG_TIMESTAMP
214 
215 /* EDMA3 */
216 #define CONFIG_TI_EDMA3
217 
218 #define DEFAULT_FW_INITRAMFS_BOOT_ENV					\
219 	"name_fw_rd=k2-fw-initrd.cpio.gz\0"				\
220 	"set_rd_spec=setenv rd_spec ${rdaddr}:${filesize}\0"		\
221 	"init_fw_rd_net=dhcp ${rdaddr} ${tftp_root}/${name_fw_rd}; "	\
222 		"run set_rd_spec\0"					\
223 	"init_fw_rd_nfs=nfs ${rdaddr} ${nfs_root}/boot/${name_fw_rd}; "	\
224 		"run set_rd_spec\0"					\
225 	"init_fw_rd_ramfs=setenv rd_spec -\0"				\
226 	"init_fw_rd_ubi=ubifsload ${rdaddr} ${bootdir}/${name_fw_rd}; "	\
227 		"run set_rd_spec\0"					\
228 
229 #define DEFAULT_PMMC_BOOT_ENV						\
230 	"set_name_pmmc=setenv name_pmmc ti-sci-firmware-${soc_variant}.bin\0" \
231 	"dev_pmmc=0\0"							\
232 	"get_pmmc_net=dhcp ${loadaddr} ${tftp_root}/${name_pmmc}\0"	\
233 	"get_pmmc_nfs=nfs ${loadaddr} ${nfs_root}/boot/${name_pmmc}\0"	\
234 	"get_pmmc_ramfs=run get_pmmc_net\0"				\
235 	"get_pmmc_mmc=load mmc ${bootpart} ${loadaddr} "		\
236 			"${bootdir}/${name_pmmc}\0"			\
237 	"get_pmmc_ubi=ubifsload ${loadaddr} ${bootdir}/${name_pmmc}\0"	\
238 	"run_pmmc=rproc init; rproc list; "				\
239 		"rproc load ${dev_pmmc} ${loadaddr} 0x${filesize}; "	\
240 		"rproc start ${dev_pmmc}\0"				\
241 
242 #define CONFIG_EXTRA_ENV_SETTINGS					\
243 	DEFAULT_LINUX_BOOT_ENV						\
244 	CONFIG_EXTRA_ENV_KS2_BOARD_SETTINGS				\
245 	"bootdir=/boot\0" \
246 	"tftp_root=/\0"							\
247 	"nfs_root=/export\0"						\
248 	"mem_lpae=1\0"							\
249 	"addr_ubi=0x82000000\0"						\
250 	"addr_secdb_key=0xc000000\0"					\
251 	"name_kern=zImage\0"						\
252 	"addr_mon=0x87000000\0"						\
253 	"run_mon=mon_install ${addr_mon}\0"				\
254 	"run_kern=bootz ${loadaddr} ${rd_spec} ${fdtaddr}\0"		\
255 	"init_net=run args_all args_net\0"				\
256 	"init_nfs=setenv autoload no; dhcp; run args_all args_net\0"	\
257 	"init_ubi=run args_all args_ubi; "				\
258 		"ubi part ubifs; ubifsmount ubi:rootfs;\0"			\
259 	"get_fdt_net=dhcp ${fdtaddr} ${tftp_root}/${name_fdt}\0"	\
260 	"get_fdt_nfs=nfs ${fdtaddr} ${nfs_root}/boot/${name_fdt}\0"	\
261 	"get_fdt_ubi=ubifsload ${fdtaddr} ${bootdir}/${name_fdt}\0"		\
262 	"get_kern_net=dhcp ${loadaddr} ${tftp_root}/${name_kern}\0"	\
263 	"get_kern_nfs=nfs ${loadaddr} ${nfs_root}/boot/${name_kern}\0"	\
264 	"get_kern_ubi=ubifsload ${loadaddr} ${bootdir}/${name_kern}\0"		\
265 	"get_mon_net=dhcp ${addr_mon} ${tftp_root}/${name_mon}\0"	\
266 	"get_mon_nfs=nfs ${addr_mon} ${nfs_root}/boot/${name_mon}\0"	\
267 	"get_mon_ubi=ubifsload ${addr_mon} ${bootdir}/${name_mon}\0"		\
268 	"get_uboot_net=dhcp ${loadaddr} ${tftp_root}/${name_uboot}\0"	\
269 	"get_uboot_nfs=nfs ${loadaddr} ${nfs_root}/boot/${name_uboot}\0" \
270 	"burn_uboot_spi=sf probe; sf erase 0 0x80000; "		\
271 		"sf write ${loadaddr} 0 ${filesize}\0"		\
272 	"burn_uboot_nand=nand erase 0 0x100000; "			\
273 		"nand write ${loadaddr} 0 ${filesize}\0"		\
274 	"args_all=setenv bootargs console=ttyS0,115200n8 rootwait=1\0"	\
275 	"args_net=setenv bootargs ${bootargs} rootfstype=nfs "		\
276 		"root=/dev/nfs rw nfsroot=${serverip}:${nfs_root},"	\
277 		"${nfs_options} ip=dhcp\0"				\
278 	"nfs_options=v3,tcp,rsize=4096,wsize=4096\0"			\
279 	"get_fdt_ramfs=dhcp ${fdtaddr} ${tftp_root}/${name_fdt}\0"	\
280 	"get_kern_ramfs=dhcp ${loadaddr} ${tftp_root}/${name_kern}\0"	\
281 	"get_mon_ramfs=dhcp ${addr_mon} ${tftp_root}/${name_mon}\0"	\
282 	"get_fs_ramfs=dhcp ${rdaddr} ${tftp_root}/${name_fs}\0"	\
283 	"get_ubi_net=dhcp ${addr_ubi} ${tftp_root}/${name_ubi}\0"	\
284 	"get_ubi_nfs=nfs ${addr_ubi} ${nfs_root}/boot/${name_ubi}\0"	\
285 	"burn_ubi=nand erase.part ubifs; "				\
286 		"nand write ${addr_ubi} ubifs ${filesize}\0"		\
287 	"init_ramfs=run args_all args_ramfs get_fs_ramfs\0"		\
288 	"args_ramfs=setenv bootargs ${bootargs} "			\
289 		"rdinit=/sbin/init rw root=/dev/ram0 "			\
290 		"initrd=0x808080000,80M\0"				\
291 	"no_post=1\0"							\
292 	"mtdparts=mtdparts=davinci_nand.0:"				\
293 		"1024k(bootloader)ro,512k(params)ro,-(ubifs)\0"
294 
295 #ifndef CONFIG_BOOTCOMMAND
296 #define CONFIG_BOOTCOMMAND						\
297 	"run init_${boot} get_mon_${boot} run_mon init_fw_rd_${boot} "	\
298 	"get_fdt_${boot} get_kern_${boot} run_kern"
299 #endif
300 
301 #define CONFIG_BOOTARGS							\
302 
303 /* Now for the remaining common defines */
304 #include <configs/ti_armv7_common.h>
305 
306 /* We wont be loading up OS from SPL for now.. */
307 
308 /* We do not have MMC support.. yet.. */
309 #undef CONFIG_MMC
310 #undef CONFIG_GENERIC_MMC
311 
312 /* And no support for GPIO, yet.. */
313 
314 /* we may include files below only after all above definitions */
315 #include <asm/arch/hardware.h>
316 #include <asm/arch/clock.h>
317 #ifndef CONFIG_SOC_K2G
318 #define CONFIG_SYS_HZ_CLOCK		ks_clk_get_rate(KS2_CLK1_6)
319 #else
320 #define CONFIG_SYS_HZ_CLOCK		external_clk[sys_clk]
321 #endif
322 
323 #endif /* __CONFIG_KS2_EVM_H */
324