1 /* 2 * Common configuration header file for all Keystone II EVM platforms 3 * 4 * (C) Copyright 2012-2014 5 * Texas Instruments Incorporated, <www.ti.com> 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 10 #ifndef __CONFIG_KS2_EVM_H 11 #define __CONFIG_KS2_EVM_H 12 13 #define CONFIG_SOC_KEYSTONE 14 15 /* U-Boot Build Configuration */ 16 #define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is a 2nd stage loader */ 17 18 /* SoC Configuration */ 19 #define CONFIG_ARCH_CPU_INIT 20 #define CONFIG_SYS_ARCH_TIMER 21 #ifndef CONFIG_SYS_TEXT_BASE 22 #define CONFIG_SYS_TEXT_BASE 0x0c000000 23 #endif 24 #define CONFIG_SPL_TARGET "u-boot-spi.gph" 25 #define CONFIG_SYS_DCACHE_OFF 26 27 /* Memory Configuration */ 28 #define CONFIG_NR_DRAM_BANKS 2 29 #define CONFIG_SYS_LPAE_SDRAM_BASE 0x800000000 30 #define CONFIG_MAX_RAM_BANK_SIZE (2 << 30) /* 2GB */ 31 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SPL_TEXT_BASE - \ 32 GENERATED_GBL_DATA_SIZE) 33 34 #ifdef CONFIG_SYS_MALLOC_F_LEN 35 #define SPL_MALLOC_F_SIZE CONFIG_SYS_MALLOC_F_LEN 36 #else 37 #define SPL_MALLOC_F_SIZE 0 38 #endif 39 40 /* SPL SPI Loader Configuration */ 41 #define CONFIG_SPL_PAD_TO 65536 42 #define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_PAD_TO - 8) 43 #define CONFIG_SPL_BSS_START_ADDR (CONFIG_SPL_TEXT_BASE + \ 44 CONFIG_SPL_MAX_SIZE) 45 #define CONFIG_SPL_BSS_MAX_SIZE (32 * 1024) 46 #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \ 47 CONFIG_SPL_BSS_MAX_SIZE) 48 #define CONFIG_SYS_SPL_MALLOC_SIZE (32 * 1024) 49 #define KEYSTONE_SPL_STACK_SIZE (8 * 1024) 50 #define CONFIG_SPL_STACK (CONFIG_SYS_SPL_MALLOC_START + \ 51 CONFIG_SYS_SPL_MALLOC_SIZE + \ 52 SPL_MALLOC_F_SIZE + \ 53 KEYSTONE_SPL_STACK_SIZE - 4) 54 #define CONFIG_SPL_SPI_LOAD 55 #define CONFIG_SYS_SPI_U_BOOT_OFFS CONFIG_SPL_PAD_TO 56 57 /* SRAM scratch space entries */ 58 #define SRAM_SCRATCH_SPACE_ADDR CONFIG_SPL_STACK + 0x8 59 60 #define TI_SRAM_SCRATCH_BOARD_EEPROM_START (SRAM_SCRATCH_SPACE_ADDR) 61 #define TI_SRAM_SCRATCH_BOARD_EEPROM_END (SRAM_SCRATCH_SPACE_ADDR + 0x200) 62 #define KEYSTONE_SRAM_SCRATCH_SPACE_END (TI_SRAM_SCRATCH_BOARD_EEPROM_END) 63 64 /* UART Configuration */ 65 #define CONFIG_SYS_NS16550_MEM32 66 #if defined(CONFIG_SPL_BUILD) || !defined(CONFIG_DM_SERIAL) 67 #define CONFIG_SYS_NS16550_SERIAL 68 #define CONFIG_SYS_NS16550_REG_SIZE -4 69 #endif 70 #define CONFIG_SYS_NS16550_COM1 KS2_UART0_BASE 71 #define CONFIG_SYS_NS16550_COM2 KS2_UART1_BASE 72 #define CONFIG_CONS_INDEX 1 73 74 #ifndef CONFIG_SOC_K2G 75 #define CONFIG_SYS_NS16550_CLK ks_clk_get_rate(KS2_CLK1_6) 76 #else 77 #define CONFIG_SYS_NS16550_CLK ks_clk_get_rate(uart_pll_clk) / 2 78 #endif 79 80 /* SPI Configuration */ 81 #define CONFIG_DAVINCI_SPI 82 #define CONFIG_SYS_SPI_CLK ks_clk_get_rate(KS2_CLK1_6) 83 #define CONFIG_SF_DEFAULT_SPEED 30000000 84 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED 85 #define CONFIG_SYS_SPI0 86 #define CONFIG_SYS_SPI_BASE KS2_SPI0_BASE 87 #define CONFIG_SYS_SPI0_NUM_CS 4 88 #define CONFIG_SYS_SPI1 89 #define CONFIG_SYS_SPI1_BASE KS2_SPI1_BASE 90 #define CONFIG_SYS_SPI1_NUM_CS 4 91 #define CONFIG_SYS_SPI2 92 #define CONFIG_SYS_SPI2_BASE KS2_SPI2_BASE 93 #define CONFIG_SYS_SPI2_NUM_CS 4 94 #ifdef CONFIG_SPL_BUILD 95 #undef CONFIG_DM_SPI 96 #undef CONFIG_DM_SPI_FLASH 97 #endif 98 99 /* Network Configuration */ 100 #define CONFIG_PHYLIB 101 #define CONFIG_PHY_MARVELL 102 #define CONFIG_MII 103 #define CONFIG_BOOTP_DEFAULT 104 #define CONFIG_BOOTP_DNS 105 #define CONFIG_BOOTP_DNS2 106 #define CONFIG_BOOTP_SEND_HOSTNAME 107 #define CONFIG_NET_RETRY_COUNT 32 108 #define CONFIG_SYS_SGMII_REFCLK_MHZ 312 109 #define CONFIG_SYS_SGMII_LINERATE_MHZ 1250 110 #define CONFIG_SYS_SGMII_RATESCALE 2 111 112 /* Keyston Navigator Configuration */ 113 #define CONFIG_TI_KSNAV 114 #define CONFIG_KSNAV_QM_BASE_ADDRESS KS2_QM_BASE_ADDRESS 115 #define CONFIG_KSNAV_QM_CONF_BASE KS2_QM_CONF_BASE 116 #define CONFIG_KSNAV_QM_DESC_SETUP_BASE KS2_QM_DESC_SETUP_BASE 117 #define CONFIG_KSNAV_QM_STATUS_RAM_BASE KS2_QM_STATUS_RAM_BASE 118 #define CONFIG_KSNAV_QM_INTD_CONF_BASE KS2_QM_INTD_CONF_BASE 119 #define CONFIG_KSNAV_QM_PDSP1_CMD_BASE KS2_QM_PDSP1_CMD_BASE 120 #define CONFIG_KSNAV_QM_PDSP1_CTRL_BASE KS2_QM_PDSP1_CTRL_BASE 121 #define CONFIG_KSNAV_QM_PDSP1_IRAM_BASE KS2_QM_PDSP1_IRAM_BASE 122 #define CONFIG_KSNAV_QM_MANAGER_QUEUES_BASE KS2_QM_MANAGER_QUEUES_BASE 123 #define CONFIG_KSNAV_QM_MANAGER_Q_PROXY_BASE KS2_QM_MANAGER_Q_PROXY_BASE 124 #define CONFIG_KSNAV_QM_QUEUE_STATUS_BASE KS2_QM_QUEUE_STATUS_BASE 125 #define CONFIG_KSNAV_QM_LINK_RAM_BASE KS2_QM_LINK_RAM_BASE 126 #define CONFIG_KSNAV_QM_REGION_NUM KS2_QM_REGION_NUM 127 #define CONFIG_KSNAV_QM_QPOOL_NUM KS2_QM_QPOOL_NUM 128 129 /* NETCP pktdma */ 130 #define CONFIG_KSNAV_PKTDMA_NETCP 131 #define CONFIG_KSNAV_NETCP_PDMA_CTRL_BASE KS2_NETCP_PDMA_CTRL_BASE 132 #define CONFIG_KSNAV_NETCP_PDMA_TX_BASE KS2_NETCP_PDMA_TX_BASE 133 #define CONFIG_KSNAV_NETCP_PDMA_TX_CH_NUM KS2_NETCP_PDMA_TX_CH_NUM 134 #define CONFIG_KSNAV_NETCP_PDMA_RX_BASE KS2_NETCP_PDMA_RX_BASE 135 #define CONFIG_KSNAV_NETCP_PDMA_RX_CH_NUM KS2_NETCP_PDMA_RX_CH_NUM 136 #define CONFIG_KSNAV_NETCP_PDMA_SCHED_BASE KS2_NETCP_PDMA_SCHED_BASE 137 #define CONFIG_KSNAV_NETCP_PDMA_RX_FLOW_BASE KS2_NETCP_PDMA_RX_FLOW_BASE 138 #define CONFIG_KSNAV_NETCP_PDMA_RX_FLOW_NUM KS2_NETCP_PDMA_RX_FLOW_NUM 139 #define CONFIG_KSNAV_NETCP_PDMA_RX_FREE_QUEUE KS2_NETCP_PDMA_RX_FREE_QUEUE 140 #define CONFIG_KSNAV_NETCP_PDMA_RX_RCV_QUEUE KS2_NETCP_PDMA_RX_RCV_QUEUE 141 #define CONFIG_KSNAV_NETCP_PDMA_TX_SND_QUEUE KS2_NETCP_PDMA_TX_SND_QUEUE 142 143 /* Keystone net */ 144 #define CONFIG_DRIVER_TI_KEYSTONE_NET 145 #define CONFIG_KSNET_MAC_ID_BASE KS2_MAC_ID_BASE_ADDR 146 #define CONFIG_KSNET_NETCP_BASE KS2_NETCP_BASE 147 #define CONFIG_KSNET_SERDES_SGMII_BASE KS2_SGMII_SERDES_BASE 148 #define CONFIG_KSNET_SERDES_SGMII2_BASE KS2_SGMII_SERDES2_BASE 149 #define CONFIG_KSNET_SERDES_LANES_PER_SGMII KS2_LANES_PER_SGMII_SERDES 150 151 /* SerDes */ 152 #define CONFIG_TI_KEYSTONE_SERDES 153 154 #define CONFIG_AEMIF_CNTRL_BASE KS2_AEMIF_CNTRL_BASE 155 156 /* I2C Configuration */ 157 #define CONFIG_SYS_I2C_DAVINCI 158 #define CONFIG_SYS_DAVINCI_I2C_SPEED 100000 159 #define CONFIG_SYS_DAVINCI_I2C_SLAVE 0x10 /* SMBus host address */ 160 #define CONFIG_SYS_DAVINCI_I2C_SPEED1 100000 161 #define CONFIG_SYS_DAVINCI_I2C_SLAVE1 0x10 /* SMBus host address */ 162 #define CONFIG_SYS_DAVINCI_I2C_SPEED2 100000 163 #define CONFIG_SYS_DAVINCI_I2C_SLAVE2 0x10 /* SMBus host address */ 164 #define I2C_BUS_MAX 3 165 166 /* EEPROM definitions */ 167 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 168 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 169 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6 170 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 20 171 #define CONFIG_ENV_EEPROM_IS_ON_I2C 172 173 /* NAND Configuration */ 174 #define CONFIG_NAND_DAVINCI 175 #define CONFIG_KEYSTONE_RBL_NAND 176 #define CONFIG_KEYSTONE_NAND_MAX_RBL_SIZE CONFIG_ENV_OFFSET 177 #define CONFIG_SYS_NAND_MASK_CLE 0x4000 178 #define CONFIG_SYS_NAND_MASK_ALE 0x2000 179 #define CONFIG_SYS_NAND_CS 2 180 #define CONFIG_SYS_NAND_USE_FLASH_BBT 181 #define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST 182 183 #define CONFIG_SYS_NAND_LARGEPAGE 184 #define CONFIG_SYS_NAND_BASE_LIST { 0x30000000, } 185 #define CONFIG_SYS_MAX_NAND_DEVICE 1 186 #define CONFIG_SYS_NAND_MAX_CHIPS 1 187 #define CONFIG_SYS_NAND_NO_SUBPAGE_WRITE 188 #define CONFIG_MTD_PARTITIONS 189 #define MTDIDS_DEFAULT "nand0=davinci_nand.0" 190 #define MTDPARTS_DEFAULT "mtdparts=davinci_nand.0:" \ 191 "1024k(bootloader)ro,512k(params)ro," \ 192 "-(ubifs)" 193 194 /* USB Configuration */ 195 #define CONFIG_USB_XHCI_KEYSTONE 196 #define CONFIG_USB_SS_BASE KS2_USB_SS_BASE 197 #define CONFIG_USB_HOST_XHCI_BASE KS2_USB_HOST_XHCI_BASE 198 #define CONFIG_DEV_USB_PHY_BASE KS2_DEV_USB_PHY_BASE 199 #define CONFIG_USB_PHY_CFG_BASE KS2_USB_PHY_CFG_BASE 200 201 /* U-Boot command configuration */ 202 #define CONFIG_CMD_SAVES 203 204 /* U-Boot general configuration */ 205 #define CONFIG_MISC_INIT_R 206 #define CONFIG_MX_CYCLIC 207 #define CONFIG_TIMESTAMP 208 209 /* EDMA3 */ 210 #define CONFIG_TI_EDMA3 211 212 #define KERNEL_MTD_PARTS \ 213 "mtdparts=" \ 214 SPI_MTD_PARTS 215 216 #define DEFAULT_FW_INITRAMFS_BOOT_ENV \ 217 "name_fw_rd=k2-fw-initrd.cpio.gz\0" \ 218 "set_rd_spec=setenv rd_spec ${rdaddr}:${filesize}\0" \ 219 "init_fw_rd_net=dhcp ${rdaddr} ${tftp_root}/${name_fw_rd}; " \ 220 "run set_rd_spec\0" \ 221 "init_fw_rd_nfs=nfs ${rdaddr} ${nfs_root}/boot/${name_fw_rd}; " \ 222 "run set_rd_spec\0" \ 223 "init_fw_rd_ramfs=setenv rd_spec -\0" \ 224 "init_fw_rd_ubi=ubifsload ${rdaddr} ${bootdir}/${name_fw_rd}; " \ 225 "run set_rd_spec\0" \ 226 227 #define DEFAULT_PMMC_BOOT_ENV \ 228 "set_name_pmmc=setenv name_pmmc ti-sci-firmware-${soc_variant}.bin\0" \ 229 "dev_pmmc=0\0" \ 230 "get_pmmc_net=dhcp ${loadaddr} ${tftp_root}/${name_pmmc}\0" \ 231 "get_pmmc_nfs=nfs ${loadaddr} ${nfs_root}/boot/${name_pmmc}\0" \ 232 "get_pmmc_ramfs=run get_pmmc_net\0" \ 233 "get_pmmc_mmc=load mmc ${bootpart} ${loadaddr} " \ 234 "${bootdir}/${name_pmmc}\0" \ 235 "get_pmmc_ubi=ubifsload ${loadaddr} ${bootdir}/${name_pmmc}\0" \ 236 "run_pmmc=rproc init; rproc list; " \ 237 "rproc load ${dev_pmmc} ${loadaddr} 0x${filesize}; " \ 238 "rproc start ${dev_pmmc}\0" \ 239 240 #define CONFIG_EXTRA_ENV_SETTINGS \ 241 DEFAULT_LINUX_BOOT_ENV \ 242 CONFIG_EXTRA_ENV_KS2_BOARD_SETTINGS \ 243 "bootdir=/boot\0" \ 244 "tftp_root=/\0" \ 245 "nfs_root=/export\0" \ 246 "mem_lpae=1\0" \ 247 "addr_ubi=0x82000000\0" \ 248 "addr_secdb_key=0xc000000\0" \ 249 "name_kern=zImage\0" \ 250 "addr_mon=0x87000000\0" \ 251 "addr_non_sec_mon=0x0c087fc0\0" \ 252 "addr_load_sec_bm=0x0c08c000\0" \ 253 "run_mon=mon_install ${addr_mon}\0" \ 254 "run_mon_hs=mon_install ${addr_non_sec_mon} " \ 255 "${addr_load_sec_bm}\0" \ 256 "run_kern=bootz ${loadaddr} ${rd_spec} ${fdtaddr}\0" \ 257 "init_net=run args_all args_net\0" \ 258 "init_nfs=setenv autoload no; dhcp; run args_all args_net\0" \ 259 "init_ubi=run args_all args_ubi; " \ 260 "ubi part ubifs; ubifsmount ubi:rootfs;\0" \ 261 "get_fdt_net=dhcp ${fdtaddr} ${tftp_root}/${name_fdt}\0" \ 262 "get_fdt_nfs=nfs ${fdtaddr} ${nfs_root}/boot/${name_fdt}\0" \ 263 "get_fdt_ubi=ubifsload ${fdtaddr} ${bootdir}/${name_fdt}\0" \ 264 "get_kern_net=dhcp ${loadaddr} ${tftp_root}/${name_kern}\0" \ 265 "get_kern_nfs=nfs ${loadaddr} ${nfs_root}/boot/${name_kern}\0" \ 266 "get_kern_ubi=ubifsload ${loadaddr} ${bootdir}/${name_kern}\0" \ 267 "get_mon_net=dhcp ${addr_mon} ${tftp_root}/${name_mon}\0" \ 268 "get_mon_nfs=nfs ${addr_mon} ${nfs_root}/boot/${name_mon}\0" \ 269 "get_mon_ubi=ubifsload ${addr_mon} ${bootdir}/${name_mon}\0" \ 270 "get_fit_net=dhcp ${fit_loadaddr} ${tftp_root}" \ 271 "/${fit_bootfile}\0" \ 272 "get_fit_nfs=nfs ${fit_loadaddr} ${nfs_root}/boot/${fit_bootfile}\0"\ 273 "get_fit_ubi=ubifsload ${fit_loadaddr} ${bootdir}/${fit_bootfile}\0"\ 274 "get_fit_mmc=load mmc ${bootpart} ${fit_loadaddr} " \ 275 "${bootdir}/${fit_bootfile}\0" \ 276 "get_uboot_net=dhcp ${loadaddr} ${tftp_root}/${name_uboot}\0" \ 277 "get_uboot_nfs=nfs ${loadaddr} ${nfs_root}/boot/${name_uboot}\0" \ 278 "burn_uboot_spi=sf probe; sf erase 0 0x80000; " \ 279 "sf write ${loadaddr} 0 ${filesize}\0" \ 280 "burn_uboot_nand=nand erase 0 0x100000; " \ 281 "nand write ${loadaddr} 0 ${filesize}\0" \ 282 "args_all=setenv bootargs console=ttyS0,115200n8 rootwait=1 " \ 283 KERNEL_MTD_PARTS \ 284 "args_net=setenv bootargs ${bootargs} rootfstype=nfs " \ 285 "root=/dev/nfs rw nfsroot=${serverip}:${nfs_root}," \ 286 "${nfs_options} ip=dhcp\0" \ 287 "nfs_options=v3,tcp,rsize=4096,wsize=4096\0" \ 288 "get_fdt_ramfs=dhcp ${fdtaddr} ${tftp_root}/${name_fdt}\0" \ 289 "get_kern_ramfs=dhcp ${loadaddr} ${tftp_root}/${name_kern}\0" \ 290 "get_mon_ramfs=dhcp ${addr_mon} ${tftp_root}/${name_mon}\0" \ 291 "get_fit_ramfs=dhcp ${fit_loadaddr} ${tftp_root}" \ 292 "/${fit_bootfile}\0" \ 293 "get_fs_ramfs=dhcp ${rdaddr} ${tftp_root}/${name_fs}\0" \ 294 "get_ubi_net=dhcp ${addr_ubi} ${tftp_root}/${name_ubi}\0" \ 295 "get_ubi_nfs=nfs ${addr_ubi} ${nfs_root}/boot/${name_ubi}\0" \ 296 "burn_ubi=nand erase.part ubifs; " \ 297 "nand write ${addr_ubi} ubifs ${filesize}\0" \ 298 "init_ramfs=run args_all args_ramfs get_fs_ramfs\0" \ 299 "args_ramfs=setenv bootargs ${bootargs} " \ 300 "rdinit=/sbin/init rw root=/dev/ram0 " \ 301 "initrd=0x808080000,80M\0" \ 302 "no_post=1\0" \ 303 "mtdparts=mtdparts=davinci_nand.0:" \ 304 "1024k(bootloader)ro,512k(params)ro,-(ubifs)\0" 305 306 #ifndef CONFIG_BOOTCOMMAND 307 #ifndef CONFIG_TI_SECURE_DEVICE 308 #define CONFIG_BOOTCOMMAND \ 309 "run init_${boot}; " \ 310 "run get_mon_${boot} run_mon; " \ 311 "run get_kern_${boot}; " \ 312 "run init_fw_rd_${boot}; " \ 313 "run get_fdt_${boot}; " \ 314 "run run_kern" 315 #else 316 #define CONFIG_BOOTCOMMAND \ 317 "run run_mon_hs; " \ 318 "run init_${boot}; " \ 319 "run get_fit_${boot}; " \ 320 "bootm ${fit_loadaddr}#${name_fdt}" 321 #endif 322 #endif 323 324 #define CONFIG_BOOTARGS \ 325 326 /* Now for the remaining common defines */ 327 #include <configs/ti_armv7_common.h> 328 329 /* we may include files below only after all above definitions */ 330 #include <asm/arch/hardware.h> 331 #include <asm/arch/clock.h> 332 #ifndef CONFIG_SOC_K2G 333 #define CONFIG_SYS_HZ_CLOCK ks_clk_get_rate(KS2_CLK1_6) 334 #else 335 #define CONFIG_SYS_HZ_CLOCK get_external_clk(sys_clk) 336 #endif 337 338 #endif /* __CONFIG_KS2_EVM_H */ 339