1*83d290c5STom Rini /* SPDX-License-Identifier: GPL-2.0+ */
2e8428d6fSNishanth Menon /*
3e8428d6fSNishanth Menon  * Common configuration header file for all Keystone II EVM platforms
4e8428d6fSNishanth Menon  *
5e8428d6fSNishanth Menon  * (C) Copyright 2012-2014
6e8428d6fSNishanth Menon  *     Texas Instruments Incorporated, <www.ti.com>
7e8428d6fSNishanth Menon  */
8e8428d6fSNishanth Menon 
9e8428d6fSNishanth Menon #ifndef __CONFIG_KS2_EVM_H
10e8428d6fSNishanth Menon #define __CONFIG_KS2_EVM_H
11e8428d6fSNishanth Menon 
12e8428d6fSNishanth Menon #define CONFIG_SOC_KEYSTONE
13e8428d6fSNishanth Menon 
14e8428d6fSNishanth Menon /* U-Boot Build Configuration */
15e8428d6fSNishanth Menon #define CONFIG_SKIP_LOWLEVEL_INIT	/* U-Boot is a 2nd stage loader */
16e8428d6fSNishanth Menon 
17e8428d6fSNishanth Menon /* SoC Configuration */
18e8428d6fSNishanth Menon #define CONFIG_ARCH_CPU_INIT
19e8428d6fSNishanth Menon #define CONFIG_SPL_TARGET		"u-boot-spi.gph"
20e8428d6fSNishanth Menon #define CONFIG_SYS_DCACHE_OFF
21e8428d6fSNishanth Menon 
22e8428d6fSNishanth Menon /* Memory Configuration */
23e8428d6fSNishanth Menon #define CONFIG_NR_DRAM_BANKS		2
24e8428d6fSNishanth Menon #define CONFIG_SYS_LPAE_SDRAM_BASE	0x800000000
25e8428d6fSNishanth Menon #define CONFIG_MAX_RAM_BANK_SIZE	(2 << 30)       /* 2GB */
26401f2d91SLokesh Vutla #define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SPL_TEXT_BASE - \
27e8428d6fSNishanth Menon 					GENERATED_GBL_DATA_SIZE)
28e8428d6fSNishanth Menon 
29aaf461f9SLokesh Vutla #ifdef CONFIG_SYS_MALLOC_F_LEN
30aaf461f9SLokesh Vutla #define SPL_MALLOC_F_SIZE	CONFIG_SYS_MALLOC_F_LEN
31aaf461f9SLokesh Vutla #else
32aaf461f9SLokesh Vutla #define SPL_MALLOC_F_SIZE	0
33aaf461f9SLokesh Vutla #endif
34aaf461f9SLokesh Vutla 
35e8428d6fSNishanth Menon /* SPL SPI Loader Configuration */
36e8428d6fSNishanth Menon #define CONFIG_SPL_PAD_TO		65536
37e8428d6fSNishanth Menon #define CONFIG_SPL_MAX_SIZE		(CONFIG_SPL_PAD_TO - 8)
38e8428d6fSNishanth Menon #define CONFIG_SPL_BSS_START_ADDR	(CONFIG_SPL_TEXT_BASE + \
39e8428d6fSNishanth Menon 					CONFIG_SPL_MAX_SIZE)
40e8428d6fSNishanth Menon #define CONFIG_SPL_BSS_MAX_SIZE		(32 * 1024)
41e8428d6fSNishanth Menon #define CONFIG_SYS_SPL_MALLOC_START	(CONFIG_SPL_BSS_START_ADDR + \
42e8428d6fSNishanth Menon 					CONFIG_SPL_BSS_MAX_SIZE)
43e8428d6fSNishanth Menon #define CONFIG_SYS_SPL_MALLOC_SIZE	(32 * 1024)
448ccdba8bSPhil Edworthy #define KEYSTONE_SPL_STACK_SIZE		(8 * 1024)
45e8428d6fSNishanth Menon #define CONFIG_SPL_STACK		(CONFIG_SYS_SPL_MALLOC_START + \
46e8428d6fSNishanth Menon 					CONFIG_SYS_SPL_MALLOC_SIZE + \
47aaf461f9SLokesh Vutla 					SPL_MALLOC_F_SIZE + \
488ccdba8bSPhil Edworthy 					KEYSTONE_SPL_STACK_SIZE - 4)
49e8428d6fSNishanth Menon #define CONFIG_SYS_SPI_U_BOOT_OFFS	CONFIG_SPL_PAD_TO
50e8428d6fSNishanth Menon 
51a4562d06SFranklin S Cooper Jr /* SRAM scratch space entries  */
52a4562d06SFranklin S Cooper Jr #define SRAM_SCRATCH_SPACE_ADDR	CONFIG_SPL_STACK + 0x8
53a4562d06SFranklin S Cooper Jr 
54a4562d06SFranklin S Cooper Jr #define TI_SRAM_SCRATCH_BOARD_EEPROM_START	(SRAM_SCRATCH_SPACE_ADDR)
55a4562d06SFranklin S Cooper Jr #define TI_SRAM_SCRATCH_BOARD_EEPROM_END	(SRAM_SCRATCH_SPACE_ADDR + 0x200)
56a4562d06SFranklin S Cooper Jr #define KEYSTONE_SRAM_SCRATCH_SPACE_END		(TI_SRAM_SCRATCH_BOARD_EEPROM_END)
57a4562d06SFranklin S Cooper Jr 
58e8428d6fSNishanth Menon /* UART Configuration */
59e8428d6fSNishanth Menon #define CONFIG_SYS_NS16550_MEM32
60391839fbSLokesh Vutla #if defined(CONFIG_SPL_BUILD) || !defined(CONFIG_DM_SERIAL)
61391839fbSLokesh Vutla #define CONFIG_SYS_NS16550_SERIAL
62e8428d6fSNishanth Menon #define CONFIG_SYS_NS16550_REG_SIZE	-4
63391839fbSLokesh Vutla #endif
64e8428d6fSNishanth Menon #define CONFIG_SYS_NS16550_COM1		KS2_UART0_BASE
65e8428d6fSNishanth Menon #define CONFIG_SYS_NS16550_COM2		KS2_UART1_BASE
66e8428d6fSNishanth Menon 
67e6d71e1cSVitaly Andrianov #ifndef CONFIG_SOC_K2G
6843ebbfc3SMasahiro Yamada #define CONFIG_SYS_NS16550_CLK		ks_clk_get_rate(KS2_CLK1_6)
69e6d71e1cSVitaly Andrianov #else
7043ebbfc3SMasahiro Yamada #define CONFIG_SYS_NS16550_CLK		ks_clk_get_rate(uart_pll_clk) / 2
71e6d71e1cSVitaly Andrianov #endif
72e6d71e1cSVitaly Andrianov 
73e8428d6fSNishanth Menon /* SPI Configuration */
7443ebbfc3SMasahiro Yamada #define CONFIG_SYS_SPI_CLK		ks_clk_get_rate(KS2_CLK1_6)
75e8428d6fSNishanth Menon #define CONFIG_SF_DEFAULT_SPEED		30000000
76e8428d6fSNishanth Menon #define CONFIG_ENV_SPI_MAX_HZ		CONFIG_SF_DEFAULT_SPEED
77e8428d6fSNishanth Menon #define CONFIG_SYS_SPI0
78e8428d6fSNishanth Menon #define CONFIG_SYS_SPI_BASE		KS2_SPI0_BASE
79e8428d6fSNishanth Menon #define CONFIG_SYS_SPI0_NUM_CS		4
80e8428d6fSNishanth Menon #define CONFIG_SYS_SPI1
81e8428d6fSNishanth Menon #define CONFIG_SYS_SPI1_BASE		KS2_SPI1_BASE
82e8428d6fSNishanth Menon #define CONFIG_SYS_SPI1_NUM_CS		4
83e8428d6fSNishanth Menon #define CONFIG_SYS_SPI2
84e8428d6fSNishanth Menon #define CONFIG_SYS_SPI2_BASE		KS2_SPI2_BASE
85e8428d6fSNishanth Menon #define CONFIG_SYS_SPI2_NUM_CS		4
8639832244SVignesh R #ifdef CONFIG_SPL_BUILD
8739832244SVignesh R #undef CONFIG_DM_SPI
8839832244SVignesh R #undef CONFIG_DM_SPI_FLASH
8939832244SVignesh R #endif
90e8428d6fSNishanth Menon 
91e8428d6fSNishanth Menon /* Network Configuration */
92e8428d6fSNishanth Menon #define CONFIG_PHY_MARVELL
93e8428d6fSNishanth Menon #define CONFIG_MII
94e8428d6fSNishanth Menon #define CONFIG_BOOTP_DEFAULT
95e8428d6fSNishanth Menon #define CONFIG_BOOTP_DNS2
96e8428d6fSNishanth Menon #define CONFIG_BOOTP_SEND_HOSTNAME
97e8428d6fSNishanth Menon #define CONFIG_NET_RETRY_COUNT		32
98e8428d6fSNishanth Menon #define CONFIG_SYS_SGMII_REFCLK_MHZ	312
99e8428d6fSNishanth Menon #define CONFIG_SYS_SGMII_LINERATE_MHZ	1250
100e8428d6fSNishanth Menon #define CONFIG_SYS_SGMII_RATESCALE	2
101e8428d6fSNishanth Menon 
102e8428d6fSNishanth Menon /* Keyston Navigator Configuration */
103e8428d6fSNishanth Menon #define CONFIG_TI_KSNAV
104e8428d6fSNishanth Menon #define CONFIG_KSNAV_QM_BASE_ADDRESS		KS2_QM_BASE_ADDRESS
105e8428d6fSNishanth Menon #define CONFIG_KSNAV_QM_CONF_BASE		KS2_QM_CONF_BASE
106e8428d6fSNishanth Menon #define CONFIG_KSNAV_QM_DESC_SETUP_BASE		KS2_QM_DESC_SETUP_BASE
107e8428d6fSNishanth Menon #define CONFIG_KSNAV_QM_STATUS_RAM_BASE		KS2_QM_STATUS_RAM_BASE
108e8428d6fSNishanth Menon #define CONFIG_KSNAV_QM_INTD_CONF_BASE		KS2_QM_INTD_CONF_BASE
109e8428d6fSNishanth Menon #define CONFIG_KSNAV_QM_PDSP1_CMD_BASE		KS2_QM_PDSP1_CMD_BASE
110e8428d6fSNishanth Menon #define CONFIG_KSNAV_QM_PDSP1_CTRL_BASE		KS2_QM_PDSP1_CTRL_BASE
111e8428d6fSNishanth Menon #define CONFIG_KSNAV_QM_PDSP1_IRAM_BASE		KS2_QM_PDSP1_IRAM_BASE
112e8428d6fSNishanth Menon #define CONFIG_KSNAV_QM_MANAGER_QUEUES_BASE	KS2_QM_MANAGER_QUEUES_BASE
113e8428d6fSNishanth Menon #define CONFIG_KSNAV_QM_MANAGER_Q_PROXY_BASE	KS2_QM_MANAGER_Q_PROXY_BASE
114e8428d6fSNishanth Menon #define CONFIG_KSNAV_QM_QUEUE_STATUS_BASE	KS2_QM_QUEUE_STATUS_BASE
115e8428d6fSNishanth Menon #define CONFIG_KSNAV_QM_LINK_RAM_BASE		KS2_QM_LINK_RAM_BASE
116e8428d6fSNishanth Menon #define CONFIG_KSNAV_QM_REGION_NUM		KS2_QM_REGION_NUM
117e8428d6fSNishanth Menon #define CONFIG_KSNAV_QM_QPOOL_NUM		KS2_QM_QPOOL_NUM
118e8428d6fSNishanth Menon 
119e8428d6fSNishanth Menon /* NETCP pktdma */
120e8428d6fSNishanth Menon #define CONFIG_KSNAV_PKTDMA_NETCP
121e8428d6fSNishanth Menon #define CONFIG_KSNAV_NETCP_PDMA_CTRL_BASE	KS2_NETCP_PDMA_CTRL_BASE
122e8428d6fSNishanth Menon #define CONFIG_KSNAV_NETCP_PDMA_TX_BASE		KS2_NETCP_PDMA_TX_BASE
123e8428d6fSNishanth Menon #define CONFIG_KSNAV_NETCP_PDMA_TX_CH_NUM	KS2_NETCP_PDMA_TX_CH_NUM
124e8428d6fSNishanth Menon #define CONFIG_KSNAV_NETCP_PDMA_RX_BASE		KS2_NETCP_PDMA_RX_BASE
125e8428d6fSNishanth Menon #define CONFIG_KSNAV_NETCP_PDMA_RX_CH_NUM	KS2_NETCP_PDMA_RX_CH_NUM
126e8428d6fSNishanth Menon #define CONFIG_KSNAV_NETCP_PDMA_SCHED_BASE	KS2_NETCP_PDMA_SCHED_BASE
127e8428d6fSNishanth Menon #define CONFIG_KSNAV_NETCP_PDMA_RX_FLOW_BASE	KS2_NETCP_PDMA_RX_FLOW_BASE
128e8428d6fSNishanth Menon #define CONFIG_KSNAV_NETCP_PDMA_RX_FLOW_NUM	KS2_NETCP_PDMA_RX_FLOW_NUM
129e8428d6fSNishanth Menon #define CONFIG_KSNAV_NETCP_PDMA_RX_FREE_QUEUE	KS2_NETCP_PDMA_RX_FREE_QUEUE
130e8428d6fSNishanth Menon #define CONFIG_KSNAV_NETCP_PDMA_RX_RCV_QUEUE	KS2_NETCP_PDMA_RX_RCV_QUEUE
131e8428d6fSNishanth Menon #define CONFIG_KSNAV_NETCP_PDMA_TX_SND_QUEUE	KS2_NETCP_PDMA_TX_SND_QUEUE
132e8428d6fSNishanth Menon 
133e8428d6fSNishanth Menon /* Keystone net */
134e8428d6fSNishanth Menon #define CONFIG_DRIVER_TI_KEYSTONE_NET
135e8428d6fSNishanth Menon #define CONFIG_KSNET_MAC_ID_BASE		KS2_MAC_ID_BASE_ADDR
136e8428d6fSNishanth Menon #define CONFIG_KSNET_NETCP_BASE			KS2_NETCP_BASE
137e8428d6fSNishanth Menon #define CONFIG_KSNET_SERDES_SGMII_BASE		KS2_SGMII_SERDES_BASE
138e8428d6fSNishanth Menon #define CONFIG_KSNET_SERDES_SGMII2_BASE		KS2_SGMII_SERDES2_BASE
139e8428d6fSNishanth Menon #define CONFIG_KSNET_SERDES_LANES_PER_SGMII	KS2_LANES_PER_SGMII_SERDES
140e8428d6fSNishanth Menon 
141e8428d6fSNishanth Menon /* SerDes */
142e8428d6fSNishanth Menon #define CONFIG_TI_KEYSTONE_SERDES
143e8428d6fSNishanth Menon 
144e8428d6fSNishanth Menon #define CONFIG_AEMIF_CNTRL_BASE		KS2_AEMIF_CNTRL_BASE
145e8428d6fSNishanth Menon 
146e8428d6fSNishanth Menon /* I2C Configuration */
147e8428d6fSNishanth Menon #define CONFIG_SYS_I2C_DAVINCI
148e8428d6fSNishanth Menon #define CONFIG_SYS_DAVINCI_I2C_SPEED	100000
149e8428d6fSNishanth Menon #define CONFIG_SYS_DAVINCI_I2C_SLAVE	0x10 /* SMBus host address */
150e8428d6fSNishanth Menon #define CONFIG_SYS_DAVINCI_I2C_SPEED1	100000
151e8428d6fSNishanth Menon #define CONFIG_SYS_DAVINCI_I2C_SLAVE1	0x10 /* SMBus host address */
152e8428d6fSNishanth Menon #define CONFIG_SYS_DAVINCI_I2C_SPEED2	100000
153e8428d6fSNishanth Menon #define CONFIG_SYS_DAVINCI_I2C_SLAVE2	0x10 /* SMBus host address */
154e8428d6fSNishanth Menon 
155e8428d6fSNishanth Menon /* EEPROM definitions */
156e8428d6fSNishanth Menon #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN		2
157e8428d6fSNishanth Menon #define CONFIG_SYS_I2C_EEPROM_ADDR		0x50
158e8428d6fSNishanth Menon #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	6
159e8428d6fSNishanth Menon #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	20
160e8428d6fSNishanth Menon #define CONFIG_ENV_EEPROM_IS_ON_I2C
161e8428d6fSNishanth Menon 
162e8428d6fSNishanth Menon /* NAND Configuration */
163e8428d6fSNishanth Menon #define CONFIG_NAND_DAVINCI
164e8428d6fSNishanth Menon #define CONFIG_KEYSTONE_RBL_NAND
165e8428d6fSNishanth Menon #define CONFIG_KEYSTONE_NAND_MAX_RBL_SIZE	CONFIG_ENV_OFFSET
166e8428d6fSNishanth Menon #define CONFIG_SYS_NAND_MASK_CLE		0x4000
167e8428d6fSNishanth Menon #define CONFIG_SYS_NAND_MASK_ALE		0x2000
168e8428d6fSNishanth Menon #define CONFIG_SYS_NAND_CS			2
169e8428d6fSNishanth Menon #define CONFIG_SYS_NAND_USE_FLASH_BBT
170e8428d6fSNishanth Menon #define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST
171e8428d6fSNishanth Menon 
172e8428d6fSNishanth Menon #define CONFIG_SYS_NAND_LARGEPAGE
173e8428d6fSNishanth Menon #define CONFIG_SYS_NAND_BASE_LIST		{ 0x30000000, }
174e8428d6fSNishanth Menon #define CONFIG_SYS_MAX_NAND_DEVICE		1
175e8428d6fSNishanth Menon #define CONFIG_SYS_NAND_MAX_CHIPS		1
176e8428d6fSNishanth Menon #define CONFIG_SYS_NAND_NO_SUBPAGE_WRITE
177e8428d6fSNishanth Menon #define CONFIG_MTD_PARTITIONS
178e8428d6fSNishanth Menon 
179e8428d6fSNishanth Menon /* USB Configuration */
180e8428d6fSNishanth Menon #define CONFIG_USB_XHCI_KEYSTONE
181e8428d6fSNishanth Menon #define CONFIG_USB_SS_BASE			KS2_USB_SS_BASE
182e8428d6fSNishanth Menon #define CONFIG_USB_HOST_XHCI_BASE		KS2_USB_HOST_XHCI_BASE
183e8428d6fSNishanth Menon #define CONFIG_DEV_USB_PHY_BASE			KS2_DEV_USB_PHY_BASE
184e8428d6fSNishanth Menon #define CONFIG_USB_PHY_CFG_BASE			KS2_USB_PHY_CFG_BASE
185e8428d6fSNishanth Menon 
186e8428d6fSNishanth Menon /* U-Boot general configuration */
187e8428d6fSNishanth Menon #define CONFIG_MISC_INIT_R
188e8428d6fSNishanth Menon #define CONFIG_MX_CYCLIC
189e8428d6fSNishanth Menon #define CONFIG_TIMESTAMP
190e8428d6fSNishanth Menon 
191e8428d6fSNishanth Menon /* EDMA3 */
192e8428d6fSNishanth Menon #define CONFIG_TI_EDMA3
193e8428d6fSNishanth Menon 
1943f18ff07SVignesh R #define KERNEL_MTD_PARTS						\
1953f18ff07SVignesh R 	"mtdparts="							\
1963f18ff07SVignesh R 	SPI_MTD_PARTS
1973f18ff07SVignesh R 
198abca9477SMurali Karicheri #define DEFAULT_FW_INITRAMFS_BOOT_ENV					\
199abca9477SMurali Karicheri 	"name_fw_rd=k2-fw-initrd.cpio.gz\0"				\
200abca9477SMurali Karicheri 	"set_rd_spec=setenv rd_spec ${rdaddr}:${filesize}\0"		\
201abca9477SMurali Karicheri 	"init_fw_rd_net=dhcp ${rdaddr} ${tftp_root}/${name_fw_rd}; "	\
202abca9477SMurali Karicheri 		"run set_rd_spec\0"					\
203979a1f8bSAndrew F. Davis 	"init_fw_rd_nfs=nfs ${rdaddr} ${nfs_root}/boot/${name_fw_rd}; "	\
204979a1f8bSAndrew F. Davis 		"run set_rd_spec\0"					\
205abca9477SMurali Karicheri 	"init_fw_rd_ramfs=setenv rd_spec -\0"				\
206abca9477SMurali Karicheri 	"init_fw_rd_ubi=ubifsload ${rdaddr} ${bootdir}/${name_fw_rd}; "	\
207abca9477SMurali Karicheri 		"run set_rd_spec\0"					\
208abca9477SMurali Karicheri 
2096f6e9439SNishanth Menon #define DEFAULT_PMMC_BOOT_ENV						\
2106f6e9439SNishanth Menon 	"set_name_pmmc=setenv name_pmmc ti-sci-firmware-${soc_variant}.bin\0" \
2116f6e9439SNishanth Menon 	"dev_pmmc=0\0"							\
2126f6e9439SNishanth Menon 	"get_pmmc_net=dhcp ${loadaddr} ${tftp_root}/${name_pmmc}\0"	\
213979a1f8bSAndrew F. Davis 	"get_pmmc_nfs=nfs ${loadaddr} ${nfs_root}/boot/${name_pmmc}\0"	\
2146f6e9439SNishanth Menon 	"get_pmmc_ramfs=run get_pmmc_net\0"				\
2156f6e9439SNishanth Menon 	"get_pmmc_mmc=load mmc ${bootpart} ${loadaddr} "		\
2166f6e9439SNishanth Menon 			"${bootdir}/${name_pmmc}\0"			\
2176f6e9439SNishanth Menon 	"get_pmmc_ubi=ubifsload ${loadaddr} ${bootdir}/${name_pmmc}\0"	\
2186f6e9439SNishanth Menon 	"run_pmmc=rproc init; rproc list; "				\
2196f6e9439SNishanth Menon 		"rproc load ${dev_pmmc} ${loadaddr} 0x${filesize}; "	\
2206f6e9439SNishanth Menon 		"rproc start ${dev_pmmc}\0"				\
2216f6e9439SNishanth Menon 
222e8428d6fSNishanth Menon #define CONFIG_EXTRA_ENV_SETTINGS					\
223fd72d318SNishanth Menon 	DEFAULT_LINUX_BOOT_ENV						\
224e8428d6fSNishanth Menon 	CONFIG_EXTRA_ENV_KS2_BOARD_SETTINGS				\
22548dc1657SCarlos Hernandez 	"bootdir=/boot\0" \
226e8428d6fSNishanth Menon 	"tftp_root=/\0"							\
227e8428d6fSNishanth Menon 	"nfs_root=/export\0"						\
228e8428d6fSNishanth Menon 	"mem_lpae=1\0"							\
229e8428d6fSNishanth Menon 	"addr_ubi=0x82000000\0"						\
230e8428d6fSNishanth Menon 	"addr_secdb_key=0xc000000\0"					\
231bad773f4SNishanth Menon 	"name_kern=zImage\0"						\
232ceee15ceSLokesh Vutla 	"addr_mon=0x87000000\0"						\
23308d06310SMadan Srinivas 	"addr_non_sec_mon=0x0c087fc0\0"					\
23408d06310SMadan Srinivas 	"addr_load_sec_bm=0x0c08c000\0"					\
235e8428d6fSNishanth Menon 	"run_mon=mon_install ${addr_mon}\0"				\
23608d06310SMadan Srinivas 	"run_mon_hs=mon_install ${addr_non_sec_mon} "			\
23708d06310SMadan Srinivas 			"${addr_load_sec_bm}\0"				\
238abca9477SMurali Karicheri 	"run_kern=bootz ${loadaddr} ${rd_spec} ${fdtaddr}\0"		\
239e8428d6fSNishanth Menon 	"init_net=run args_all args_net\0"				\
240c29a3ce4SAndrew F. Davis 	"init_nfs=setenv autoload no; dhcp; run args_all args_net\0"	\
241e8428d6fSNishanth Menon 	"init_ubi=run args_all args_ubi; "				\
2428462cb57SCarlos Hernandez 		"ubi part ubifs; ubifsmount ubi:rootfs;\0"			\
243fd72d318SNishanth Menon 	"get_fdt_net=dhcp ${fdtaddr} ${tftp_root}/${name_fdt}\0"	\
244c29a3ce4SAndrew F. Davis 	"get_fdt_nfs=nfs ${fdtaddr} ${nfs_root}/boot/${name_fdt}\0"	\
24548dc1657SCarlos Hernandez 	"get_fdt_ubi=ubifsload ${fdtaddr} ${bootdir}/${name_fdt}\0"		\
246fd72d318SNishanth Menon 	"get_kern_net=dhcp ${loadaddr} ${tftp_root}/${name_kern}\0"	\
247c29a3ce4SAndrew F. Davis 	"get_kern_nfs=nfs ${loadaddr} ${nfs_root}/boot/${name_kern}\0"	\
24848dc1657SCarlos Hernandez 	"get_kern_ubi=ubifsload ${loadaddr} ${bootdir}/${name_kern}\0"		\
249e8428d6fSNishanth Menon 	"get_mon_net=dhcp ${addr_mon} ${tftp_root}/${name_mon}\0"	\
250c29a3ce4SAndrew F. Davis 	"get_mon_nfs=nfs ${addr_mon} ${nfs_root}/boot/${name_mon}\0"	\
25148dc1657SCarlos Hernandez 	"get_mon_ubi=ubifsload ${addr_mon} ${bootdir}/${name_mon}\0"	\
252881261c8SAndrew F. Davis 	"get_fit_net=dhcp ${fit_loadaddr} ${tftp_root}"			\
253881261c8SAndrew F. Davis 						"/${fit_bootfile}\0"	\
254881261c8SAndrew F. Davis 	"get_fit_nfs=nfs ${fit_loadaddr} ${nfs_root}/boot/${fit_bootfile}\0"\
255881261c8SAndrew F. Davis 	"get_fit_ubi=ubifsload ${fit_loadaddr} ${bootdir}/${fit_bootfile}\0"\
256881261c8SAndrew F. Davis 	"get_fit_mmc=load mmc ${bootpart} ${fit_loadaddr} "		\
257881261c8SAndrew F. Davis 					"${bootdir}/${fit_bootfile}\0"	\
2588889e984SVitaly Andrianov 	"get_uboot_net=dhcp ${loadaddr} ${tftp_root}/${name_uboot}\0"	\
259c29a3ce4SAndrew F. Davis 	"get_uboot_nfs=nfs ${loadaddr} ${nfs_root}/boot/${name_uboot}\0" \
260e8b9fdceSFaiz Abbas 	"burn_uboot_spi=sf probe; sf erase 0 0x100000; "		\
2618889e984SVitaly Andrianov 		"sf write ${loadaddr} 0 ${filesize}\0"		\
262e8428d6fSNishanth Menon 	"burn_uboot_nand=nand erase 0 0x100000; "			\
2638889e984SVitaly Andrianov 		"nand write ${loadaddr} 0 ${filesize}\0"		\
2643f18ff07SVignesh R 	"args_all=setenv bootargs console=ttyS0,115200n8 rootwait=1 "	\
2653f18ff07SVignesh R 		KERNEL_MTD_PARTS					\
266e8428d6fSNishanth Menon 	"args_net=setenv bootargs ${bootargs} rootfstype=nfs "		\
267e8428d6fSNishanth Menon 		"root=/dev/nfs rw nfsroot=${serverip}:${nfs_root},"	\
268e8428d6fSNishanth Menon 		"${nfs_options} ip=dhcp\0"				\
269e8428d6fSNishanth Menon 	"nfs_options=v3,tcp,rsize=4096,wsize=4096\0"			\
270fd72d318SNishanth Menon 	"get_fdt_ramfs=dhcp ${fdtaddr} ${tftp_root}/${name_fdt}\0"	\
271fd72d318SNishanth Menon 	"get_kern_ramfs=dhcp ${loadaddr} ${tftp_root}/${name_kern}\0"	\
272e8428d6fSNishanth Menon 	"get_mon_ramfs=dhcp ${addr_mon} ${tftp_root}/${name_mon}\0"	\
273881261c8SAndrew F. Davis 	"get_fit_ramfs=dhcp ${fit_loadaddr} ${tftp_root}"		\
274881261c8SAndrew F. Davis 						"/${fit_bootfile}\0"	\
275fd72d318SNishanth Menon 	"get_fs_ramfs=dhcp ${rdaddr} ${tftp_root}/${name_fs}\0"	\
276e8428d6fSNishanth Menon 	"get_ubi_net=dhcp ${addr_ubi} ${tftp_root}/${name_ubi}\0"	\
277c29a3ce4SAndrew F. Davis 	"get_ubi_nfs=nfs ${addr_ubi} ${nfs_root}/boot/${name_ubi}\0"	\
278e8428d6fSNishanth Menon 	"burn_ubi=nand erase.part ubifs; "				\
279e8428d6fSNishanth Menon 		"nand write ${addr_ubi} ubifs ${filesize}\0"		\
280e8428d6fSNishanth Menon 	"init_ramfs=run args_all args_ramfs get_fs_ramfs\0"		\
281e8428d6fSNishanth Menon 	"args_ramfs=setenv bootargs ${bootargs} "			\
282e8428d6fSNishanth Menon 		"rdinit=/sbin/init rw root=/dev/ram0 "			\
283f06b454bSVitaly Andrianov 		"initrd=0x808080000,80M\0"				\
284e8428d6fSNishanth Menon 	"no_post=1\0"							\
285e8428d6fSNishanth Menon 	"mtdparts=mtdparts=davinci_nand.0:"				\
286e8428d6fSNishanth Menon 		"1024k(bootloader)ro,512k(params)ro,-(ubifs)\0"
287e8428d6fSNishanth Menon 
2886f6e9439SNishanth Menon #ifndef CONFIG_BOOTCOMMAND
28908d06310SMadan Srinivas #ifndef CONFIG_TI_SECURE_DEVICE
290e8428d6fSNishanth Menon #define CONFIG_BOOTCOMMAND						\
2913f5651a7SAndrew F. Davis 	"run init_${boot}; "						\
2923f5651a7SAndrew F. Davis 	"run get_mon_${boot} run_mon; "					\
2933f5651a7SAndrew F. Davis 	"run get_kern_${boot}; "					\
2943f5651a7SAndrew F. Davis 	"run init_fw_rd_${boot}; "					\
2953f5651a7SAndrew F. Davis 	"run get_fdt_${boot}; "						\
2963f5651a7SAndrew F. Davis 	"run run_kern"
29708d06310SMadan Srinivas #else
29808d06310SMadan Srinivas #define CONFIG_BOOTCOMMAND						\
2993f5651a7SAndrew F. Davis 	"run run_mon_hs; "						\
3003f5651a7SAndrew F. Davis 	"run init_${boot}; "						\
3013f5651a7SAndrew F. Davis 	"run get_fit_${boot}; "						\
3023f5651a7SAndrew F. Davis 	"bootm ${fit_loadaddr}#${name_fdt}"
30308d06310SMadan Srinivas #endif
3046f6e9439SNishanth Menon #endif
305e8428d6fSNishanth Menon 
306e07cff11SNishanth Menon /* Now for the remaining common defines */
307e07cff11SNishanth Menon #include <configs/ti_armv7_common.h>
308e07cff11SNishanth Menon 
309e8428d6fSNishanth Menon /* we may include files below only after all above definitions */
310e8428d6fSNishanth Menon #include <asm/arch/hardware.h>
311e8428d6fSNishanth Menon #include <asm/arch/clock.h>
312e6d71e1cSVitaly Andrianov #ifndef CONFIG_SOC_K2G
31343ebbfc3SMasahiro Yamada #define CONFIG_SYS_HZ_CLOCK		ks_clk_get_rate(KS2_CLK1_6)
314e6d71e1cSVitaly Andrianov #else
315ee3c6532SLokesh Vutla #define CONFIG_SYS_HZ_CLOCK		get_external_clk(sys_clk)
316e6d71e1cSVitaly Andrianov #endif
317e8428d6fSNishanth Menon 
318e8428d6fSNishanth Menon #endif /* __CONFIG_KS2_EVM_H */
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